Enum iced_x86::Register

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#[non_exhaustive]pub enum Register {
Show 256 variants    None = 0,
    AL = 1,
    CL = 2,
    DL = 3,
    BL = 4,
    AH = 5,
    CH = 6,
    DH = 7,
    BH = 8,
    SPL = 9,
    BPL = 10,
    SIL = 11,
    DIL = 12,
    R8L = 13,
    R9L = 14,
    R10L = 15,
    R11L = 16,
    R12L = 17,
    R13L = 18,
    R14L = 19,
    R15L = 20,
    AX = 21,
    CX = 22,
    DX = 23,
    BX = 24,
    SP = 25,
    BP = 26,
    SI = 27,
    DI = 28,
    R8W = 29,
    R9W = 30,
    R10W = 31,
    R11W = 32,
    R12W = 33,
    R13W = 34,
    R14W = 35,
    R15W = 36,
    EAX = 37,
    ECX = 38,
    EDX = 39,
    EBX = 40,
    ESP = 41,
    EBP = 42,
    ESI = 43,
    EDI = 44,
    R8D = 45,
    R9D = 46,
    R10D = 47,
    R11D = 48,
    R12D = 49,
    R13D = 50,
    R14D = 51,
    R15D = 52,
    RAX = 53,
    RCX = 54,
    RDX = 55,
    RBX = 56,
    RSP = 57,
    RBP = 58,
    RSI = 59,
    RDI = 60,
    R8 = 61,
    R9 = 62,
    R10 = 63,
    R11 = 64,
    R12 = 65,
    R13 = 66,
    R14 = 67,
    R15 = 68,
    EIP = 69,
    RIP = 70,
    ES = 71,
    CS = 72,
    SS = 73,
    DS = 74,
    FS = 75,
    GS = 76,
    XMM0 = 77,
    XMM1 = 78,
    XMM2 = 79,
    XMM3 = 80,
    XMM4 = 81,
    XMM5 = 82,
    XMM6 = 83,
    XMM7 = 84,
    XMM8 = 85,
    XMM9 = 86,
    XMM10 = 87,
    XMM11 = 88,
    XMM12 = 89,
    XMM13 = 90,
    XMM14 = 91,
    XMM15 = 92,
    XMM16 = 93,
    XMM17 = 94,
    XMM18 = 95,
    XMM19 = 96,
    XMM20 = 97,
    XMM21 = 98,
    XMM22 = 99,
    XMM23 = 100,
    XMM24 = 101,
    XMM25 = 102,
    XMM26 = 103,
    XMM27 = 104,
    XMM28 = 105,
    XMM29 = 106,
    XMM30 = 107,
    XMM31 = 108,
    YMM0 = 109,
    YMM1 = 110,
    YMM2 = 111,
    YMM3 = 112,
    YMM4 = 113,
    YMM5 = 114,
    YMM6 = 115,
    YMM7 = 116,
    YMM8 = 117,
    YMM9 = 118,
    YMM10 = 119,
    YMM11 = 120,
    YMM12 = 121,
    YMM13 = 122,
    YMM14 = 123,
    YMM15 = 124,
    YMM16 = 125,
    YMM17 = 126,
    YMM18 = 127,
    YMM19 = 128,
    YMM20 = 129,
    YMM21 = 130,
    YMM22 = 131,
    YMM23 = 132,
    YMM24 = 133,
    YMM25 = 134,
    YMM26 = 135,
    YMM27 = 136,
    YMM28 = 137,
    YMM29 = 138,
    YMM30 = 139,
    YMM31 = 140,
    ZMM0 = 141,
    ZMM1 = 142,
    ZMM2 = 143,
    ZMM3 = 144,
    ZMM4 = 145,
    ZMM5 = 146,
    ZMM6 = 147,
    ZMM7 = 148,
    ZMM8 = 149,
    ZMM9 = 150,
    ZMM10 = 151,
    ZMM11 = 152,
    ZMM12 = 153,
    ZMM13 = 154,
    ZMM14 = 155,
    ZMM15 = 156,
    ZMM16 = 157,
    ZMM17 = 158,
    ZMM18 = 159,
    ZMM19 = 160,
    ZMM20 = 161,
    ZMM21 = 162,
    ZMM22 = 163,
    ZMM23 = 164,
    ZMM24 = 165,
    ZMM25 = 166,
    ZMM26 = 167,
    ZMM27 = 168,
    ZMM28 = 169,
    ZMM29 = 170,
    ZMM30 = 171,
    ZMM31 = 172,
    K0 = 173,
    K1 = 174,
    K2 = 175,
    K3 = 176,
    K4 = 177,
    K5 = 178,
    K6 = 179,
    K7 = 180,
    BND0 = 181,
    BND1 = 182,
    BND2 = 183,
    BND3 = 184,
    CR0 = 185,
    CR1 = 186,
    CR2 = 187,
    CR3 = 188,
    CR4 = 189,
    CR5 = 190,
    CR6 = 191,
    CR7 = 192,
    CR8 = 193,
    CR9 = 194,
    CR10 = 195,
    CR11 = 196,
    CR12 = 197,
    CR13 = 198,
    CR14 = 199,
    CR15 = 200,
    DR0 = 201,
    DR1 = 202,
    DR2 = 203,
    DR3 = 204,
    DR4 = 205,
    DR5 = 206,
    DR6 = 207,
    DR7 = 208,
    DR8 = 209,
    DR9 = 210,
    DR10 = 211,
    DR11 = 212,
    DR12 = 213,
    DR13 = 214,
    DR14 = 215,
    DR15 = 216,
    ST0 = 217,
    ST1 = 218,
    ST2 = 219,
    ST3 = 220,
    ST4 = 221,
    ST5 = 222,
    ST6 = 223,
    ST7 = 224,
    MM0 = 225,
    MM1 = 226,
    MM2 = 227,
    MM3 = 228,
    MM4 = 229,
    MM5 = 230,
    MM6 = 231,
    MM7 = 232,
    TR0 = 233,
    TR1 = 234,
    TR2 = 235,
    TR3 = 236,
    TR4 = 237,
    TR5 = 238,
    TR6 = 239,
    TR7 = 240,
    TMM0 = 241,
    TMM1 = 242,
    TMM2 = 243,
    TMM3 = 244,
    TMM4 = 245,
    TMM5 = 246,
    TMM6 = 247,
    TMM7 = 248,
    DontUse0 = 249,
    DontUseFA = 250,
    DontUseFB = 251,
    DontUseFC = 252,
    DontUseFD = 253,
    DontUseFE = 254,
    DontUseFF = 255,
}

Expand description

A register

Variants (Non-exhaustive)§

This enum is marked as non-exhaustive

Non-exhaustive enums could have additional variants added in future. Therefore, when matching against variants of non-exhaustive enums, an extra wildcard arm must be added to account for any future variants.

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DontUse0 = 249

👎Deprecated since 1.12.0: Not part of the public API

Don’t use it!

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DontUseFA = 250

👎Deprecated since 1.12.0: Not part of the public API

Don’t use it!

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DontUseFB = 251

👎Deprecated since 1.12.0: Not part of the public API

Don’t use it!

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DontUseFC = 252

👎Deprecated since 1.12.0: Not part of the public API

Don’t use it!

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DontUseFD = 253

👎Deprecated since 1.12.0: Not part of the public API

Don’t use it!

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DontUseFE = 254

👎Deprecated since 1.12.0: Not part of the public API

Don’t use it!

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DontUseFF = 255

👎Deprecated since 1.12.0: Not part of the public API

Don’t use it!

Implementations§

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impl Register

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pub fn info(self) -> &'static RegisterInfo

Gets register info

Examples

use iced_x86::*;
let info = Register::EAX.info();
assert_eq!(info.size(), 4);

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pub fn base(self) -> Self

Gets the base register, eg. AL, AX, EAX, RAX, MM0, XMM0, YMM0, ZMM0, ES

Examples

use iced_x86::*;
assert_eq!(Register::GS.base(), Register::ES);
assert_eq!(Register::SIL.base(), Register::AL);
assert_eq!(Register::SP.base(), Register::AX);
assert_eq!(Register::R13D.base(), Register::EAX);
assert_eq!(Register::RBP.base(), Register::RAX);
assert_eq!(Register::MM6.base(), Register::MM0);
assert_eq!(Register::XMM28.base(), Register::XMM0);
assert_eq!(Register::YMM12.base(), Register::YMM0);
assert_eq!(Register::ZMM31.base(), Register::ZMM0);
assert_eq!(Register::K3.base(), Register::K0);
assert_eq!(Register::BND1.base(), Register::BND0);
assert_eq!(Register::ST7.base(), Register::ST0);
assert_eq!(Register::CR8.base(), Register::CR0);
assert_eq!(Register::DR6.base(), Register::DR0);
assert_eq!(Register::TR3.base(), Register::TR0);
assert_eq!(Register::RIP.base(), Register::EIP);

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pub fn number(self) -> usize

The register number (index) relative to base(), eg. 0-15, or 0-31, or if 8-bit GPR, 0-19

Examples

use iced_x86::*;
assert_eq!(Register::GS.number(), 5);
assert_eq!(Register::SIL.number(), 10);
assert_eq!(Register::SP.number(), 4);
assert_eq!(Register::R13D.number(), 13);
assert_eq!(Register::RBP.number(), 5);
assert_eq!(Register::MM6.number(), 6);
assert_eq!(Register::XMM28.number(), 28);
assert_eq!(Register::YMM12.number(), 12);
assert_eq!(Register::ZMM31.number(), 31);
assert_eq!(Register::K3.number(), 3);
assert_eq!(Register::BND1.number(), 1);
assert_eq!(Register::ST7.number(), 7);
assert_eq!(Register::CR8.number(), 8);
assert_eq!(Register::DR6.number(), 6);
assert_eq!(Register::TR3.number(), 3);
assert_eq!(Register::RIP.number(), 1);

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pub fn full_register(self) -> Self

Gets the full register that this one is a part of, eg. CL/CH/CX/ECX/RCX -> RCX, XMM11/YMM11/ZMM11 -> ZMM11

Examples

use iced_x86::*;
assert_eq!(Register::GS.full_register(), Register::GS);
assert_eq!(Register::SIL.full_register(), Register::RSI);
assert_eq!(Register::SP.full_register(), Register::RSP);
assert_eq!(Register::R13D.full_register(), Register::R13);
assert_eq!(Register::RBP.full_register(), Register::RBP);
assert_eq!(Register::MM6.full_register(), Register::MM6);
assert_eq!(Register::XMM10.full_register(), Register::ZMM10);
assert_eq!(Register::YMM10.full_register(), Register::ZMM10);
assert_eq!(Register::ZMM10.full_register(), Register::ZMM10);
assert_eq!(Register::K3.full_register(), Register::K3);
assert_eq!(Register::BND1.full_register(), Register::BND1);
assert_eq!(Register::ST7.full_register(), Register::ST7);
assert_eq!(Register::CR8.full_register(), Register::CR8);
assert_eq!(Register::DR6.full_register(), Register::DR6);
assert_eq!(Register::TR3.full_register(), Register::TR3);
assert_eq!(Register::RIP.full_register(), Register::RIP);

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pub fn full_register32(self) -> Self

Gets the full register that this one is a part of, except if it’s a GPR in which case the 32-bit register is returned, eg. CL/CH/CX/ECX/RCX -> ECX, XMM11/YMM11/ZMM11 -> ZMM11

Examples

use iced_x86::*;
assert_eq!(Register::GS.full_register32(), Register::GS);
assert_eq!(Register::SIL.full_register32(), Register::ESI);
assert_eq!(Register::SP.full_register32(), Register::ESP);
assert_eq!(Register::R13D.full_register32(), Register::R13D);
assert_eq!(Register::RBP.full_register32(), Register::EBP);
assert_eq!(Register::MM6.full_register32(), Register::MM6);
assert_eq!(Register::XMM10.full_register32(), Register::ZMM10);
assert_eq!(Register::YMM10.full_register32(), Register::ZMM10);
assert_eq!(Register::ZMM10.full_register32(), Register::ZMM10);
assert_eq!(Register::K3.full_register32(), Register::K3);
assert_eq!(Register::BND1.full_register32(), Register::BND1);
assert_eq!(Register::ST7.full_register32(), Register::ST7);
assert_eq!(Register::CR8.full_register32(), Register::CR8);
assert_eq!(Register::DR6.full_register32(), Register::DR6);
assert_eq!(Register::TR3.full_register32(), Register::TR3);
assert_eq!(Register::RIP.full_register32(), Register::RIP);

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pub fn size(self) -> usize

Gets the size of the register in bytes

Examples

use iced_x86::*;
assert_eq!(Register::GS.size(), 2);
assert_eq!(Register::SIL.size(), 1);
assert_eq!(Register::SP.size(), 2);
assert_eq!(Register::R13D.size(), 4);
assert_eq!(Register::RBP.size(), 8);
assert_eq!(Register::MM6.size(), 8);
assert_eq!(Register::XMM10.size(), 16);
assert_eq!(Register::YMM10.size(), 32);
assert_eq!(Register::ZMM10.size(), 64);
assert_eq!(Register::K3.size(), 8);
assert_eq!(Register::BND1.size(), 16);
assert_eq!(Register::ST7.size(), 10);
assert_eq!(Register::CR8.size(), 8);
assert_eq!(Register::DR6.size(), 8);
assert_eq!(Register::TR3.size(), 4);
assert_eq!(Register::RIP.size(), 8);

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impl Register

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pub fn is_segment_register(self) -> bool

Checks if it’s a segment register (ES, CS, SS, DS, FS, GS)

Examples

use iced_x86::*;
assert!(Register::GS.is_segment_register());
assert!(!Register::RCX.is_segment_register());

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pub fn is_gpr(self) -> bool

Checks if it’s a general purpose register (AL-R15L, AX-R15W, EAX-R15D, RAX-R15)

Examples

use iced_x86::*;
assert!(!Register::GS.is_gpr());
assert!(Register::CH.is_gpr());
assert!(Register::DX.is_gpr());
assert!(Register::R13D.is_gpr());
assert!(Register::RSP.is_gpr());
assert!(!Register::XMM0.is_gpr());

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pub fn is_gpr8(self) -> bool

Checks if it’s an 8-bit general purpose register (AL-R15L)

Examples

use iced_x86::*;
assert!(!Register::GS.is_gpr8());
assert!(Register::CH.is_gpr8());
assert!(!Register::DX.is_gpr8());
assert!(!Register::R13D.is_gpr8());
assert!(!Register::RSP.is_gpr8());
assert!(!Register::XMM0.is_gpr8());

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pub fn is_gpr16(self) -> bool

Checks if it’s a 16-bit general purpose register (AX-R15W)

Examples

use iced_x86::*;
assert!(!Register::GS.is_gpr16());
assert!(!Register::CH.is_gpr16());
assert!(Register::DX.is_gpr16());
assert!(!Register::R13D.is_gpr16());
assert!(!Register::RSP.is_gpr16());
assert!(!Register::XMM0.is_gpr16());

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pub fn is_gpr32(self) -> bool

Checks if it’s a 32-bit general purpose register (EAX-R15D)

Examples

use iced_x86::*;
assert!(!Register::GS.is_gpr32());
assert!(!Register::CH.is_gpr32());
assert!(!Register::DX.is_gpr32());
assert!(Register::R13D.is_gpr32());
assert!(!Register::RSP.is_gpr32());
assert!(!Register::XMM0.is_gpr32());

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pub fn is_gpr64(self) -> bool

Checks if it’s a 64-bit general purpose register (RAX-R15)

Examples

use iced_x86::*;
assert!(!Register::GS.is_gpr64());
assert!(!Register::CH.is_gpr64());
assert!(!Register::DX.is_gpr64());
assert!(!Register::R13D.is_gpr64());
assert!(Register::RSP.is_gpr64());
assert!(!Register::XMM0.is_gpr64());

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pub fn is_xmm(self) -> bool

Checks if it’s a 128-bit vector register (XMM0-XMM31)

Examples

use iced_x86::*;
assert!(!Register::R13D.is_xmm());
assert!(!Register::RSP.is_xmm());
assert!(Register::XMM0.is_xmm());
assert!(!Register::YMM0.is_xmm());
assert!(!Register::ZMM0.is_xmm());

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pub fn is_ymm(self) -> bool

Checks if it’s a 256-bit vector register (YMM0-YMM31)

Examples

use iced_x86::*;
assert!(!Register::R13D.is_ymm());
assert!(!Register::RSP.is_ymm());
assert!(!Register::XMM0.is_ymm());
assert!(Register::YMM0.is_ymm());
assert!(!Register::ZMM0.is_ymm());

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pub fn is_zmm(self) -> bool

Checks if it’s a 512-bit vector register (ZMM0-ZMM31)

Examples

use iced_x86::*;
assert!(!Register::R13D.is_zmm());
assert!(!Register::RSP.is_zmm());
assert!(!Register::XMM0.is_zmm());
assert!(!Register::YMM0.is_zmm());
assert!(Register::ZMM0.is_zmm());

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pub fn is_vector_register(self) -> bool

Checks if it’s an XMM, YMM or ZMM register

Examples

use iced_x86::*;
assert!(!Register::R13D.is_vector_register());
assert!(!Register::RSP.is_vector_register());
assert!(Register::XMM0.is_vector_register());
assert!(Register::YMM0.is_vector_register());
assert!(Register::ZMM0.is_vector_register());

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pub fn is_ip(self) -> bool

Checks if it’s EIP/RIP

Examples

use iced_x86::*;
assert!(Register::EIP.is_ip());
assert!(Register::RIP.is_ip());

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pub fn is_k(self) -> bool

Checks if it’s an opmask register (K0-K7)

Examples

use iced_x86::*;
assert!(!Register::R13D.is_k());
assert!(Register::K3.is_k());

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pub fn is_cr(self) -> bool

Checks if it’s a control register (CR0-CR15)

Examples

use iced_x86::*;
assert!(!Register::R13D.is_cr());
assert!(Register::CR3.is_cr());

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pub fn is_dr(self) -> bool

Checks if it’s a debug register (DR0-DR15)

Examples

use iced_x86::*;
assert!(!Register::R13D.is_dr());
assert!(Register::DR3.is_dr());

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pub fn is_tr(self) -> bool

Checks if it’s a test register (TR0-TR7)

Examples

use iced_x86::*;
assert!(!Register::R13D.is_tr());
assert!(Register::TR3.is_tr());

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pub fn is_st(self) -> bool

Checks if it’s an FPU stack register (ST0-ST7)

Examples

use iced_x86::*;
assert!(!Register::R13D.is_st());
assert!(Register::ST3.is_st());

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pub fn is_bnd(self) -> bool

Checks if it’s a bound register (BND0-BND3)

Examples

use iced_x86::*;
assert!(!Register::R13D.is_bnd());
assert!(Register::BND3.is_bnd());

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pub fn is_mm(self) -> bool

Checks if it’s an MMX register (MM0-MM7)

Examples

use iced_x86::*;
assert!(!Register::R13D.is_mm());
assert!(Register::MM3.is_mm());

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pub fn is_tmm(self) -> bool

Checks if it’s a tile register (TMM0-TMM7)

Examples

use iced_x86::*;
assert!(!Register::R13D.is_tmm());
assert!(Register::TMM3.is_tmm());

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impl Register

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pub fn values( ) -> impl Iterator<Item = Register> + DoubleEndedIterator + ExactSizeIterator + FusedIterator

Iterates over all Register enum values

Trait Implementations§

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impl Add<Register> for i32

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type Output = Register

The resulting type after applying the + operator.

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fn add(self, rhs: Register) -> Self::Output

Performs the + operation. Read more

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impl Add<Register> for u32

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type Output = Register

The resulting type after applying the + operator.

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fn add(self, rhs: Register) -> Self::Output

Performs the + operation. Read more

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impl Add<i32> for Register

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type Output = Register

The resulting type after applying the + operator.

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fn add(self, rhs: i32) -> Self::Output

Performs the + operation. Read more

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impl Add<u32> for Register

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type Output = Register

The resulting type after applying the + operator.

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fn add(self, rhs: u32) -> Self::Output

Performs the + operation. Read more

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impl AddAssign<i32> for Register

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fn add_assign(&mut self, rhs: i32)

Performs the += operation. Read more

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impl AddAssign<u32> for Register

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fn add_assign(&mut self, rhs: u32)

Performs the += operation. Read more

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impl Clone for Register

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fn clone(&self) -> Register

Returns a copy of the value. Read more

1.0.0 · source§

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source. Read more

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impl Debug for Register

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fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter. Read more

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impl Default for Register

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fn default() -> Self

Returns the “default value” for a type. Read more

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impl<'de> Deserialize<'de> for Register

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fn deserialize<D>(deserializer: D) -> Result<Self, D::Error>
where D: Deserializer<'de>,

Deserialize this value from the given Serde deserializer. Read more

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