Enum iced_x86::CpuidFeature

#[non_exhaustive]
pub enum CpuidFeature {
    INTEL8086 = 0,
    INTEL8086_ONLY = 1,
    INTEL186 = 2,
    INTEL286 = 3,
    INTEL286_ONLY = 4,
    INTEL386 = 5,
    INTEL386_ONLY = 6,
    INTEL386_A0_ONLY = 7,
    INTEL486 = 8,
    INTEL486_A_ONLY = 9,
    UMOV = 10,
    IA64 = 11,
    X64 = 12,
    ADX = 13,
    AES = 14,
    AVX = 15,
    AVX2 = 16,
    AVX512_4FMAPS = 17,
    AVX512_4VNNIW = 18,
    AVX512_BF16 = 19,
    AVX512_BITALG = 20,
    AVX512_IFMA = 21,
    AVX512_VBMI = 22,
    AVX512_VBMI2 = 23,
    AVX512_VNNI = 24,
    AVX512_VP2INTERSECT = 25,
    AVX512_VPOPCNTDQ = 26,
    AVX512BW = 27,
    AVX512CD = 28,
    AVX512DQ = 29,
    AVX512ER = 30,
    AVX512F = 31,
    AVX512PF = 32,
    AVX512VL = 33,
    BMI1 = 34,
    BMI2 = 35,
    CET_IBT = 36,
    CET_SS = 37,
    CL1INVMB = 38,
    CLDEMOTE = 39,
    CLFLUSHOPT = 40,
    CLFSH = 41,
    CLWB = 42,
    CLZERO = 43,
    CMOV = 44,
    CMPXCHG16B = 45,
    CPUID = 46,
    CX8 = 47,
    D3NOW = 48,
    D3NOWEXT = 49,
    OSS = 50,
    ENQCMD = 51,
    F16C = 52,
    FMA = 53,
    FMA4 = 54,
    FPU = 55,
    FPU287 = 56,
    FPU287XL_ONLY = 57,
    FPU387 = 58,
    FPU387SL_ONLY = 59,
    FSGSBASE = 60,
    FXSR = 61,
    CYRIX_D3NOW = 62,
    GFNI = 63,
    HLE = 64,
    HLE_or_RTM = 65,
    INVEPT = 66,
    INVPCID = 67,
    INVVPID = 68,
    LWP = 69,
    LZCNT = 70,
    MCOMMIT = 71,
    MMX = 72,
    MONITOR = 73,
    MONITORX = 74,
    MOVBE = 75,
    MOVDIR64B = 76,
    MOVDIRI = 77,
    MPX = 78,
    MSR = 79,
    MULTIBYTENOP = 80,
    PADLOCK_ACE = 81,
    PADLOCK_PHE = 82,
    PADLOCK_PMM = 83,
    PADLOCK_RNG = 84,
    PAUSE = 85,
    PCLMULQDQ = 86,
    PCOMMIT = 87,
    PCONFIG = 88,
    PKU = 89,
    POPCNT = 90,
    PREFETCHW = 91,
    PREFETCHWT1 = 92,
    PTWRITE = 93,
    RDPID = 94,
    RDPMC = 95,
    RDPRU = 96,
    RDRAND = 97,
    RDSEED = 98,
    RDTSCP = 99,
    RTM = 100,
    SEP = 101,
    SGX1 = 102,
    SHA = 103,
    SKINIT = 104,
    SKINIT_or_SVM = 105,
    SMAP = 106,
    SMX = 107,
    SSE = 108,
    SSE2 = 109,
    SSE3 = 110,
    SSE4_1 = 111,
    SSE4_2 = 112,
    SSE4A = 113,
    SSSE3 = 114,
    SVM = 115,
    SEV_ES = 116,
    SYSCALL = 117,
    TBM = 118,
    TSC = 119,
    VAES = 120,
    VMX = 121,
    VPCLMULQDQ = 122,
    WAITPKG = 123,
    WBNOINVD = 124,
    XOP = 125,
    XSAVE = 126,
    XSAVEC = 127,
    XSAVEOPT = 128,
    XSAVES = 129,
    SEV_SNP = 130,
    SERIALIZE = 131,
    TSXLDTRK = 132,
    INVLPGB = 133,
    AMX_BF16 = 134,
    AMX_TILE = 135,
    AMX_INT8 = 136,
    CYRIX_FPU = 137,
    CYRIX_SMM = 138,
    CYRIX_SMINT = 139,
    CYRIX_SMINT_0F7E = 140,
    CYRIX_SHR = 141,
    CYRIX_DDI = 142,
    CYRIX_EMMI = 143,
    CYRIX_DMI = 144,
    CENTAUR_AIS = 145,
    MOV_TR = 146,
    SMM = 147,
    TDX = 148,
    KL = 149,
    AESKLE = 150,
    WIDE_KL = 151,
    UINTR = 152,
    HRESET = 153,
    AVX_VNNI = 154,
    PADLOCK_GMI = 155,
    FRED = 156,
    LKGS = 157,
    AVX512_FP16 = 158,
    UDBG = 159,
    KNC = 160,
    PADLOCK_UNDOC = 161,
    RMPQUERY = 162,
    RAO_INT = 163,
    PREFETCHITI = 164,
    AMX_FP16 = 165,
    CMPCCXADD = 166,
    AVX_IFMA = 167,
    AVX_NE_CONVERT = 168,
    AVX_VNNI_INT8 = 169,
    MSRLIST = 170,
    WRMSRNS = 171,
    AMX_COMPLEX = 172,
    SHA512 = 173,
    SM3 = 174,
    SM4 = 175,
    TSE = 176,
    AVX_VNNI_INT16 = 177,
}

CPUID feature flags

Variants (Non-exhaustive)

Non-exhaustive enums could have additional variants added in future. Therefore, when matching against variants of non-exhaustive enums, an extra wildcard arm must be added to account for any future variants.

INTEL8086 = 0

8086 or later

INTEL8086_ONLY = 1

8086 only

INTEL186 = 2

80186 or later

INTEL286 = 3

80286 or later

INTEL286_ONLY = 4

80286 only

INTEL386 = 5

80386 or later

INTEL386_ONLY = 6

80386 only

INTEL386_A0_ONLY = 7

80386 A0-B0 stepping only (XBTS, IBTS instructions)

INTEL486 = 8

Intel486 or later

INTEL486_A_ONLY = 9

Intel486 A stepping only (CMPXCHG)

UMOV = 10

UMOV (80386 and Intel486)

IA64 = 11

IA-64

X64 = 12

CPUID.80000001H:EDX.LM[bit 29]

ADX = 13

CPUID.(EAX=07H, ECX=0H):EBX.ADX[bit 19]

AES = 14

CPUID.01H:ECX.AES[bit 25]

AVX = 15

CPUID.01H:ECX.AVX[bit 28]

AVX2 = 16

CPUID.(EAX=07H, ECX=0H):EBX.AVX2[bit 5]

AVX512_4FMAPS = 17

CPUID.(EAX=07H, ECX=0H):EDX.AVX512_4FMAPS[bit 3]

AVX512_4VNNIW = 18

CPUID.(EAX=07H, ECX=0H):EDX.AVX512_4VNNIW[bit 2]

AVX512_BF16 = 19

CPUID.(EAX=07H, ECX=1H):EAX.AVX512_BF16[bit 5]

AVX512_BITALG = 20

CPUID.(EAX=07H, ECX=0H):ECX.AVX512_BITALG[bit 12]

AVX512_IFMA = 21

CPUID.(EAX=07H, ECX=0H):EBX.AVX512_IFMA[bit 21]

AVX512_VBMI = 22

CPUID.(EAX=07H, ECX=0H):ECX.AVX512_VBMI[bit 1]

AVX512_VBMI2 = 23

CPUID.(EAX=07H, ECX=0H):ECX.AVX512_VBMI2[bit 6]

AVX512_VNNI = 24

CPUID.(EAX=07H, ECX=0H):ECX.AVX512_VNNI[bit 11]

AVX512_VP2INTERSECT = 25

CPUID.(EAX=07H, ECX=0H):EDX.AVX512_VP2INTERSECT[bit 08]

AVX512_VPOPCNTDQ = 26

CPUID.(EAX=07H, ECX=0H):ECX.AVX512_VPOPCNTDQ[bit 14]

AVX512BW = 27

CPUID.(EAX=07H, ECX=0H):EBX.AVX512BW[bit 30]

AVX512CD = 28

CPUID.(EAX=07H, ECX=0H):EBX.AVX512CD[bit 28]

AVX512DQ = 29

CPUID.(EAX=07H, ECX=0H):EBX.AVX512DQ[bit 17]

AVX512ER = 30

CPUID.(EAX=07H, ECX=0H):EBX.AVX512ER[bit 27]

AVX512F = 31

CPUID.(EAX=07H, ECX=0H):EBX.AVX512F[bit 16]

AVX512PF = 32

CPUID.(EAX=07H, ECX=0H):EBX.AVX512PF[bit 26]

AVX512VL = 33

CPUID.(EAX=07H, ECX=0H):EBX.AVX512VL[bit 31]

BMI1 = 34

CPUID.(EAX=07H, ECX=0H):EBX.BMI1[bit 3]

BMI2 = 35

CPUID.(EAX=07H, ECX=0H):EBX.BMI2[bit 8]

CET_IBT = 36

CPUID.(EAX=07H, ECX=0H):EDX.CET_IBT[bit 20]

CET_SS = 37

CPUID.(EAX=07H, ECX=0H):ECX.CET_SS[bit 7]

CL1INVMB = 38

CL1INVMB instruction (Intel SCC = Single-Chip Computer)

CLDEMOTE = 39

CPUID.(EAX=07H, ECX=0H):ECX.CLDEMOTE[bit 25]

CLFLUSHOPT = 40

CPUID.(EAX=07H, ECX=0H):EBX.CLFLUSHOPT[bit 23]

CLFSH = 41

CPUID.01H:EDX.CLFSH[bit 19]

CLWB = 42

CPUID.(EAX=07H, ECX=0H):EBX.CLWB[bit 24]

CLZERO = 43

CPUID.80000008H:EBX.CLZERO[bit 0]

CMOV = 44

CPUID.01H:EDX.CMOV[bit 15]

CMPXCHG16B = 45

CPUID.01H:ECX.CMPXCHG16B[bit 13]

CPUID = 46

RFLAGS.ID can be toggled

CX8 = 47

CPUID.01H:EDX.CX8[bit 8]

D3NOW = 48

CPUID.80000001H:EDX.3DNOW[bit 31]

D3NOWEXT = 49

CPUID.80000001H:EDX.3DNOWEXT[bit 30]

OSS = 50

CPUID.(EAX=12H, ECX=0H):EAX.OSS[bit 5]

ENQCMD = 51

CPUID.(EAX=07H, ECX=0H):ECX.ENQCMD[bit 29]

F16C = 52

CPUID.01H:ECX.F16C[bit 29]

FMA = 53

CPUID.01H:ECX.FMA[bit 12]

FMA4 = 54

CPUID.80000001H:ECX.FMA4[bit 16]

FPU = 55

8087 or later (CPUID.01H:EDX.FPU[bit 0])

FPU287 = 56

80287 or later

FPU287XL_ONLY = 57

80287XL only

FPU387 = 58

80387 or later

FPU387SL_ONLY = 59

80387SL only

FSGSBASE = 60

CPUID.(EAX=07H, ECX=0H):EBX.FSGSBASE[bit 0]

FXSR = 61

CPUID.01H:EDX.FXSR[bit 24]

CYRIX_D3NOW = 62

Cyrix (AMD Geode GX/LX) 3DNow! instructions

GFNI = 63

CPUID.(EAX=07H, ECX=0H):ECX.GFNI[bit 8]

HLE = 64

CPUID.(EAX=07H, ECX=0H):EBX.HLE[bit 4]

HLE_or_RTM = 65

HLE or RTM

INVEPT = 66

IA32_VMX_EPT_VPID_CAP[bit 20]

INVPCID = 67

CPUID.(EAX=07H, ECX=0H):EBX.INVPCID[bit 10]

INVVPID = 68

IA32_VMX_EPT_VPID_CAP[bit 32]

LWP = 69

CPUID.80000001H:ECX.LWP[bit 15]

LZCNT = 70

CPUID.80000001H:ECX.LZCNT[bit 5]

MCOMMIT = 71

CPUID.80000008H:EBX.MCOMMIT[bit 8]

MMX = 72

CPUID.01H:EDX.MMX[bit 23]

MONITOR = 73

CPUID.01H:ECX.MONITOR[bit 3]

MONITORX = 74

CPUID.80000001H:ECX.MONITORX[bit 29]

MOVBE = 75

CPUID.01H:ECX.MOVBE[bit 22]

MOVDIR64B = 76

CPUID.(EAX=07H, ECX=0H):ECX.MOVDIR64B[bit 28]

MOVDIRI = 77

CPUID.(EAX=07H, ECX=0H):ECX.MOVDIRI[bit 27]

MPX = 78

CPUID.(EAX=07H, ECX=0H):EBX.MPX[bit 14]

MSR = 79

CPUID.01H:EDX.MSR[bit 5]

MULTIBYTENOP = 80

Multi-byte nops (0F1F /0): CPUID.01H.EAX[Bits 11:8] = 0110B or 1111B

PADLOCK_ACE = 81

CPUID.0C0000000H:EAX >= 0C0000001H AND CPUID.0C0000001H:EDX.ACE[Bits 7:6] = 11B ([6] = exists, [7] = enabled)

PADLOCK_PHE = 82

CPUID.0C0000000H:EAX >= 0C0000001H AND CPUID.0C0000001H:EDX.PHE[Bits 11:10] = 11B ([10] = exists, [11] = enabled)

PADLOCK_PMM = 83

CPUID.0C0000000H:EAX >= 0C0000001H AND CPUID.0C0000001H:EDX.PMM[Bits 13:12] = 11B ([12] = exists, [13] = enabled)

PADLOCK_RNG = 84

CPUID.0C0000000H:EAX >= 0C0000001H AND CPUID.0C0000001H:EDX.RNG[Bits 3:2] = 11B ([2] = exists, [3] = enabled)

PAUSE = 85

PAUSE instruction (Pentium 4 or later)

PCLMULQDQ = 86

CPUID.01H:ECX.PCLMULQDQ[bit 1]

PCOMMIT = 87

CPUID.(EAX=07H, ECX=0H):EBX.PCOMMIT[bit 22]

PCONFIG = 88

CPUID.(EAX=07H, ECX=0H):EDX.PCONFIG[bit 18]

PKU = 89

CPUID.(EAX=07H, ECX=0H):ECX.PKU[bit 3]

POPCNT = 90

CPUID.01H:ECX.POPCNT[bit 23]

PREFETCHW = 91

CPUID.80000001H:ECX.PREFETCHW[bit 8]

PREFETCHWT1 = 92

CPUID.(EAX=07H, ECX=0H):ECX.PREFETCHWT1[bit 0]

PTWRITE = 93

CPUID.(EAX=14H, ECX=0H):EBX.PTWRITE[bit 4]

RDPID = 94

CPUID.(EAX=07H, ECX=0H):ECX.RDPID[bit 22]

RDPMC = 95

RDPMC instruction (Pentium MMX or later, or Pentium Pro or later)

RDPRU = 96

CPUID.80000008H:EBX.RDPRU[bit 4]

RDRAND = 97

CPUID.01H:ECX.RDRAND[bit 30]

RDSEED = 98

CPUID.(EAX=07H, ECX=0H):EBX.RDSEED[bit 18]

RDTSCP = 99

CPUID.80000001H:EDX.RDTSCP[bit 27]

RTM = 100

CPUID.(EAX=07H, ECX=0H):EBX.RTM[bit 11]

SEP = 101

CPUID.01H:EDX.SEP[bit 11]

SGX1 = 102

CPUID.(EAX=12H, ECX=0H):EAX.SGX1[bit 0]

SHA = 103

CPUID.(EAX=07H, ECX=0H):EBX.SHA[bit 29]

SKINIT = 104

CPUID.80000001H:ECX.SKINIT[bit 12]

SKINIT_or_SVM = 105

SKINIT or SVM

SMAP = 106

CPUID.(EAX=07H, ECX=0H):EBX.SMAP[bit 20]

SMX = 107

CPUID.01H:ECX.SMX[bit 6]

SSE = 108

CPUID.01H:EDX.SSE[bit 25]

SSE2 = 109

CPUID.01H:EDX.SSE2[bit 26]

SSE3 = 110

CPUID.01H:ECX.SSE3[bit 0]

SSE4_1 = 111

CPUID.01H:ECX.SSE4_1[bit 19]

SSE4_2 = 112

CPUID.01H:ECX.SSE4_2[bit 20]

SSE4A = 113

CPUID.80000001H:ECX.SSE4A[bit 6]

SSSE3 = 114

CPUID.01H:ECX.SSSE3[bit 9]

SVM = 115

CPUID.80000001H:ECX.SVM[bit 2]

SEV_ES = 116

CPUID.8000001FH:EAX.SEV-ES[bit 3]

SYSCALL = 117

CPUID.80000001H:EDX.SYSCALL[bit 11]

TBM = 118

CPUID.80000001H:ECX.TBM[bit 21]

TSC = 119

CPUID.01H:EDX.TSC[bit 4]

VAES = 120

CPUID.(EAX=07H, ECX=0H):ECX.VAES[bit 9]

VMX = 121

CPUID.01H:ECX.VMX[bit 5]

VPCLMULQDQ = 122

CPUID.(EAX=07H, ECX=0H):ECX.VPCLMULQDQ[bit 10]

WAITPKG = 123

CPUID.(EAX=07H, ECX=0H):ECX.WAITPKG[bit 5]

WBNOINVD = 124

CPUID.(EAX=80000008H, ECX=0H):EBX.WBNOINVD[bit 9]

XOP = 125

CPUID.80000001H:ECX.XOP[bit 11]

XSAVE = 126

CPUID.01H:ECX.XSAVE[bit 26]

XSAVEC = 127

CPUID.(EAX=0DH, ECX=1H):EAX.XSAVEC[bit 1]

XSAVEOPT = 128

CPUID.(EAX=0DH, ECX=1H):EAX.XSAVEOPT[bit 0]

XSAVES = 129

CPUID.(EAX=0DH, ECX=1H):EAX.XSAVES[bit 3]

SEV_SNP = 130

CPUID.8000001FH:EAX.SEV-SNP[bit 4]

SERIALIZE = 131

CPUID.(EAX=07H, ECX=0H):EDX.SERIALIZE[bit 14]

TSXLDTRK = 132

CPUID.(EAX=07H, ECX=0H):EDX.TSXLDTRK[bit 16]

INVLPGB = 133

CPUID.80000008H:EBX.INVLPGB[bit 3]

AMX_BF16 = 134

CPUID.(EAX=07H, ECX=0H):EDX.AMX-BF16[bit 22]

AMX_TILE = 135

CPUID.(EAX=07H, ECX=0H):EDX.AMX-TILE[bit 24]

AMX_INT8 = 136

CPUID.(EAX=07H, ECX=0H):EDX.AMX-INT8[bit 25]

CYRIX_FPU = 137

Cyrix FPU instructions (Cyrix, AMD Geode GX/LX)

CYRIX_SMM = 138

Cyrix SMM instructions: SVDC, RSDC, SVLDT, RSLDT, SVTS, RSTS (Cyrix, AMD Geode GX/LX)

CYRIX_SMINT = 139

Cyrix SMINT 0F38 (6x86MX and later, AMD Geode GX/LX)

CYRIX_SMINT_0F7E = 140

Cyrix SMINT 0F7E (6x86 or earlier)

CYRIX_SHR = 141

Cyrix SMM instructions: RDSHR, WRSHR (6x86MX, M II, Cyrix III)

CYRIX_DDI = 142

Cyrix DDI instructions: BB0_Reset, BB1_Reset, CPU_READ, CPU_WRITE (MediaGX, GXm, GXLV, GX1)

CYRIX_EMMI = 143

Cyrix AND CPUID.80000001H:EDX.EMMI[bit 24]

CYRIX_DMI = 144

Cyrix DMI instructions: DMINT, RDM (AMD Geode GX/LX)

CENTAUR_AIS = 145

CPUID.0C0000000H:EAX >= 0C0000001H AND CPUID.0C0000001H:EDX.AIS[Bits 1:0] = 11B ([0] = exists, [1] = enabled)

MOV_TR = 146

MOV to/from TR (80386, Intel486, Cyrix, Geode)

SMM = 147

RSM instruction (some 386s, some 486s, Pentium and later)

TDX = 148

CPUID.(EAX=??H, ECX=?H):???.????[bit ??]

KL = 149

CPUID.(EAX=07H, ECX=0H):ECX.KL[bit 23]

AESKLE = 150

CPUID.19H:EBX.AESKLE[bit 0]

WIDE_KL = 151

CPUID.19H:EBX.WIDE_KL[bit 2]

UINTR = 152

CPUID.(EAX=07H, ECX=0H):EDX.UINTR[bit 5]

HRESET = 153

CPUID.(EAX=07H, ECX=01H):EAX.HRESET[bit 22]

AVX_VNNI = 154

CPUID.(EAX=07H, ECX=01H):EAX.AVX-VNNI[bit 4]

PADLOCK_GMI = 155

CPUID.0C0000000H:EAX >= 0C0000001H AND CPUID.0C0000001H:EDX.GMI[Bits 5:4] = 11B ([4] = exists, [5] = enabled)

FRED = 156

CPUID.(EAX=07H, ECX=01H):EAX.FRED[bit 17]

LKGS = 157

CPUID.(EAX=07H, ECX=01H):EAX.LKGS[bit 18]

AVX512_FP16 = 158

CPUID.(EAX=07H, ECX=0H):EDX.AVX512-FP16[bit 23]

UDBG = 159

Undocumented Intel RDUDBG and WRUDBG instructions

KNC = 160

Intel Knights Corner

PADLOCK_UNDOC = 161

Undocumented instruction

RMPQUERY = 162

CPUID.8000001FH:EAX.RMPQUERY[bit 6]

RAO_INT = 163

CPUID.(EAX=07H, ECX=1H):EAX.RAO-INT[bit 3]

PREFETCHITI = 164

CPUID.(EAX=07H, ECX=1H):EDX.PREFETCHITI[bit 14]

AMX_FP16 = 165

CPUID.(EAX=07H, ECX=1H):EAX.AMX-FP16[bit 21]

CMPCCXADD = 166

CPUID.(EAX=07H, ECX=1H):EAX.CMPCCXADD[bit 7]

AVX_IFMA = 167

CPUID.(EAX=07H, ECX=1H):EAX.AVX-IFMA[bit 23]

AVX_NE_CONVERT = 168

CPUID.(EAX=07H, ECX=1H):EDX.AVX-NE-CONVERT[bit 5]

AVX_VNNI_INT8 = 169

CPUID.(EAX=07H, ECX=1H):EDX.AVX-VNNI-INT8[bit 4]

MSRLIST = 170

CPUID.(EAX=07H, ECX=1H):EAX.MSRLIST[bit 27]

WRMSRNS = 171

CPUID.(EAX=07H, ECX=1H):EAX.WRMSRNS[bit 19]

AMX_COMPLEX = 172

CPUID.(EAX=07H, ECX=1H):EDX.AMX-COMPLEX[bit 8]

SHA512 = 173

CPUID.(EAX=07H, ECX=1H):EAX.SHA512[bit 0]

SM3 = 174

CPUID.(EAX=07H, ECX=1H):EAX.SM3[bit 1]

SM4 = 175

CPUID.(EAX=07H, ECX=1H):EAX.SM4[bit 2]

TSE = 176

CPUID.(EAX=07H, ECX=1H):EBX.TSE[bit 1]

AVX_VNNI_INT16 = 177

CPUID.(EAX=07H, ECX=1H):EDX.AVX-VNNI-INT16[bit 10]

Implementations

impl CpuidFeature

pub fn values( ) -> impl Iterator<Item = CpuidFeature> + DoubleEndedIterator + ExactSizeIterator + FusedIterator

Iterates over all CpuidFeature enum values

Trait Implementations

impl Clone for CpuidFeature

fn clone(&self) -> CpuidFeature

Returns a copy of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Debug for CpuidFeature

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.

impl Default for CpuidFeature

fn default() -> Self

Returns the “default value” for a type.

impl<'de> Deserialize<'de> for CpuidFeature

fn deserialize<D>(deserializer: D) -> Result<Self, D::Error>

where D: Deserializer<'de>,

Deserialize this value from the given Serde deserializer.

impl Hash for CpuidFeature

fn hash<__H: Hasher>(&self, state: &mut __H)

Feeds this value into the given Hasher.

fn hash_slice<H>(data: &[Self], state: &mut H)

where H: Hasher, Self: Sized,

Feeds a slice of this type into the given Hasher.

impl Ord for CpuidFeature

fn cmp(&self, other: &CpuidFeature) -> Ordering

This method returns an Ordering between self and other.

fn max(self, other: Self) -> Self

where Self: Sized,

Compares and returns the maximum of two values.

fn min(self, other: Self) -> Self

where Self: Sized,

Compares and returns the minimum of two values.

fn clamp(self, min: Self, max: Self) -> Self

where Self: Sized + PartialOrd,

Restrict a value to a certain interval.

impl PartialEq for CpuidFeature

fn eq(&self, other: &CpuidFeature) -> bool

This method tests for self and other values to be equal, and is used by ==.

fn ne(&self, other: &Rhs) -> bool

This method tests for !=. The default implementation is almost always sufficient, and should not be overridden without very good reason.

impl PartialOrd for CpuidFeature

fn partial_cmp(&self, other: &CpuidFeature) -> Option<Ordering>

This method returns an ordering between self and other values if one exists.

fn lt(&self, other: &Rhs) -> bool

This method tests less than (for self and other) and is used by the < operator.

fn le(&self, other: &Rhs) -> bool

This method tests less than or equal to (for self and other) and is used by the <= operator.

fn gt(&self, other: &Rhs) -> bool

This method tests greater than (for self and other) and is used by the > operator.

fn ge(&self, other: &Rhs) -> bool

This method tests greater than or equal to (for self and other) and is used by the >= operator.

impl Serialize for CpuidFeature

fn serialize<S>(&self, serializer: S) -> Result<S::Ok, S::Error>

where S: Serializer,

Serialize this value into the given Serde serializer.

impl TryFrom<usize> for CpuidFeature

type Error = IcedError

The type returned in the event of a conversion error.

fn try_from(value: usize) -> Result<Self, Self::Error>

Performs the conversion.

impl Copy for CpuidFeature

impl Eq for CpuidFeature

impl StructuralEq for CpuidFeature

impl StructuralPartialEq for CpuidFeature