Struct iced_x86::Instruction[−][src]

pub struct Instruction { /* fields omitted */ }

Expand description

A 16/32/64-bit x86 instruction. Created by Decoder, by CodeAssembler or by Instruction::with*() methods.

Implementations

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impl Instruction

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pub fn new() -> Self

Creates an empty Instruction (all fields are cleared). See also the with_*() constructor methods.

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pub fn eq_all_bits(&self, other: &Self) -> bool

Checks if two instructions are equal, comparing all bits, not ignoring anything. == ignores some fields.

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pub fn ip16(&self) -> u16

Gets the 16-bit IP of the instruction, see also next_ip16()

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pub fn set_ip16(&mut self, new_value: u16)

Sets the 16-bit IP of the instruction, see also set_next_ip16()

pub fn ip32(&self) -> u32

Gets the 32-bit IP of the instruction, see also next_ip32()

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pub fn set_ip32(&mut self, new_value: u32)

Sets the 32-bit IP of the instruction, see also set_next_ip32()

pub fn ip(&self) -> u64

Gets the 64-bit IP of the instruction, see also next_ip()

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pub fn set_ip(&mut self, new_value: u64)

Sets the 64-bit IP of the instruction, see also set_next_ip()

pub fn next_ip16(&self) -> u16

Gets the 16-bit IP of the next instruction, see also ip16()

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pub fn set_next_ip16(&mut self, new_value: u16)

Sets the 16-bit IP of the next instruction, see also set_ip16()

pub fn next_ip32(&self) -> u32

Gets the 32-bit IP of the next instruction, see also ip32()

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pub fn set_next_ip32(&mut self, new_value: u32)

Sets the 32-bit IP of the next instruction, see also set_ip32()

pub fn next_ip(&self) -> u64

Gets the 64-bit IP of the next instruction, see also ip()

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pub fn set_next_ip(&mut self, new_value: u64)

Sets the 64-bit IP of the next instruction, see also set_ip()

pub fn code_size(&self) -> CodeSize

Gets the code size when the instruction was decoded. This value is informational and can be used by a formatter.

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pub fn set_code_size(&mut self, new_value: CodeSize)

Sets the code size when the instruction was decoded. This value is informational and can be used by a formatter.

pub fn is_invalid(&self) -> bool

Checks if it’s an invalid instruction (code() == Code::INVALID)

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pub fn code(&self) -> Code

Gets the instruction code, see also mnemonic()

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pub fn set_code(&mut self, new_value: Code)

Sets the instruction code

pub fn mnemonic(&self) -> Mnemonic

Gets the mnemonic, see also code()

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pub fn op_count(&self) -> u32

Gets the operand count. An instruction can have 0-5 operands.

pub fn len(&self) -> usize

Gets the length of the instruction, 0-15 bytes. This is just informational. If you modify the instruction or create a new one, this method could return the wrong value.

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pub fn set_len(&mut self, new_value: usize)

Sets the length of the instruction, 0-15 bytes. This is just informational. If you modify the instruction or create a new one, this method could return the wrong value.

pub fn has_xacquire_prefix(&self) -> bool

true if the instruction has the XACQUIRE prefix (F2)

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pub fn set_has_xacquire_prefix(&mut self, new_value: bool)

true if the instruction has the XACQUIRE prefix (F2)

pub fn has_xrelease_prefix(&self) -> bool

true if the instruction has the XRELEASE prefix (F3)

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pub fn set_has_xrelease_prefix(&mut self, new_value: bool)

true if the instruction has the XRELEASE prefix (F3)

pub fn has_rep_prefix(&self) -> bool

true if the instruction has the REPE or REP prefix (F3)

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pub fn set_has_rep_prefix(&mut self, new_value: bool)

true if the instruction has the REPE or REP prefix (F3)

pub fn has_repe_prefix(&self) -> bool

true if the instruction has the REPE or REP prefix (F3)

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pub fn set_has_repe_prefix(&mut self, new_value: bool)

true if the instruction has the REPE or REP prefix (F3)

pub fn has_repne_prefix(&self) -> bool

true if the instruction has the REPNE prefix (F2)

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pub fn set_has_repne_prefix(&mut self, new_value: bool)

true if the instruction has the REPNE prefix (F2)

pub fn has_lock_prefix(&self) -> bool

true if the instruction has the LOCK prefix (F0)

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pub fn set_has_lock_prefix(&mut self, new_value: bool)

true if the instruction has the LOCK prefix (F0)

pub fn op0_kind(&self) -> OpKind

Gets operand #0’s kind if the operand exists (see op_count() and try_op_kind())

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pub fn set_op0_kind(&mut self, new_value: OpKind)

Sets operand #0’s kind if the operand exists (see op_count() and try_set_op_kind())

pub fn op1_kind(&self) -> OpKind

Gets operand #1’s kind if the operand exists (see op_count() and try_op_kind())

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pub fn set_op1_kind(&mut self, new_value: OpKind)

Sets operand #1’s kind if the operand exists (see op_count() and try_set_op_kind())

pub fn op2_kind(&self) -> OpKind

Gets operand #2’s kind if the operand exists (see op_count() and try_op_kind())

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pub fn set_op2_kind(&mut self, new_value: OpKind)

Sets operand #2’s kind if the operand exists (see op_count() and try_set_op_kind())

pub fn op3_kind(&self) -> OpKind

Gets operand #3’s kind if the operand exists (see op_count() and try_op_kind())

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pub fn set_op3_kind(&mut self, new_value: OpKind)

Sets operand #3’s kind if the operand exists (see op_count() and try_set_op_kind())

pub fn op4_kind(&self) -> OpKind

Gets operand #4’s kind if the operand exists (see op_count() and try_op_kind())

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pub fn set_op4_kind(&mut self, new_value: OpKind)

Sets operand #4’s kind if the operand exists (see op_count() and try_set_op_kind())

pub fn op_kinds(
&self
) -> impl Iterator<Item = OpKind> + ExactSizeIterator + FusedIterator

Gets all op kinds (op_count() values)

pub fn op_kind(&self, operand: u32) -> OpKind

Gets an operand’s kind if it exists (see op_count())

pub fn set_op_kind(&mut self, operand: u32, op_kind: OpKind)

Sets an operand’s kind

Arguments

operand: Operand number, 0-4
op_kind: Operand kind

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pub fn has_segment_prefix(&self) -> bool

Checks if the instruction has a segment override prefix, see segment_prefix()

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pub fn segment_prefix(&self) -> Register

Gets the segment override prefix or Register::None if none. See also memory_segment(). Use this method if the operand has kind OpKind::Memory, OpKind::MemorySegSI, OpKind::MemorySegESI, OpKind::MemorySegRSI

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pub fn set_segment_prefix(&mut self, new_value: Register)

Sets the segment override prefix or Register::None if none. See also memory_segment(). Use this method if the operand has kind OpKind::Memory, OpKind::MemorySegSI, OpKind::MemorySegESI, OpKind::MemorySegRSI

Arguments

new_value: Segment register prefix

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pub fn memory_segment(&self) -> Register

Gets the effective segment register used to reference the memory location. Use this method if the operand has kind OpKind::Memory, OpKind::MemorySegSI, OpKind::MemorySegESI, OpKind::MemorySegRSI

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pub fn memory_displ_size(&self) -> u32

Gets the size of the memory displacement in bytes. Valid values are 0, 1 (16/32/64-bit), 2 (16-bit), 4 (32-bit), 8 (64-bit). Note that the return value can be 1 and memory_displacement64() may still not fit in a signed byte if it’s an EVEX/MVEX encoded instruction. Use this method if the operand has kind OpKind::Memory

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pub fn set_memory_displ_size(&mut self, new_value: u32)

Sets the size of the memory displacement in bytes. Valid values are 0, 1 (16/32/64-bit), 2 (16-bit), 4 (32-bit), 8 (64-bit). Note that the return value can be 1 and memory_displacement64() may still not fit in a signed byte if it’s an EVEX/MVEX encoded instruction. Use this method if the operand has kind OpKind::Memory

Arguments

new_value: Displacement size

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pub fn is_broadcast(&self) -> bool

true if the data is broadcast (EVEX instructions only)

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pub fn set_is_broadcast(&mut self, new_value: bool)

Sets the is broadcast flag (EVEX instructions only)

Arguments

new_value: New value

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pub fn is_mvex_eviction_hint(&self) -> bool

true if eviction hint bit is set ({eh}) (MVEX instructions only)

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pub fn set_is_mvex_eviction_hint(&mut self, new_value: bool)

true if eviction hint bit is set ({eh}) (MVEX instructions only)

Arguments

new_value: New value

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pub fn mvex_reg_mem_conv(&self) -> MvexRegMemConv

(MVEX) Register/memory operand conversion function

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pub fn set_mvex_reg_mem_conv(&mut self, new_value: MvexRegMemConv)

(MVEX) Register/memory operand conversion function

Arguments

new_value: New value

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pub fn memory_size(&self) -> MemorySize

Gets the size of the memory location that is referenced by the operand. See also is_broadcast(). Use this method if the operand has kind OpKind::Memory, OpKind::MemorySegSI, OpKind::MemorySegESI, OpKind::MemorySegRSI, OpKind::MemoryESDI, OpKind::MemoryESEDI, OpKind::MemoryESRDI

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pub fn memory_index_scale(&self) -> u32

Gets the index register scale value, valid values are *1, *2, *4, *8. Use this method if the operand has kind OpKind::Memory

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pub fn set_memory_index_scale(&mut self, new_value: u32)

Sets the index register scale value, valid values are *1, *2, *4, *8. Use this method if the operand has kind OpKind::Memory

Arguments

new_value: New value (1, 2, 4 or 8)

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pub fn memory_displacement32(&self) -> u32

Gets the memory operand’s displacement or the 32-bit absolute address if it’s an EIP or RIP relative memory operand. Use this method if the operand has kind OpKind::Memory

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pub fn set_memory_displacement32(&mut self, new_value: u32)

Gets the memory operand’s displacement or the 32-bit absolute address if it’s an EIP or RIP relative memory operand. Use this method if the operand has kind OpKind::Memory

Arguments

new_value: New value

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pub fn memory_displacement64(&self) -> u64

Gets the memory operand’s displacement or the 64-bit absolute address if it’s an EIP or RIP relative memory operand. Use this method if the operand has kind OpKind::Memory

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pub fn set_memory_displacement64(&mut self, new_value: u64)

Gets the memory operand’s displacement or the 64-bit absolute address if it’s an EIP or RIP relative memory operand. Use this method if the operand has kind OpKind::Memory

Arguments

new_value: New value

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pub fn immediate(&self, operand: u32) -> u64

Gets an operand’s immediate value

Arguments

operand: Operand number, 0-4

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pub fn set_immediate_i32(&mut self, operand: u32, new_value: i32)

Sets an operand’s immediate value

Arguments

operand: Operand number, 0-4
new_value: Immediate

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pub fn set_immediate_u32(&mut self, operand: u32, new_value: u32)

Sets an operand’s immediate value

Arguments

operand: Operand number, 0-4
new_value: Immediate

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pub fn set_immediate_i64(&mut self, operand: u32, new_value: i64)

Sets an operand’s immediate value

Arguments

operand: Operand number, 0-4
new_value: Immediate

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pub fn set_immediate_u64(&mut self, operand: u32, new_value: u64)

Sets an operand’s immediate value

Arguments

operand: Operand number, 0-4
new_value: Immediate

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pub fn immediate8(&self) -> u8

Gets the operand’s immediate value. Use this method if the operand has kind OpKind::Immediate8

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pub fn set_immediate8(&mut self, new_value: u8)

Sets the operand’s immediate value. Use this method if the operand has kind OpKind::Immediate8

Arguments

new_value: New value

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pub fn immediate8_2nd(&self) -> u8

Gets the operand’s immediate value. Use this method if the operand has kind OpKind::Immediate8_2nd

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pub fn set_immediate8_2nd(&mut self, new_value: u8)

Sets the operand’s immediate value. Use this method if the operand has kind OpKind::Immediate8_2nd

Arguments

new_value: New value

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pub fn immediate16(&self) -> u16

Gets the operand’s immediate value. Use this method if the operand has kind OpKind::Immediate16

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pub fn set_immediate16(&mut self, new_value: u16)

Sets the operand’s immediate value. Use this method if the operand has kind OpKind::Immediate16

Arguments

new_value: New value

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pub fn immediate32(&self) -> u32

Gets the operand’s immediate value. Use this method if the operand has kind OpKind::Immediate32

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pub fn set_immediate32(&mut self, new_value: u32)

Sets the operand’s immediate value. Use this method if the operand has kind OpKind::Immediate32

Arguments

new_value: New value

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pub fn immediate64(&self) -> u64

Gets the operand’s immediate value. Use this method if the operand has kind OpKind::Immediate64

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pub fn set_immediate64(&mut self, new_value: u64)

Sets the operand’s immediate value. Use this method if the operand has kind OpKind::Immediate64

Arguments

new_value: New value

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pub fn immediate8to16(&self) -> i16

Gets the operand’s immediate value. Use this method if the operand has kind OpKind::Immediate8to16

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pub fn set_immediate8to16(&mut self, new_value: i16)

Sets the operand’s immediate value. Use this method if the operand has kind OpKind::Immediate8to16

Arguments

new_value: New value

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pub fn immediate8to32(&self) -> i32

Gets the operand’s immediate value. Use this method if the operand has kind OpKind::Immediate8to32

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pub fn set_immediate8to32(&mut self, new_value: i32)

Sets the operand’s immediate value. Use this method if the operand has kind OpKind::Immediate8to32

Arguments

new_value: New value

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pub fn immediate8to64(&self) -> i64

Gets the operand’s immediate value. Use this method if the operand has kind OpKind::Immediate8to64

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pub fn set_immediate8to64(&mut self, new_value: i64)

Sets the operand’s immediate value. Use this method if the operand has kind OpKind::Immediate8to64

Arguments

new_value: New value

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pub fn immediate32to64(&self) -> i64

Gets the operand’s immediate value. Use this method if the operand has kind OpKind::Immediate32to64

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pub fn set_immediate32to64(&mut self, new_value: i64)

Sets the operand’s immediate value. Use this method if the operand has kind OpKind::Immediate32to64

Arguments

new_value: New value

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pub fn near_branch16(&self) -> u16

Gets the operand’s branch target. Use this method if the operand has kind OpKind::NearBranch16

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pub fn set_near_branch16(&mut self, new_value: u16)

Sets the operand’s branch target. Use this method if the operand has kind OpKind::NearBranch16

Arguments

new_value: New value

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pub fn near_branch32(&self) -> u32

Gets the operand’s branch target. Use this method if the operand has kind OpKind::NearBranch32

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pub fn set_near_branch32(&mut self, new_value: u32)

Sets the operand’s branch target. Use this method if the operand has kind OpKind::NearBranch32

Arguments

new_value: New value

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pub fn near_branch64(&self) -> u64

Gets the operand’s branch target. Use this method if the operand has kind OpKind::NearBranch64

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pub fn set_near_branch64(&mut self, new_value: u64)

Sets the operand’s branch target. Use this method if the operand has kind OpKind::NearBranch64

Arguments

new_value: New value

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pub fn near_branch_target(&self) -> u64

Gets the near branch target if it’s a CALL/JMP/Jcc near branch instruction (i.e., if op0_kind() is OpKind::NearBranch16, OpKind::NearBranch32 or OpKind::NearBranch64)

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pub fn far_branch16(&self) -> u16

Gets the operand’s branch target. Use this method if the operand has kind OpKind::FarBranch16

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pub fn set_far_branch16(&mut self, new_value: u16)

Sets the operand’s branch target. Use this method if the operand has kind OpKind::FarBranch16

Arguments

new_value: New value

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pub fn far_branch32(&self) -> u32

Gets the operand’s branch target. Use this method if the operand has kind OpKind::FarBranch32

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pub fn set_far_branch32(&mut self, new_value: u32)

Sets the operand’s branch target. Use this method if the operand has kind OpKind::FarBranch32

Arguments

new_value: New value

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pub fn far_branch_selector(&self) -> u16

Gets the operand’s branch target selector. Use this method if the operand has kind OpKind::FarBranch16 or OpKind::FarBranch32

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pub fn set_far_branch_selector(&mut self, new_value: u16)

Sets the operand’s branch target selector. Use this method if the operand has kind OpKind::FarBranch16 or OpKind::FarBranch32

Arguments

new_value: New value

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pub fn memory_base(&self) -> Register

Gets the memory operand’s base register or Register::None if none. Use this method if the operand has kind OpKind::Memory

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pub fn set_memory_base(&mut self, new_value: Register)

Sets the memory operand’s base register or Register::None if none. Use this method if the operand has kind OpKind::Memory

Arguments

new_value: New value

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pub fn memory_index(&self) -> Register

Gets the memory operand’s index register or Register::None if none. Use this method if the operand has kind OpKind::Memory

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pub fn set_memory_index(&mut self, new_value: Register)

Sets the memory operand’s index register or Register::None if none. Use this method if the operand has kind OpKind::Memory

Arguments

new_value: New value

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pub fn op0_register(&self) -> Register

Gets operand #0’s register value. Use this method if operand #0 (op0_kind()) has kind OpKind::Register, see op_count() and try_op_register()

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pub fn set_op0_register(&mut self, new_value: Register)

Sets operand #0’s register value. Use this method if operand #0 (op0_kind()) has kind OpKind::Register, see op_count() and try_op_register()

Arguments

new_value: New value

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pub fn op1_register(&self) -> Register

Gets operand #1’s register value. Use this method if operand #1 (op0_kind()) has kind OpKind::Register, see op_count() and try_op_register()

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pub fn set_op1_register(&mut self, new_value: Register)

Sets operand #1’s register value. Use this method if operand #1 (op0_kind()) has kind OpKind::Register, see op_count() and try_op_register()

Arguments

new_value: New value

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pub fn op2_register(&self) -> Register

Gets operand #2’s register value. Use this method if operand #2 (op0_kind()) has kind OpKind::Register, see op_count() and try_op_register()

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pub fn set_op2_register(&mut self, new_value: Register)

Sets operand #2’s register value. Use this method if operand #2 (op0_kind()) has kind OpKind::Register, see op_count() and try_op_register()

Arguments

new_value: New value

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pub fn op3_register(&self) -> Register

Gets operand #3’s register value. Use this method if operand #3 (op0_kind()) has kind OpKind::Register, see op_count() and try_op_register()

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pub fn set_op3_register(&mut self, new_value: Register)

Sets operand #3’s register value. Use this method if operand #3 (op0_kind()) has kind OpKind::Register, see op_count() and try_op_register()

Arguments

new_value: New value

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pub fn op4_register(&self) -> Register

Gets operand #4’s register value. Use this method if operand #4 (op0_kind()) has kind OpKind::Register, see op_count() and try_op_register()

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pub fn set_op4_register(&mut self, new_value: Register)

Sets operand #4’s register value. Use this method if operand #4 (op0_kind()) has kind OpKind::Register, see op_count() and try_op_register()

Arguments

new_value: New value

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pub fn op_register(&self, operand: u32) -> Register

Gets the operand’s register value. Use this method if the operand has kind OpKind::Register

Arguments

operand: Operand number, 0-4

Examples

use iced_x86::*;

// add [rax],ebx
let bytes = b"\x01\x18";
let mut decoder = Decoder::new(64, bytes, DecoderOptions::NONE);
let instr = decoder.decode();

assert_eq!(instr.op_count(), 2);
assert_eq!(instr.op_kind(0), OpKind::Memory);
assert_eq!(instr.op_kind(1), OpKind::Register);
assert_eq!(instr.op_register(1), Register::EBX);

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pub fn set_op_register(&mut self, operand: u32, new_value: Register)

Sets the operand’s register value. Use this method if the operand has kind OpKind::Register

Arguments

operand: Operand number, 0-4
new_value: New value

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pub fn op_mask(&self) -> Register

Gets the opmask register (Register::K1 - Register::K7) or Register::None if none

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pub fn set_op_mask(&mut self, new_value: Register)

Sets the opmask register (Register::K1 - Register::K7) or Register::None if none

Arguments

new_value: New value

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pub fn has_op_mask(&self) -> bool

Checks if there’s an opmask register (op_mask())

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pub fn zeroing_masking(&self) -> bool

true if zeroing-masking, false if merging-masking. Only used by most EVEX encoded instructions that use opmask registers.

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pub fn set_zeroing_masking(&mut self, new_value: bool)

true if zeroing-masking, false if merging-masking. Only used by most EVEX encoded instructions that use opmask registers.

Arguments

new_value: New value

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pub fn merging_masking(&self) -> bool

true if merging-masking, false if zeroing-masking. Only used by most EVEX encoded instructions that use opmask registers.

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pub fn set_merging_masking(&mut self, new_value: bool)

true if merging-masking, false if zeroing-masking. Only used by most EVEX encoded instructions that use opmask registers.

Arguments

new_value: New value

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pub fn rounding_control(&self) -> RoundingControl

Gets the rounding control (SAE is implied but suppress_all_exceptions() still returns false) or RoundingControl::None if the instruction doesn’t use it.

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pub fn set_rounding_control(&mut self, new_value: RoundingControl)

Sets the rounding control (SAE is implied but suppress_all_exceptions() still returns false) or RoundingControl::None if the instruction doesn’t use it.

Arguments

new_value: New value

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pub fn declare_data_len(&self) -> usize

Gets the number of elements in a db/dw/dd/dq directive. Can only be called if code() is Code::DeclareByte, Code::DeclareWord, Code::DeclareDword, Code::DeclareQword

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pub fn set_declare_data_len(&mut self, new_value: usize)

Sets the number of elements in a db/dw/dd/dq directive. Can only be called if code() is Code::DeclareByte, Code::DeclareWord, Code::DeclareDword, Code::DeclareQword

Arguments

new_value: New value: db: 1-16; dw: 1-8; dd: 1-4; dq: 1-2

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pub fn set_declare_byte_value_i8(&mut self, index: usize, new_value: i8)

Sets a new db value, see also declare_data_len(). Can only be called if code() is Code::DeclareByte

Arguments

index: Index (0-15)
new_value: New value

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pub fn try_set_declare_byte_value_i8(
 &mut self,
 index: usize,
 new_value: i8
) -> Result<(), IcedError>

Sets a new db value, see also declare_data_len(). Can only be called if code() is Code::DeclareByte

Errors

Fails if index is invalid

Arguments

index: Index (0-15)
new_value: New value

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pub fn set_declare_byte_value(&mut self, index: usize, new_value: u8)

Sets a new db value, see also declare_data_len(). Can only be called if code() is Code::DeclareByte

Arguments

index: Index (0-15)
new_value: New value

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pub fn get_declare_byte_value(&self, index: usize) -> u8

Gets a db value, see also declare_data_len(). Can only be called if code() is Code::DeclareByte

Arguments

index: Index (0-15)

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pub fn set_declare_word_value_i16(&mut self, index: usize, new_value: i16)

Sets a new dw value, see also declare_data_len(). Can only be called if code() is Code::DeclareWord

Arguments

index: Index (0-7)
new_value: New value

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pub fn set_declare_word_value(&mut self, index: usize, new_value: u16)

Sets a new dw value, see also declare_data_len(). Can only be called if code() is Code::DeclareWord

Arguments

index: Index (0-7)
new_value: New value

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pub fn get_declare_word_value(&self, index: usize) -> u16

Gets a dw value, see also declare_data_len(). Can only be called if code() is Code::DeclareWord

Arguments

index: Index (0-7)

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pub fn set_declare_dword_value_i32(&mut self, index: usize, new_value: i32)

Sets a new dd value, see also declare_data_len(). Can only be called if code() is Code::DeclareDword

Arguments

index: Index (0-3)
new_value: New value

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pub fn set_declare_dword_value(&mut self, index: usize, new_value: u32)

Sets a new dd value, see also declare_data_len(). Can only be called if code() is Code::DeclareDword

Arguments

index: Index (0-3)
new_value: New value

[src]

pub fn get_declare_dword_value(&self, index: usize) -> u32

Gets a dd value, see also declare_data_len(). Can only be called if code() is Code::DeclareDword

Arguments

index: Index (0-3)

[src]

pub fn set_declare_qword_value_i64(&mut self, index: usize, new_value: i64)

Sets a new dq value, see also declare_data_len(). Can only be called if code() is Code::DeclareQword

Arguments

index: Index (0-1)
new_value: New value

[src]

pub fn set_declare_qword_value(&mut self, index: usize, new_value: u64)

Sets a new dq value, see also declare_data_len(). Can only be called if code() is Code::DeclareQword

Arguments

index: Index (0-1)
new_value: New value

[src]

pub fn get_declare_qword_value(&self, index: usize) -> u64

Gets a dq value, see also declare_data_len(). Can only be called if code() is Code::DeclareQword

Arguments

index: Index (0-1)

[src]

pub fn is_vsib(&self) -> bool

Checks if this is a VSIB instruction, see also is_vsib32(), is_vsib64()

[src]

pub fn is_vsib32(&self) -> bool

VSIB instructions only (is_vsib()): true if it’s using 32-bit indexes, false if it’s using 64-bit indexes

[src]

pub fn is_vsib64(&self) -> bool

VSIB instructions only (is_vsib()): true if it’s using 64-bit indexes, false if it’s using 32-bit indexes

[src]

pub fn vsib(&self) -> Option<bool>

Checks if it’s a vsib instruction.

Returns

Some(true) if it’s a VSIB instruction with 64-bit indexes
Some(false) if it’s a VSIB instruction with 32-bit indexes
None if it’s not a VSIB instruction.

[src]

pub fn suppress_all_exceptions(&self) -> bool

Gets the suppress all exceptions flag (EVEX/MVEX encoded instructions). Note that if rounding_control() is not RoundingControl::None, SAE is implied but this method will still return false.

[src]

pub fn set_suppress_all_exceptions(&mut self, new_value: bool)

Sets the suppress all exceptions flag (EVEX/MVEX encoded instructions). Note that if rounding_control() is not RoundingControl::None, SAE is implied but this method will still return false.

Arguments

new_value: New value

[src]

pub fn is_ip_rel_memory_operand(&self) -> bool

Checks if the memory operand is RIP/EIP relative

[src]

pub fn ip_rel_memory_address(&self) -> u64

Gets the RIP/EIP releative address (memory_displacement32() or memory_displacement64()). This method is only valid if there’s a memory operand with RIP/EIP relative addressing, see is_ip_rel_memory_operand()

[src]

pub fn virtual_address<F>(
 &self,
 operand: u32,
 element_index: usize,
 get_register_value: F
) -> Option<u64> where
 F: FnMut(Register, usize, usize) -> Option<u64>,

Gets the virtual address of a memory operand

Arguments

operand: Operand number, 0-4, must be a memory operand
element_index: Only used if it’s a vsib memory operand. This is the element index of the vector index register.
get_register_value: Function that returns the value of a register or the base address of a segment register, or None for unsupported registers.

Call-back function args

Arg 1: register: Register (GPR8, GPR16, GPR32, GPR64, XMM, YMM, ZMM, seg). If it’s a segment register, the call-back function should return the segment’s base address, not the segment’s register value.
Arg 2: element_index: Only used if it’s a vsib memory operand. This is the element index of the vector index register.
Arg 3: element_size: Only used if it’s a vsib memory operand. Size in bytes of elements in vector index register (4 or 8).

Examples

use iced_x86::*;

// add [rdi+r12*8-5AA5EDCCh],esi
let bytes = b"\x42\x01\xB4\xE7\x34\x12\x5A\xA5";
let mut decoder = Decoder::new(64, bytes, DecoderOptions::NONE);
let instr = decoder.decode();

let va = instr.virtual_address(0, 0, |register, _element_index, _element_size| {
    match register {
        // The base address of ES, CS, SS and DS is always 0 in 64-bit mode
        Register::DS => Some(0x0000_0000_0000_0000),
        Register::RDI => Some(0x0000_0000_1000_0000),
        Register::R12 => Some(0x0000_0004_0000_0000),
        _ => None,
    }
});
assert_eq!(va, Some(0x0000_001F_B55A_1234));

[src]

impl Instruction

[src]

pub fn stack_pointer_increment(&self) -> i32

Gets the number of bytes added to SP/ESP/RSP or 0 if it’s not an instruction that pushes or pops data. This method assumes the instruction doesn’t change the privilege level (eg. IRET/D/Q). If it’s the LEAVE instruction, this method returns 0.

Examples

use iced_x86::*;

// pushfq
let bytes = b"\x9C";
let mut decoder = Decoder::new(64, bytes, DecoderOptions::NONE);
let instr = decoder.decode();

assert!(instr.is_stack_instruction());
assert_eq!(instr.stack_pointer_increment(), -8);

[src]

pub fn fpu_stack_increment_info(&self) -> FpuStackIncrementInfo

Gets the FPU status word’s TOP increment and whether it’s a conditional or unconditional push/pop and whether TOP is written.

Examples

use iced_x86::*;

// ficomp dword ptr [rax]
let bytes = b"\xDA\x18";
let mut decoder = Decoder::new(64, bytes, DecoderOptions::NONE);
let instr = decoder.decode();

let info = instr.fpu_stack_increment_info();
// It pops the stack once
assert_eq!(info.increment(), 1);
assert!(!info.conditional());
assert!(info.writes_top());

[src]

pub fn encoding(&self) -> EncodingKind

Instruction encoding, eg. Legacy, 3DNow!, VEX, EVEX, XOP

Examples

use iced_x86::*;

// vmovaps xmm1,xmm5
let bytes = b"\xC5\xF8\x28\xCD";
let mut decoder = Decoder::new(64, bytes, DecoderOptions::NONE);
let instr = decoder.decode();

assert_eq!(instr.encoding(), EncodingKind::VEX);

[src]

pub fn cpuid_features(&self) -> &'static [CpuidFeature ]

Gets the CPU or CPUID feature flags

Examples

use iced_x86::*;

// vmovaps xmm1,xmm5
// vmovaps xmm10{k3}{z},xmm19
let bytes = b"\xC5\xF8\x28\xCD\x62\x31\x7C\x8B\x28\xD3";
let mut decoder = Decoder::new(64, bytes, DecoderOptions::NONE);

// vmovaps xmm1,xmm5
let instr = decoder.decode();
let cpuid = instr.cpuid_features();
assert_eq!(cpuid.len(), 1);
assert_eq!(cpuid[0], CpuidFeature::AVX);

// vmovaps xmm10{k3}{z},xmm19
let instr = decoder.decode();
let cpuid = instr.cpuid_features();
assert_eq!(cpuid.len(), 2);
assert_eq!(cpuid[0], CpuidFeature::AVX512VL);
assert_eq!(cpuid[1], CpuidFeature::AVX512F);

[src]

pub fn flow_control(&self) -> FlowControl

Control flow info

Examples

use iced_x86::*;

// or ecx,esi
// ud0 rcx,rsi
// call rcx
let bytes = b"\x0B\xCE\x48\x0F\xFF\xCE\xFF\xD1";
let mut decoder = Decoder::new(64, bytes, DecoderOptions::NONE);

// or ecx,esi
let instr = decoder.decode();
assert_eq!(instr.flow_control(), FlowControl::Next);

// ud0 rcx,rsi
let instr = decoder.decode();
assert_eq!(instr.flow_control(), FlowControl::Exception);

// call rcx
let instr = decoder.decode();
assert_eq!(instr.flow_control(), FlowControl::IndirectCall);

[src]

pub fn is_privileged(&self) -> bool

true if it’s a privileged instruction (all CPL=0 instructions (except VMCALL) and IOPL instructions IN, INS, OUT, OUTS, CLI, STI)

[src]

pub fn is_stack_instruction(&self) -> bool

true if this is an instruction that implicitly uses the stack pointer (SP/ESP/RSP), eg. CALL, PUSH, POP, RET, etc. See also stack_pointer_increment()

Examples

use iced_x86::*;

// or ecx,esi
// push rax
let bytes = b"\x0B\xCE\x50";
let mut decoder = Decoder::new(64, bytes, DecoderOptions::NONE);

// or ecx,esi
let instr = decoder.decode();
assert!(!instr.is_stack_instruction());

// push rax
let instr = decoder.decode();
assert!(instr.is_stack_instruction());
assert_eq!(instr.stack_pointer_increment(), -8);

[src]

pub fn is_save_restore_instruction(&self) -> bool

true if it’s an instruction that saves or restores too many registers (eg. FXRSTOR, XSAVE, etc).

[src]

pub fn is_string_instruction(&self) -> bool

true if it’s a “string” instruction, such as MOVS, LODS, SCAS, etc.

[src]

pub fn rflags_read(&self) -> u32

All flags that are read by the CPU when executing the instruction. This method returns an RflagsBits value. See also rflags_modified().

Examples

use iced_x86::*;

// adc rsi,rcx
// xor rdi,5Ah
let bytes = b"\x48\x11\xCE\x48\x83\xF7\x5A";
let mut decoder = Decoder::new(64, bytes, DecoderOptions::NONE);

// adc rsi,rcx
let instr = decoder.decode();
assert_eq!(instr.rflags_read(), RflagsBits::CF);
assert_eq!(instr.rflags_written(), RflagsBits::OF | RflagsBits::SF | RflagsBits::ZF | RflagsBits::AF | RflagsBits::CF | RflagsBits::PF);
assert_eq!(instr.rflags_cleared(), RflagsBits::NONE);
assert_eq!(instr.rflags_set(), RflagsBits::NONE);
assert_eq!(instr.rflags_undefined(), RflagsBits::NONE);
assert_eq!(instr.rflags_modified(), RflagsBits::OF | RflagsBits::SF | RflagsBits::ZF | RflagsBits::AF | RflagsBits::CF | RflagsBits::PF);

// xor rdi,5Ah
let instr = decoder.decode();
assert_eq!(instr.rflags_read(), RflagsBits::NONE);
assert_eq!(instr.rflags_written(), RflagsBits::SF | RflagsBits::ZF | RflagsBits::PF);
assert_eq!(instr.rflags_cleared(), RflagsBits::OF | RflagsBits::CF);
assert_eq!(instr.rflags_set(), RflagsBits::NONE);
assert_eq!(instr.rflags_undefined(), RflagsBits::AF);
assert_eq!(instr.rflags_modified(), RflagsBits::OF | RflagsBits::SF | RflagsBits::ZF | RflagsBits::AF | RflagsBits::CF | RflagsBits::PF);

[src]

pub fn rflags_written(&self) -> u32

All flags that are written by the CPU, except those flags that are known to be undefined, always set or always cleared. This method returns an RflagsBits value. See also rflags_modified().

Examples

use iced_x86::*;

// adc rsi,rcx
// xor rdi,5Ah
let bytes = b"\x48\x11\xCE\x48\x83\xF7\x5A";
let mut decoder = Decoder::new(64, bytes, DecoderOptions::NONE);

// adc rsi,rcx
let instr = decoder.decode();
assert_eq!(instr.rflags_read(), RflagsBits::CF);
assert_eq!(instr.rflags_written(), RflagsBits::OF | RflagsBits::SF | RflagsBits::ZF | RflagsBits::AF | RflagsBits::CF | RflagsBits::PF);
assert_eq!(instr.rflags_cleared(), RflagsBits::NONE);
assert_eq!(instr.rflags_set(), RflagsBits::NONE);
assert_eq!(instr.rflags_undefined(), RflagsBits::NONE);
assert_eq!(instr.rflags_modified(), RflagsBits::OF | RflagsBits::SF | RflagsBits::ZF | RflagsBits::AF | RflagsBits::CF | RflagsBits::PF);

// xor rdi,5Ah
let instr = decoder.decode();
assert_eq!(instr.rflags_read(), RflagsBits::NONE);
assert_eq!(instr.rflags_written(), RflagsBits::SF | RflagsBits::ZF | RflagsBits::PF);
assert_eq!(instr.rflags_cleared(), RflagsBits::OF | RflagsBits::CF);
assert_eq!(instr.rflags_set(), RflagsBits::NONE);
assert_eq!(instr.rflags_undefined(), RflagsBits::AF);
assert_eq!(instr.rflags_modified(), RflagsBits::OF | RflagsBits::SF | RflagsBits::ZF | RflagsBits::AF | RflagsBits::CF | RflagsBits::PF);

[src]

pub fn rflags_cleared(&self) -> u32

All flags that are always cleared by the CPU. This method returns an RflagsBits value. See also rflags_modified().

Examples

use iced_x86::*;

// adc rsi,rcx
// xor rdi,5Ah
let bytes = b"\x48\x11\xCE\x48\x83\xF7\x5A";
let mut decoder = Decoder::new(64, bytes, DecoderOptions::NONE);

// adc rsi,rcx
let instr = decoder.decode();
assert_eq!(instr.rflags_read(), RflagsBits::CF);
assert_eq!(instr.rflags_written(), RflagsBits::OF | RflagsBits::SF | RflagsBits::ZF | RflagsBits::AF | RflagsBits::CF | RflagsBits::PF);
assert_eq!(instr.rflags_cleared(), RflagsBits::NONE);
assert_eq!(instr.rflags_set(), RflagsBits::NONE);
assert_eq!(instr.rflags_undefined(), RflagsBits::NONE);
assert_eq!(instr.rflags_modified(), RflagsBits::OF | RflagsBits::SF | RflagsBits::ZF | RflagsBits::AF | RflagsBits::CF | RflagsBits::PF);

// xor rdi,5Ah
let instr = decoder.decode();
assert_eq!(instr.rflags_read(), RflagsBits::NONE);
assert_eq!(instr.rflags_written(), RflagsBits::SF | RflagsBits::ZF | RflagsBits::PF);
assert_eq!(instr.rflags_cleared(), RflagsBits::OF | RflagsBits::CF);
assert_eq!(instr.rflags_set(), RflagsBits::NONE);
assert_eq!(instr.rflags_undefined(), RflagsBits::AF);
assert_eq!(instr.rflags_modified(), RflagsBits::OF | RflagsBits::SF | RflagsBits::ZF | RflagsBits::AF | RflagsBits::CF | RflagsBits::PF);

[src]

pub fn rflags_set(&self) -> u32

All flags that are always set by the CPU. This method returns an RflagsBits value. See also rflags_modified().

Examples

use iced_x86::*;

// adc rsi,rcx
// xor rdi,5Ah
let bytes = b"\x48\x11\xCE\x48\x83\xF7\x5A";
let mut decoder = Decoder::new(64, bytes, DecoderOptions::NONE);

// adc rsi,rcx
let instr = decoder.decode();
assert_eq!(instr.rflags_read(), RflagsBits::CF);
assert_eq!(instr.rflags_written(), RflagsBits::OF | RflagsBits::SF | RflagsBits::ZF | RflagsBits::AF | RflagsBits::CF | RflagsBits::PF);
assert_eq!(instr.rflags_cleared(), RflagsBits::NONE);
assert_eq!(instr.rflags_set(), RflagsBits::NONE);
assert_eq!(instr.rflags_undefined(), RflagsBits::NONE);
assert_eq!(instr.rflags_modified(), RflagsBits::OF | RflagsBits::SF | RflagsBits::ZF | RflagsBits::AF | RflagsBits::CF | RflagsBits::PF);

// xor rdi,5Ah
let instr = decoder.decode();
assert_eq!(instr.rflags_read(), RflagsBits::NONE);
assert_eq!(instr.rflags_written(), RflagsBits::SF | RflagsBits::ZF | RflagsBits::PF);
assert_eq!(instr.rflags_cleared(), RflagsBits::OF | RflagsBits::CF);
assert_eq!(instr.rflags_set(), RflagsBits::NONE);
assert_eq!(instr.rflags_undefined(), RflagsBits::AF);
assert_eq!(instr.rflags_modified(), RflagsBits::OF | RflagsBits::SF | RflagsBits::ZF | RflagsBits::AF | RflagsBits::CF | RflagsBits::PF);

[src]

pub fn rflags_undefined(&self) -> u32

All flags that are undefined after executing the instruction. This method returns an RflagsBits value. See also rflags_modified().

Examples

use iced_x86::*;

// adc rsi,rcx
// xor rdi,5Ah
let bytes = b"\x48\x11\xCE\x48\x83\xF7\x5A";
let mut decoder = Decoder::new(64, bytes, DecoderOptions::NONE);

// adc rsi,rcx
let instr = decoder.decode();
assert_eq!(instr.rflags_read(), RflagsBits::CF);
assert_eq!(instr.rflags_written(), RflagsBits::OF | RflagsBits::SF | RflagsBits::ZF | RflagsBits::AF | RflagsBits::CF | RflagsBits::PF);
assert_eq!(instr.rflags_cleared(), RflagsBits::NONE);
assert_eq!(instr.rflags_set(), RflagsBits::NONE);
assert_eq!(instr.rflags_undefined(), RflagsBits::NONE);
assert_eq!(instr.rflags_modified(), RflagsBits::OF | RflagsBits::SF | RflagsBits::ZF | RflagsBits::AF | RflagsBits::CF | RflagsBits::PF);

// xor rdi,5Ah
let instr = decoder.decode();
assert_eq!(instr.rflags_read(), RflagsBits::NONE);
assert_eq!(instr.rflags_written(), RflagsBits::SF | RflagsBits::ZF | RflagsBits::PF);
assert_eq!(instr.rflags_cleared(), RflagsBits::OF | RflagsBits::CF);
assert_eq!(instr.rflags_set(), RflagsBits::NONE);
assert_eq!(instr.rflags_undefined(), RflagsBits::AF);
assert_eq!(instr.rflags_modified(), RflagsBits::OF | RflagsBits::SF | RflagsBits::ZF | RflagsBits::AF | RflagsBits::CF | RflagsBits::PF);

[src]

pub fn rflags_modified(&self) -> u32

All flags that are modified by the CPU. This is rflags_written() + rflags_cleared() + rflags_set() + rflags_undefined(). This method returns an RflagsBits value.

Examples

use iced_x86::*;

// adc rsi,rcx
// xor rdi,5Ah
let bytes = b"\x48\x11\xCE\x48\x83\xF7\x5A";
let mut decoder = Decoder::new(64, bytes, DecoderOptions::NONE);

// adc rsi,rcx
let instr = decoder.decode();
assert_eq!(instr.rflags_read(), RflagsBits::CF);
assert_eq!(instr.rflags_written(), RflagsBits::OF | RflagsBits::SF | RflagsBits::ZF | RflagsBits::AF | RflagsBits::CF | RflagsBits::PF);
assert_eq!(instr.rflags_cleared(), RflagsBits::NONE);
assert_eq!(instr.rflags_set(), RflagsBits::NONE);
assert_eq!(instr.rflags_undefined(), RflagsBits::NONE);
assert_eq!(instr.rflags_modified(), RflagsBits::OF | RflagsBits::SF | RflagsBits::ZF | RflagsBits::AF | RflagsBits::CF | RflagsBits::PF);

// xor rdi,5Ah
let instr = decoder.decode();
assert_eq!(instr.rflags_read(), RflagsBits::NONE);
assert_eq!(instr.rflags_written(), RflagsBits::SF | RflagsBits::ZF | RflagsBits::PF);
assert_eq!(instr.rflags_cleared(), RflagsBits::OF | RflagsBits::CF);
assert_eq!(instr.rflags_set(), RflagsBits::NONE);
assert_eq!(instr.rflags_undefined(), RflagsBits::AF);
assert_eq!(instr.rflags_modified(), RflagsBits::OF | RflagsBits::SF | RflagsBits::ZF | RflagsBits::AF | RflagsBits::CF | RflagsBits::PF);

[src]

pub fn is_jcc_short_or_near(&self) -> bool

Checks if it’s a Jcc SHORT or Jcc NEAR instruction

[src]

pub fn is_jcc_near(&self) -> bool

Checks if it’s a Jcc NEAR instruction

[src]

pub fn is_jcc_short(&self) -> bool

Checks if it’s a Jcc SHORT instruction

[src]

pub fn is_jmp_short(&self) -> bool

Checks if it’s a JMP SHORT instruction

[src]

pub fn is_jmp_near(&self) -> bool

Checks if it’s a JMP NEAR instruction

[src]

pub fn is_jmp_short_or_near(&self) -> bool

Checks if it’s a JMP SHORT or a JMP NEAR instruction

[src]

pub fn is_jmp_far(&self) -> bool

Checks if it’s a JMP FAR instruction

[src]

pub fn is_call_near(&self) -> bool

Checks if it’s a CALL NEAR instruction

[src]

pub fn is_call_far(&self) -> bool

Checks if it’s a CALL FAR instruction

[src]

pub fn is_jmp_near_indirect(&self) -> bool

Checks if it’s a JMP NEAR reg/[mem] instruction

[src]

pub fn is_jmp_far_indirect(&self) -> bool

Checks if it’s a JMP FAR [mem] instruction

[src]

pub fn is_call_near_indirect(&self) -> bool

Checks if it’s a CALL NEAR reg/[mem] instruction

[src]

pub fn is_call_far_indirect(&self) -> bool

Checks if it’s a CALL FAR [mem] instruction

[src]

pub fn is_jkcc_short_or_near(&self) -> bool

Checks if it’s a JKccD SHORT or JKccD NEAR instruction

[src]

pub fn is_jkcc_near(&self) -> bool

Checks if it’s a JKccD NEAR instruction

[src]

pub fn is_jkcc_short(&self) -> bool

Checks if it’s a JKccD SHORT instruction

[src]

pub fn negate_condition_code(&mut self)

Negates the condition code, eg. JE -> JNE. Can be used if it’s Jcc, SETcc, CMOVcc, LOOPcc and does nothing if the instruction doesn’t have a condition code.

Examples

use iced_x86::*;

// setbe al
let bytes = b"\x0F\x96\xC0";
let mut decoder = Decoder::new(64, bytes, DecoderOptions::NONE);

let mut instr = decoder.decode();
assert_eq!(instr.code(), Code::Setbe_rm8);
assert_eq!(instr.condition_code(), ConditionCode::be);
instr.negate_condition_code();
assert_eq!(instr.code(), Code::Seta_rm8);
assert_eq!(instr.condition_code(), ConditionCode::a);

[src]

pub fn as_short_branch(&mut self)

Converts Jcc/JMP NEAR to Jcc/JMP SHORT and does nothing if it’s not a Jcc/JMP NEAR instruction

Examples

use iced_x86::*;

// jbe near ptr label
let bytes = b"\x0F\x86\x5A\xA5\x12\x34";
let mut decoder = Decoder::new(64, bytes, DecoderOptions::NONE);

let mut instr = decoder.decode();
assert_eq!(instr.code(), Code::Jbe_rel32_64);
instr.as_short_branch();
assert_eq!(instr.code(), Code::Jbe_rel8_64);
instr.as_short_branch();
assert_eq!(instr.code(), Code::Jbe_rel8_64);

[src]

pub fn as_near_branch(&mut self)

Converts Jcc/JMP SHORT to Jcc/JMP NEAR and does nothing if it’s not a Jcc/JMP SHORT instruction

Examples

use iced_x86::*;

// jbe short label
let bytes = b"\x76\x5A";
let mut decoder = Decoder::new(64, bytes, DecoderOptions::NONE);

let mut instr = decoder.decode();
assert_eq!(instr.code(), Code::Jbe_rel8_64);
instr.as_near_branch();
assert_eq!(instr.code(), Code::Jbe_rel32_64);
instr.as_near_branch();
assert_eq!(instr.code(), Code::Jbe_rel32_64);

[src]

pub fn condition_code(&self) -> ConditionCode

Gets the condition code if it’s Jcc, SETcc, CMOVcc, LOOPcc else ConditionCode::None is returned

Examples

use iced_x86::*;

// setbe al
// jl short label
// cmovne ecx,esi
// nop
let bytes = b"\x0F\x96\xC0\x7C\x5A\x0F\x45\xCE\x90";
let mut decoder = Decoder::new(64, bytes, DecoderOptions::NONE);

// setbe al
let instr = decoder.decode();
assert_eq!(instr.condition_code(), ConditionCode::be);

// jl short label
let instr = decoder.decode();
assert_eq!(instr.condition_code(), ConditionCode::l);

// cmovne ecx,esi
let instr = decoder.decode();
assert_eq!(instr.condition_code(), ConditionCode::ne);

// nop
let instr = decoder.decode();
assert_eq!(instr.condition_code(), ConditionCode::None);

[src]

pub fn with1<T>(code: Code, op0: T) -> Result<Instruction, IcedError> where
Self: With1<T>,

Creates an instruction with 1 operand

Errors

Fails if one of the operands is invalid (basic checks)

Arguments

code: Code value
op0: First operand (eg. a Register, an integer (a u32/i64/u64 number suffix is sometimes needed), or a MemoryOperand)

Examples

use iced_x86::*;

let _ = Instruction::with1(Code::Pop_rm64, Register::RCX)?;
let _ = Instruction::with1(Code::Pop_rm64, MemoryOperand::new(Register::RBP, Register::RSI, 2, -0x5432_10FF, 8, false, Register::FS))?;

[src]

pub fn with2<T, U>(code: Code, op0: T, op1: U) -> Result<Instruction, IcedError> where
Self: With2<T, U>,

Creates an instruction with 2 operands

Errors

Fails if one of the operands is invalid (basic checks)

Arguments

code: Code value
op0: First operand (eg. a Register, an integer (a u32/i64/u64 number suffix is sometimes needed), or a MemoryOperand)
op1: Second operand

Examples

use iced_x86::*;

let _ = Instruction::with2(Code::Add_rm8_r8, Register::CL, Register::DL)?;
let _ = Instruction::with2(Code::Add_r8_rm8, Register::CL, MemoryOperand::new(Register::RBP, Register::RSI, 2, -0x5432_10FF, 8, false, Register::FS))?;

[src]

pub fn with3<T, U, V>(
 code: Code,
 op0: T,
 op1: U,
 op2: V
) -> Result<Instruction, IcedError> where
 Self: With3<T, U, V>,

Creates an instruction with 3 operands

Errors

Fails if one of the operands is invalid (basic checks)

Arguments

code: Code value
op0: First operand (eg. a Register, an integer (a u32/i64/u64 number suffix is sometimes needed), or a MemoryOperand)
op1: Second operand
op2: Third operand

Examples

use iced_x86::*;

let _ = Instruction::with3(Code::Imul_r16_rm16_imm16, Register::CX, Register::DX, 0x5AA5)?;
let _ = Instruction::with3(Code::Imul_r16_rm16_imm16, Register::CX, MemoryOperand::new(Register::RBP, Register::RSI, 2, -0x5432_10FF, 8, false, Register::FS), 0xA55A)?;

[src]

pub fn with4<T, U, V, W>(
 code: Code,
 op0: T,
 op1: U,
 op2: V,
 op3: W
) -> Result<Instruction, IcedError> where
 Self: With4<T, U, V, W>,

Creates an instruction with 4 operands

Errors

Fails if one of the operands is invalid (basic checks)

Arguments

code: Code value
op0: First operand (eg. a Register, an integer (a u32/i64/u64 number suffix is sometimes needed), or a MemoryOperand)
op1: Second operand
op2: Third operand
op3: Fourth operand

Examples

use iced_x86::*;

let _ = Instruction::with4(Code::Insertq_xmm_xmm_imm8_imm8, Register::XMM1, Register::XMM2, 0xA5, 0xFD)?;
let _ = Instruction::with4(Code::VEX_Vfmaddsubps_xmm_xmm_xmm_xmmm128, Register::XMM1, Register::XMM2, Register::XMM3, MemoryOperand::new(Register::RBP, Register::RSI, 2, -0x5432_10FF, 8, false, Register::FS))?;

[src]

pub fn with5<T, U, V, W, X>(
 code: Code,
 op0: T,
 op1: U,
 op2: V,
 op3: W,
 op4: X
) -> Result<Instruction, IcedError> where
 Self: With5<T, U, V, W, X>,

Creates an instruction with 5 operands

Errors

Fails if one of the operands is invalid (basic checks)

Arguments

code: Code value
op0: First operand (eg. a Register, an integer (a u32/i64/u64 number suffix is sometimes needed), or a MemoryOperand)
op1: Second operand
op2: Third operand
op3: Fourth operand
op4: Fifth operand

Examples

use iced_x86::*;

let _ = Instruction::with5(Code::VEX_Vpermil2ps_xmm_xmm_xmmm128_xmm_imm4, Register::XMM1, Register::XMM2, Register::XMM3, Register::XMM4, 0x0)?;
let _ = Instruction::with5(Code::VEX_Vpermil2ps_xmm_xmm_xmm_xmmm128_imm4, Register::XMM1, Register::XMM2, Register::XMM3, MemoryOperand::new(Register::RBP, Register::RSI, 2, -0x5432_10FF, 8, false, Register::FS), 0x1)?;

[src]

impl Instruction

[src]

pub fn with(code: Code) -> Self

Creates an instruction with no operands

Arguments

code: Code value

[src]

pub fn with_branch(code: Code, target: u64) -> Result<Self, IcedError>

Creates a new near/short branch instruction

Errors

Fails if the created instruction doesn’t have a near branch operand

Arguments

code: Code value
target: Target address

[src]

pub fn with_far_branch(
 code: Code,
 selector: u16,
 offset: u32
) -> Result<Self, IcedError>

Creates a new far branch instruction

Errors

Fails if the created instruction doesn’t have a far branch operand

Arguments

code: Code value
selector: Selector/segment value
offset: Offset

[src]

pub fn with_xbegin(bitness: u32, target: u64) -> Result<Self, IcedError>

Creates a new XBEGIN instruction

Errors

Fails if bitness is not one of 16, 32, 64.

Arguments

bitness: 16, 32, or 64
target: Target address

[src]

pub fn with_outsb(
 address_size: u32,
 segment_prefix: Register,
 rep_prefix: RepPrefixKind
) -> Result<Self, IcedError>

Creates a OUTSB instruction

Errors

Fails if address_size is not one of 16, 32, 64.

Arguments

address_size: 16, 32, or 64
segment_prefix: Segment override or Register::None
rep_prefix: Rep prefix or RepPrefixKind::None

[src]

pub fn with_rep_outsb(address_size: u32) -> Result<Self, IcedError>

Creates a REP OUTSB instruction

Errors

Fails if address_size is not one of 16, 32, 64.

Arguments

address_size: 16, 32, or 64

[src]

pub fn with_outsw(
 address_size: u32,
 segment_prefix: Register,
 rep_prefix: RepPrefixKind
) -> Result<Self, IcedError>

Creates a OUTSW instruction

Errors

Fails if address_size is not one of 16, 32, 64.

Arguments

address_size: 16, 32, or 64
segment_prefix: Segment override or Register::None
rep_prefix: Rep prefix or RepPrefixKind::None

[src]

pub fn with_rep_outsw(address_size: u32) -> Result<Self, IcedError>

Creates a REP OUTSW instruction

Errors

Fails if address_size is not one of 16, 32, 64.

Arguments

address_size: 16, 32, or 64

[src]

pub fn with_outsd(
 address_size: u32,
 segment_prefix: Register,
 rep_prefix: RepPrefixKind
) -> Result<Self, IcedError>

Creates a OUTSD instruction

Errors

Fails if address_size is not one of 16, 32, 64.

Arguments

address_size: 16, 32, or 64
segment_prefix: Segment override or Register::None
rep_prefix: Rep prefix or RepPrefixKind::None

[src]

pub fn with_rep_outsd(address_size: u32) -> Result<Self, IcedError>

Creates a REP OUTSD instruction

Errors

Fails if address_size is not one of 16, 32, 64.

Arguments

address_size: 16, 32, or 64

[src]

pub fn with_lodsb(
 address_size: u32,
 segment_prefix: Register,
 rep_prefix: RepPrefixKind
) -> Result<Self, IcedError>

Creates a LODSB instruction

Errors

Fails if address_size is not one of 16, 32, 64.

Arguments

address_size: 16, 32, or 64
segment_prefix: Segment override or Register::None
rep_prefix: Rep prefix or RepPrefixKind::None

[src]

pub fn with_rep_lodsb(address_size: u32) -> Result<Self, IcedError>

Creates a REP LODSB instruction

Errors

Fails if address_size is not one of 16, 32, 64.

Arguments

address_size: 16, 32, or 64

[src]

pub fn with_lodsw(
 address_size: u32,
 segment_prefix: Register,
 rep_prefix: RepPrefixKind
) -> Result<Self, IcedError>

Creates a LODSW instruction

Errors

Fails if address_size is not one of 16, 32, 64.

Arguments

address_size: 16, 32, or 64
segment_prefix: Segment override or Register::None
rep_prefix: Rep prefix or RepPrefixKind::None

[src]

pub fn with_rep_lodsw(address_size: u32) -> Result<Self, IcedError>

Creates a REP LODSW instruction

Errors

Fails if address_size is not one of 16, 32, 64.

Arguments

address_size: 16, 32, or 64

[src]

pub fn with_lodsd(
 address_size: u32,
 segment_prefix: Register,
 rep_prefix: RepPrefixKind
) -> Result<Self, IcedError>

Creates a LODSD instruction

Errors

Fails if address_size is not one of 16, 32, 64.

Arguments

address_size: 16, 32, or 64
segment_prefix: Segment override or Register::None
rep_prefix: Rep prefix or RepPrefixKind::None

[src]

pub fn with_rep_lodsd(address_size: u32) -> Result<Self, IcedError>

Creates a REP LODSD instruction

Errors

Fails if address_size is not one of 16, 32, 64.

Arguments

address_size: 16, 32, or 64

[src]

pub fn with_lodsq(
 address_size: u32,
 segment_prefix: Register,
 rep_prefix: RepPrefixKind
) -> Result<Self, IcedError>

Creates a LODSQ instruction

Errors

Fails if address_size is not one of 16, 32, 64.

Arguments

address_size: 16, 32, or 64
segment_prefix: Segment override or Register::None
rep_prefix: Rep prefix or RepPrefixKind::None

[src]

pub fn with_rep_lodsq(address_size: u32) -> Result<Self, IcedError>

Creates a REP LODSQ instruction

Errors

Fails if address_size is not one of 16, 32, 64.

Arguments

address_size: 16, 32, or 64

[src]

pub fn with_scasb(
address_size: u32,
rep_prefix: RepPrefixKind
) -> Result<Self, IcedError>

Creates a SCASB instruction

Errors

Fails if address_size is not one of 16, 32, 64.

Arguments

address_size: 16, 32, or 64
rep_prefix: Rep prefix or RepPrefixKind::None

[src]

pub fn with_repe_scasb(address_size: u32) -> Result<Self, IcedError>

Creates a REPE SCASB instruction

Errors

Fails if address_size is not one of 16, 32, 64.

Arguments

address_size: 16, 32, or 64

[src]

pub fn with_repne_scasb(address_size: u32) -> Result<Self, IcedError>

Creates a REPNE SCASB instruction

Errors

Fails if address_size is not one of 16, 32, 64.

Arguments

address_size: 16, 32, or 64

[src]

pub fn with_scasw(
address_size: u32,
rep_prefix: RepPrefixKind
) -> Result<Self, IcedError>

Creates a SCASW instruction

Errors

Fails if address_size is not one of 16, 32, 64.

Arguments

address_size: 16, 32, or 64
rep_prefix: Rep prefix or RepPrefixKind::None

[src]

pub fn with_repe_scasw(address_size: u32) -> Result<Self, IcedError>

Creates a REPE SCASW instruction

Errors

Fails if address_size is not one of 16, 32, 64.

Arguments

address_size: 16, 32, or 64

[src]

pub fn with_repne_scasw(address_size: u32) -> Result<Self, IcedError>

Creates a REPNE SCASW instruction

Errors

Fails if address_size is not one of 16, 32, 64.

Arguments

address_size: 16, 32, or 64

[src]

pub fn with_scasd(
address_size: u32,
rep_prefix: RepPrefixKind
) -> Result<Self, IcedError>

Creates a SCASD instruction

Errors

Fails if address_size is not one of 16, 32, 64.

Arguments

address_size: 16, 32, or 64
rep_prefix: Rep prefix or RepPrefixKind::None

[src]

pub fn with_repe_scasd(address_size: u32) -> Result<Self, IcedError>

Creates a REPE SCASD instruction

Errors

Fails if address_size is not one of 16, 32, 64.

Arguments

address_size: 16, 32, or 64

[src]

pub fn with_repne_scasd(address_size: u32) -> Result<Self, IcedError>

Creates a REPNE SCASD instruction

Errors

Fails if address_size is not one of 16, 32, 64.

Arguments

address_size: 16, 32, or 64

[src]

pub fn with_scasq(
address_size: u32,
rep_prefix: RepPrefixKind
) -> Result<Self, IcedError>

Creates a SCASQ instruction

Errors

Fails if address_size is not one of 16, 32, 64.

Arguments

address_size: 16, 32, or 64
rep_prefix: Rep prefix or RepPrefixKind::None

[src]

pub fn with_repe_scasq(address_size: u32) -> Result<Self, IcedError>

Creates a REPE SCASQ instruction

Errors

Fails if address_size is not one of 16, 32, 64.

Arguments

address_size: 16, 32, or 64

[src]

pub fn with_repne_scasq(address_size: u32) -> Result<Self, IcedError>

Creates a REPNE SCASQ instruction

Errors

Fails if address_size is not one of 16, 32, 64.

Arguments

address_size: 16, 32, or 64

[src]

pub fn with_insb(
address_size: u32,
rep_prefix: RepPrefixKind
) -> Result<Self, IcedError>

Creates a INSB instruction

Errors

Fails if address_size is not one of 16, 32, 64.

Arguments

address_size: 16, 32, or 64
rep_prefix: Rep prefix or RepPrefixKind::None

[src]

pub fn with_rep_insb(address_size: u32) -> Result<Self, IcedError>

Creates a REP INSB instruction

Errors

Fails if address_size is not one of 16, 32, 64.

Arguments

address_size: 16, 32, or 64

[src]

pub fn with_insw(
address_size: u32,
rep_prefix: RepPrefixKind
) -> Result<Self, IcedError>

Creates a INSW instruction

Errors

Fails if address_size is not one of 16, 32, 64.

Arguments

address_size: 16, 32, or 64
rep_prefix: Rep prefix or RepPrefixKind::None

[src]

pub fn with_rep_insw(address_size: u32) -> Result<Self, IcedError>

Creates a REP INSW instruction

Errors

Fails if address_size is not one of 16, 32, 64.

Arguments

address_size: 16, 32, or 64

[src]

pub fn with_insd(
address_size: u32,
rep_prefix: RepPrefixKind
) -> Result<Self, IcedError>

Creates a INSD instruction

Errors

Fails if address_size is not one of 16, 32, 64.

Arguments

address_size: 16, 32, or 64
rep_prefix: Rep prefix or RepPrefixKind::None

[src]

pub fn with_rep_insd(address_size: u32) -> Result<Self, IcedError>

Creates a REP INSD instruction

Errors

Fails if address_size is not one of 16, 32, 64.

Arguments

address_size: 16, 32, or 64

[src]

pub fn with_stosb(
address_size: u32,
rep_prefix: RepPrefixKind
) -> Result<Self, IcedError>

Creates a STOSB instruction

Errors

Fails if address_size is not one of 16, 32, 64.

Arguments

address_size: 16, 32, or 64
rep_prefix: Rep prefix or RepPrefixKind::None

[src]

pub fn with_rep_stosb(address_size: u32) -> Result<Self, IcedError>

Creates a REP STOSB instruction

Errors

Fails if address_size is not one of 16, 32, 64.

Arguments

address_size: 16, 32, or 64

[src]

pub fn with_stosw(
address_size: u32,
rep_prefix: RepPrefixKind
) -> Result<Self, IcedError>

Creates a STOSW instruction

Errors

Fails if address_size is not one of 16, 32, 64.

Arguments

address_size: 16, 32, or 64
rep_prefix: Rep prefix or RepPrefixKind::None

[src]

pub fn with_rep_stosw(address_size: u32) -> Result<Self, IcedError>

Creates a REP STOSW instruction

Errors

Fails if address_size is not one of 16, 32, 64.

Arguments

address_size: 16, 32, or 64

[src]

pub fn with_stosd(
address_size: u32,
rep_prefix: RepPrefixKind
) -> Result<Self, IcedError>

Creates a STOSD instruction

Errors

Fails if address_size is not one of 16, 32, 64.

Arguments

address_size: 16, 32, or 64
rep_prefix: Rep prefix or RepPrefixKind::None

[src]

pub fn with_rep_stosd(address_size: u32) -> Result<Self, IcedError>

Creates a REP STOSD instruction

Errors

Fails if address_size is not one of 16, 32, 64.

Arguments

address_size: 16, 32, or 64

[src]

pub fn with_stosq(
address_size: u32,
rep_prefix: RepPrefixKind
) -> Result<Self, IcedError>

Creates a STOSQ instruction

Errors

Fails if address_size is not one of 16, 32, 64.

Arguments

address_size: 16, 32, or 64
rep_prefix: Rep prefix or RepPrefixKind::None

[src]

pub fn with_rep_stosq(address_size: u32) -> Result<Self, IcedError>

Creates a REP STOSQ instruction

Errors

Fails if address_size is not one of 16, 32, 64.

Arguments

address_size: 16, 32, or 64

[src]

pub fn with_cmpsb(
 address_size: u32,
 segment_prefix: Register,
 rep_prefix: RepPrefixKind
) -> Result<Self, IcedError>

Creates a CMPSB instruction

Errors

Fails if address_size is not one of 16, 32, 64.

Arguments

address_size: 16, 32, or 64
segment_prefix: Segment override or Register::None
rep_prefix: Rep prefix or RepPrefixKind::None

[src]

pub fn with_repe_cmpsb(address_size: u32) -> Result<Self, IcedError>

Creates a REPE CMPSB instruction

Errors

Fails if address_size is not one of 16, 32, 64.

Arguments

address_size: 16, 32, or 64

[src]

pub fn with_repne_cmpsb(address_size: u32) -> Result<Self, IcedError>

Creates a REPNE CMPSB instruction

Errors

Fails if address_size is not one of 16, 32, 64.

Arguments

address_size: 16, 32, or 64

[src]

pub fn with_cmpsw(
 address_size: u32,
 segment_prefix: Register,
 rep_prefix: RepPrefixKind
) -> Result<Self, IcedError>

Creates a CMPSW instruction

Errors

Fails if address_size is not one of 16, 32, 64.

Arguments

address_size: 16, 32, or 64
segment_prefix: Segment override or Register::None
rep_prefix: Rep prefix or RepPrefixKind::None

[src]

pub fn with_repe_cmpsw(address_size: u32) -> Result<Self, IcedError>

Creates a REPE CMPSW instruction

Errors

Fails if address_size is not one of 16, 32, 64.

Arguments

address_size: 16, 32, or 64

[src]

pub fn with_repne_cmpsw(address_size: u32) -> Result<Self, IcedError>

Creates a REPNE CMPSW instruction

Errors

Fails if address_size is not one of 16, 32, 64.

Arguments

address_size: 16, 32, or 64

[src]

pub fn with_cmpsd(
 address_size: u32,
 segment_prefix: Register,
 rep_prefix: RepPrefixKind
) -> Result<Self, IcedError>

Creates a CMPSD instruction

Errors

Fails if address_size is not one of 16, 32, 64.

Arguments

address_size: 16, 32, or 64
segment_prefix: Segment override or Register::None
rep_prefix: Rep prefix or RepPrefixKind::None

[src]

pub fn with_repe_cmpsd(address_size: u32) -> Result<Self, IcedError>

Creates a REPE CMPSD instruction

Errors

Fails if address_size is not one of 16, 32, 64.

Arguments

address_size: 16, 32, or 64

[src]

pub fn with_repne_cmpsd(address_size: u32) -> Result<Self, IcedError>

Creates a REPNE CMPSD instruction

Errors

Fails if address_size is not one of 16, 32, 64.

Arguments

address_size: 16, 32, or 64

[src]

pub fn with_cmpsq(
 address_size: u32,
 segment_prefix: Register,
 rep_prefix: RepPrefixKind
) -> Result<Self, IcedError>

Creates a CMPSQ instruction

Errors

Fails if address_size is not one of 16, 32, 64.

Arguments

address_size: 16, 32, or 64
segment_prefix: Segment override or Register::None
rep_prefix: Rep prefix or RepPrefixKind::None

[src]

pub fn with_repe_cmpsq(address_size: u32) -> Result<Self, IcedError>

Creates a REPE CMPSQ instruction

Errors

Fails if address_size is not one of 16, 32, 64.

Arguments

address_size: 16, 32, or 64

[src]

pub fn with_repne_cmpsq(address_size: u32) -> Result<Self, IcedError>

Creates a REPNE CMPSQ instruction

Errors

Fails if address_size is not one of 16, 32, 64.

Arguments

address_size: 16, 32, or 64

[src]

pub fn with_movsb(
 address_size: u32,
 segment_prefix: Register,
 rep_prefix: RepPrefixKind
) -> Result<Self, IcedError>

Creates a MOVSB instruction

Errors

Fails if address_size is not one of 16, 32, 64.

Arguments

address_size: 16, 32, or 64
segment_prefix: Segment override or Register::None
rep_prefix: Rep prefix or RepPrefixKind::None

[src]

pub fn with_rep_movsb(address_size: u32) -> Result<Self, IcedError>

Creates a REP MOVSB instruction

Errors

Fails if address_size is not one of 16, 32, 64.

Arguments

address_size: 16, 32, or 64

[src]

pub fn with_movsw(
 address_size: u32,
 segment_prefix: Register,
 rep_prefix: RepPrefixKind
) -> Result<Self, IcedError>

Creates a MOVSW instruction

Errors

Fails if address_size is not one of 16, 32, 64.

Arguments

address_size: 16, 32, or 64
segment_prefix: Segment override or Register::None
rep_prefix: Rep prefix or RepPrefixKind::None

[src]

pub fn with_rep_movsw(address_size: u32) -> Result<Self, IcedError>

Creates a REP MOVSW instruction

Errors

Fails if address_size is not one of 16, 32, 64.

Arguments

address_size: 16, 32, or 64

[src]

pub fn with_movsd(
 address_size: u32,
 segment_prefix: Register,
 rep_prefix: RepPrefixKind
) -> Result<Self, IcedError>

Creates a MOVSD instruction

Errors

Fails if address_size is not one of 16, 32, 64.

Arguments

address_size: 16, 32, or 64
segment_prefix: Segment override or Register::None
rep_prefix: Rep prefix or RepPrefixKind::None

[src]

pub fn with_rep_movsd(address_size: u32) -> Result<Self, IcedError>

Creates a REP MOVSD instruction

Errors

Fails if address_size is not one of 16, 32, 64.

Arguments

address_size: 16, 32, or 64

[src]

pub fn with_movsq(
 address_size: u32,
 segment_prefix: Register,
 rep_prefix: RepPrefixKind
) -> Result<Self, IcedError>

Creates a MOVSQ instruction

Errors

Fails if address_size is not one of 16, 32, 64.

Arguments

address_size: 16, 32, or 64
segment_prefix: Segment override or Register::None
rep_prefix: Rep prefix or RepPrefixKind::None

[src]

pub fn with_rep_movsq(address_size: u32) -> Result<Self, IcedError>

Creates a REP MOVSQ instruction

Errors

Fails if address_size is not one of 16, 32, 64.

Arguments

address_size: 16, 32, or 64

[src]

pub fn with_maskmovq(
 address_size: u32,
 register1: Register,
 register2: Register,
 segment_prefix: Register
) -> Result<Self, IcedError>

Creates a MASKMOVQ instruction

Errors

Fails if address_size is not one of 16, 32, 64.

Arguments

address_size: 16, 32, or 64
register1: Register
register2: Register
segment_prefix: Segment override or Register::None

[src]

pub fn with_maskmovdqu(
 address_size: u32,
 register1: Register,
 register2: Register,
 segment_prefix: Register
) -> Result<Self, IcedError>

Creates a MASKMOVDQU instruction

Errors

Fails if address_size is not one of 16, 32, 64.

Arguments

address_size: 16, 32, or 64
register1: Register
register2: Register
segment_prefix: Segment override or Register::None

[src]

pub fn with_vmaskmovdqu(
 address_size: u32,
 register1: Register,
 register2: Register,
 segment_prefix: Register
) -> Result<Self, IcedError>

Creates a VMASKMOVDQU instruction

Errors

Fails if address_size is not one of 16, 32, 64.

Arguments

address_size: 16, 32, or 64
register1: Register
register2: Register
segment_prefix: Segment override or Register::None

[src]

pub fn with_declare_byte_1(b0: u8) -> Self

Creates a db/.byte asm directive

Arguments

b0: Byte 0

[src]

pub fn with_declare_byte_2(b0: u8, b1: u8) -> Self

Creates a db/.byte asm directive

Arguments

b0: Byte 0
b1: Byte 1

[src]

pub fn with_declare_byte_3(b0: u8, b1: u8, b2: u8) -> Self

Creates a db/.byte asm directive

Arguments

b0: Byte 0
b1: Byte 1
b2: Byte 2

[src]

pub fn with_declare_byte_4(b0: u8, b1: u8, b2: u8, b3: u8) -> Self

Creates a db/.byte asm directive

Arguments

b0: Byte 0
b1: Byte 1
b2: Byte 2
b3: Byte 3

[src]

pub fn with_declare_byte_5(b0: u8, b1: u8, b2: u8, b3: u8, b4: u8) -> Self

Creates a db/.byte asm directive

Arguments

b0: Byte 0
b1: Byte 1
b2: Byte 2
b3: Byte 3
b4: Byte 4

[src]

pub fn with_declare_byte_6(
    b0: u8,
    b1: u8,
    b2: u8,
    b3: u8,
    b4: u8,
    b5: u8
) -> Self

Creates a db/.byte asm directive

Arguments

b0: Byte 0
b1: Byte 1
b2: Byte 2
b3: Byte 3
b4: Byte 4
b5: Byte 5

[src]

pub fn with_declare_byte_7(
    b0: u8,
    b1: u8,
    b2: u8,
    b3: u8,
    b4: u8,
    b5: u8,
    b6: u8
) -> Self

Creates a db/.byte asm directive

Arguments

b0: Byte 0
b1: Byte 1
b2: Byte 2
b3: Byte 3
b4: Byte 4
b5: Byte 5
b6: Byte 6

[src]

pub fn with_declare_byte_8(
    b0: u8,
    b1: u8,
    b2: u8,
    b3: u8,
    b4: u8,
    b5: u8,
    b6: u8,
    b7: u8
) -> Self

Creates a db/.byte asm directive

Arguments

b0: Byte 0
b1: Byte 1
b2: Byte 2
b3: Byte 3
b4: Byte 4
b5: Byte 5
b6: Byte 6
b7: Byte 7

[src]

pub fn with_declare_byte_9(
    b0: u8,
    b1: u8,
    b2: u8,
    b3: u8,
    b4: u8,
    b5: u8,
    b6: u8,
    b7: u8,
    b8: u8
) -> Self

Creates a db/.byte asm directive

Arguments

b0: Byte 0
b1: Byte 1
b2: Byte 2
b3: Byte 3
b4: Byte 4
b5: Byte 5
b6: Byte 6
b7: Byte 7
b8: Byte 8

[src]

pub fn with_declare_byte_10(
    b0: u8,
    b1: u8,
    b2: u8,
    b3: u8,
    b4: u8,
    b5: u8,
    b6: u8,
    b7: u8,
    b8: u8,
    b9: u8
) -> Self

Creates a db/.byte asm directive

Arguments

b0: Byte 0
b1: Byte 1
b2: Byte 2
b3: Byte 3
b4: Byte 4
b5: Byte 5
b6: Byte 6
b7: Byte 7
b8: Byte 8
b9: Byte 9

[src]

pub fn with_declare_byte_11(
    b0: u8,
    b1: u8,
    b2: u8,
    b3: u8,
    b4: u8,
    b5: u8,
    b6: u8,
    b7: u8,
    b8: u8,
    b9: u8,
    b10: u8
) -> Self

Creates a db/.byte asm directive

Arguments

b0: Byte 0
b1: Byte 1
b2: Byte 2
b3: Byte 3
b4: Byte 4
b5: Byte 5
b6: Byte 6
b7: Byte 7
b8: Byte 8
b9: Byte 9
b10: Byte 10

[src]

pub fn with_declare_byte_12(
    b0: u8,
    b1: u8,
    b2: u8,
    b3: u8,
    b4: u8,
    b5: u8,
    b6: u8,
    b7: u8,
    b8: u8,
    b9: u8,
    b10: u8,
    b11: u8
) -> Self

Creates a db/.byte asm directive

Arguments

b0: Byte 0
b1: Byte 1
b2: Byte 2
b3: Byte 3
b4: Byte 4
b5: Byte 5
b6: Byte 6
b7: Byte 7
b8: Byte 8
b9: Byte 9
b10: Byte 10
b11: Byte 11

[src]

pub fn with_declare_byte_13(
    b0: u8,
    b1: u8,
    b2: u8,
    b3: u8,
    b4: u8,
    b5: u8,
    b6: u8,
    b7: u8,
    b8: u8,
    b9: u8,
    b10: u8,
    b11: u8,
    b12: u8
) -> Self

Creates a db/.byte asm directive

Arguments

b0: Byte 0
b1: Byte 1
b2: Byte 2
b3: Byte 3
b4: Byte 4
b5: Byte 5
b6: Byte 6
b7: Byte 7
b8: Byte 8
b9: Byte 9
b10: Byte 10
b11: Byte 11
b12: Byte 12

[src]

pub fn with_declare_byte_14(
    b0: u8,
    b1: u8,
    b2: u8,
    b3: u8,
    b4: u8,
    b5: u8,
    b6: u8,
    b7: u8,
    b8: u8,
    b9: u8,
    b10: u8,
    b11: u8,
    b12: u8,
    b13: u8
) -> Self

Creates a db/.byte asm directive

Arguments

b0: Byte 0
b1: Byte 1
b2: Byte 2
b3: Byte 3
b4: Byte 4
b5: Byte 5
b6: Byte 6
b7: Byte 7
b8: Byte 8
b9: Byte 9
b10: Byte 10
b11: Byte 11
b12: Byte 12
b13: Byte 13

[src]

pub fn with_declare_byte_15(
    b0: u8,
    b1: u8,
    b2: u8,
    b3: u8,
    b4: u8,
    b5: u8,
    b6: u8,
    b7: u8,
    b8: u8,
    b9: u8,
    b10: u8,
    b11: u8,
    b12: u8,
    b13: u8,
    b14: u8
) -> Self

Creates a db/.byte asm directive

Arguments

b0: Byte 0
b1: Byte 1
b2: Byte 2
b3: Byte 3
b4: Byte 4
b5: Byte 5
b6: Byte 6
b7: Byte 7
b8: Byte 8
b9: Byte 9
b10: Byte 10
b11: Byte 11
b12: Byte 12
b13: Byte 13
b14: Byte 14

[src]

pub fn with_declare_byte_16(
    b0: u8,
    b1: u8,
    b2: u8,
    b3: u8,
    b4: u8,
    b5: u8,
    b6: u8,
    b7: u8,
    b8: u8,
    b9: u8,
    b10: u8,
    b11: u8,
    b12: u8,
    b13: u8,
    b14: u8,
    b15: u8
) -> Self

Creates a db/.byte asm directive

Arguments

b0: Byte 0
b1: Byte 1
b2: Byte 2
b3: Byte 3
b4: Byte 4
b5: Byte 5
b6: Byte 6
b7: Byte 7
b8: Byte 8
b9: Byte 9
b10: Byte 10
b11: Byte 11
b12: Byte 12
b13: Byte 13
b14: Byte 14
b15: Byte 15

[src]

pub fn with_declare_byte(data: &[u8 ]) -> Result<Self, IcedError>

Creates a db/.byte asm directive

Errors

Fails if data.len() is not 1-16

Arguments

data: Data

[src]

pub fn with_declare_word_1(w0: u16) -> Self

Creates a dw/.word asm directive

Arguments

w0: Word 0

[src]

pub fn with_declare_word_2(w0: u16, w1: u16) -> Self

Creates a dw/.word asm directive

Arguments

w0: Word 0
w1: Word 1

[src]

pub fn with_declare_word_3(w0: u16, w1: u16, w2: u16) -> Self

Creates a dw/.word asm directive

Arguments

w0: Word 0
w1: Word 1
w2: Word 2

[src]

pub fn with_declare_word_4(w0: u16, w1: u16, w2: u16, w3: u16) -> Self

Creates a dw/.word asm directive

Arguments

w0: Word 0
w1: Word 1
w2: Word 2
w3: Word 3

[src]

pub fn with_declare_word_5(w0: u16, w1: u16, w2: u16, w3: u16, w4: u16) -> Self

Creates a dw/.word asm directive

Arguments

w0: Word 0
w1: Word 1
w2: Word 2
w3: Word 3
w4: Word 4

[src]

pub fn with_declare_word_6(
    w0: u16,
    w1: u16,
    w2: u16,
    w3: u16,
    w4: u16,
    w5: u16
) -> Self

Creates a dw/.word asm directive

Arguments

w0: Word 0
w1: Word 1
w2: Word 2
w3: Word 3
w4: Word 4
w5: Word 5

[src]

pub fn with_declare_word_7(
    w0: u16,
    w1: u16,
    w2: u16,
    w3: u16,
    w4: u16,
    w5: u16,
    w6: u16
) -> Self

Creates a dw/.word asm directive

Arguments

w0: Word 0
w1: Word 1
w2: Word 2
w3: Word 3
w4: Word 4
w5: Word 5
w6: Word 6

[src]

pub fn with_declare_word_8(
    w0: u16,
    w1: u16,
    w2: u16,
    w3: u16,
    w4: u16,
    w5: u16,
    w6: u16,
    w7: u16
) -> Self

Creates a dw/.word asm directive

Arguments

w0: Word 0
w1: Word 1
w2: Word 2
w3: Word 3
w4: Word 4
w5: Word 5
w6: Word 6
w7: Word 7

[src]

pub fn with_declare_word_slice_u8(data: &[u8 ]) -> Result<Self, IcedError>

Creates a dw/.word asm directive

Errors

Fails if data.len() is not 2-16 or not a multiple of 2

Arguments

data: Data

[src]

pub fn with_declare_word(data: &[u16 ]) -> Result<Self, IcedError>

Creates a dw/.word asm directive

Errors

Fails if data.len() is not 1-8

Arguments

data: Data

[src]

pub fn with_declare_dword_1(d0: u32) -> Self

Creates a dd/.int asm directive

Arguments

d0: Dword 0

[src]

pub fn with_declare_dword_2(d0: u32, d1: u32) -> Self

Creates a dd/.int asm directive

Arguments

d0: Dword 0
d1: Dword 1

[src]

pub fn with_declare_dword_3(d0: u32, d1: u32, d2: u32) -> Self

Creates a dd/.int asm directive

Arguments

d0: Dword 0
d1: Dword 1
d2: Dword 2

[src]

pub fn with_declare_dword_4(d0: u32, d1: u32, d2: u32, d3: u32) -> Self

Creates a dd/.int asm directive

Arguments

d0: Dword 0
d1: Dword 1
d2: Dword 2
d3: Dword 3

[src]

pub fn with_declare_dword_slice_u8(data: &[u8 ]) -> Result<Self, IcedError>

Creates a dd/.int asm directive

Errors

Fails if data.len() is not 4-16 or not a multiple of 4

Arguments

data: Data

[src]

pub fn with_declare_dword(data: &[u32 ]) -> Result<Self, IcedError>

Creates a dd/.int asm directive

Errors

Fails if data.len() is not 1-4

Arguments

data: Data

[src]

pub fn with_declare_qword_1(q0: u64) -> Self

Creates a dq/.quad asm directive

Arguments

q0: Qword 0

[src]

pub fn with_declare_qword_2(q0: u64, q1: u64) -> Self

Creates a dq/.quad asm directive

Arguments

q0: Qword 0
q1: Qword 1

[src]

pub fn with_declare_qword_slice_u8(data: &[u8 ]) -> Result<Self, IcedError>

Creates a dq/.quad asm directive

Errors

Fails if data.len() is not 8-16 or not a multiple of 8

Arguments

data: Data

[src]

pub fn with_declare_qword(data: &[u64 ]) -> Result<Self, IcedError>

Creates a dq/.quad asm directive

Errors

Fails if data.len() is not 1-2

Arguments

data: Data

Trait Implementations

[src]

impl Clone for Instruction

[src]

fn clone(&self) -> Instruction

Returns a copy of the value. Read more

1.0.0[src]

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source. Read more

[src]

impl Debug for Instruction

[src]

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter. Read more

[src]

impl Default for Instruction

[src]

fn default() -> Instruction

Returns the “default value” for a type. Read more

[src]

impl<'de> Deserialize<'de> for Instruction

[src]

fn deserialize<D>(deserializer: D) -> Result<Self, D::Error> where
D: Deserializer<'de>,

Deserialize this value from the given Serde deserializer. Read more

[src]

impl Display for Instruction

[src]

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter. Read more

[src]

impl Hash for Instruction

[src]

fn hash<H: Hasher>(&self, state: &mut H)

Feeds this value into the given Hasher. Read more

1.3.0[src]

fn hash_slice<H>(data: &[Self], state: &mut H) where
H: Hasher,

Feeds a slice of this type into the given Hasher. Read more

[src]

impl PartialEq<Instruction> for Instruction

[src]

fn eq(&self, other: &Self) -> bool

This method tests for self and other values to be equal, and is used by ==. Read more

1.0.0[src]

fn ne(&self, other: &Rhs) -> bool

This method tests for !=.

[src]

impl Serialize for Instruction

[src]

fn serialize<S>(&self, serializer: S) -> Result<S::Ok, S::Error> where
S: Serializer,

Serialize this value into the given Serde serializer. Read more

[src]

impl Copy for Instruction

[src]

impl Eq for Instruction

Auto Trait Implementations

impl RefUnwindSafe for Instruction

impl Send for Instruction

impl Sync for Instruction

impl Unpin for Instruction

impl UnwindSafe for Instruction

Blanket Implementations

[src]

impl<T> Any for T where
T: 'static + ?Sized,

[src]

pub fn type_id(&self) -> TypeId

Gets the TypeId of self. Read more

[src]

impl<T> Borrow<T> for T where
T: ?Sized,

[src]

pub fn borrow(&self) -> &T

Immutably borrows from an owned value. Read more

[src]

impl<T> BorrowMut<T> for T where
T: ?Sized,

[src]

pub fn borrow_mut(&mut self) -> &mut T

Mutably borrows from an owned value. Read more

[src]

impl<T> From<T> for T

[src]

pub fn from(t: T) -> T

Performs the conversion.

[src]

impl<T, U> Into for T where
U: From<T>,

[src]

pub fn into(self) -> U

Performs the conversion.

[src]

impl<T> ToOwned for T where
T: Clone,

type Owned = T

The resulting type after obtaining ownership.

[src]

pub fn to_owned(&self) -> T

Creates owned data from borrowed data, usually by cloning. Read more

[src]

pub fn clone_into(&self, target: &mut T)

🔬 This is a nightly-only experimental API. (toowned_clone_into)

recently added

Uses borrowed data to replace owned data, usually by cloning. Read more

[src]

impl<T> ToString for T where
T: Display + ?Sized,

[src]

pub default fn to_string(&self) -> String

Converts the given value to a String. Read more

[src]

impl<T, U> TryFrom for T where
U: Into<T>,

type Error = Infallible

The type returned in the event of a conversion error.

[src]

pub fn try_from(value: U) -> Result<T, <T as TryFrom>::Error>

Performs the conversion.

[src]

impl<T, U> TryInto for T where
U: TryFrom<T>,

type Error = >::Error

The type returned in the event of a conversion error.

[src]

pub fn try_into(self) -> Result<U, >::Error>

Performs the conversion.

[src]

Struct iced_x86::Instruction[−][src]

Implementations

impl Instruction

pub fn new() -> Self

pub fn eq_all_bits(&self, other: &Self) -> bool

pub fn ip16(&self) -> u16

pub fn set_ip16(&mut self, new_value: u16)

pub fn ip32(&self) -> u32

pub fn set_ip32(&mut self, new_value: u32)

pub fn ip(&self) -> u64

pub fn set_ip(&mut self, new_value: u64)

pub fn next_ip16(&self) -> u16

pub fn set_next_ip16(&mut self, new_value: u16)

pub fn next_ip32(&self) -> u32

pub fn set_next_ip32(&mut self, new_value: u32)

pub fn next_ip(&self) -> u64

pub fn set_next_ip(&mut self, new_value: u64)

pub fn code_size(&self) -> CodeSize

pub fn set_code_size(&mut self, new_value: CodeSize)

pub fn is_invalid(&self) -> bool

pub fn code(&self) -> Code

pub fn set_code(&mut self, new_value: Code)

pub fn mnemonic(&self) -> Mnemonic

pub fn op_count(&self) -> u32

pub fn len(&self) -> usize

pub fn set_len(&mut self, new_value: usize)

pub fn has_xacquire_prefix(&self) -> bool

pub fn set_has_xacquire_prefix(&mut self, new_value: bool)

pub fn has_xrelease_prefix(&self) -> bool

pub fn set_has_xrelease_prefix(&mut self, new_value: bool)

pub fn has_rep_prefix(&self) -> bool

pub fn set_has_rep_prefix(&mut self, new_value: bool)

pub fn has_repe_prefix(&self) -> bool

pub fn set_has_repe_prefix(&mut self, new_value: bool)

pub fn has_repne_prefix(&self) -> bool

pub fn set_has_repne_prefix(&mut self, new_value: bool)

pub fn has_lock_prefix(&self) -> bool

pub fn set_has_lock_prefix(&mut self, new_value: bool)

pub fn op0_kind(&self) -> OpKind

pub fn set_op0_kind(&mut self, new_value: OpKind)

pub fn op1_kind(&self) -> OpKind

pub fn set_op1_kind(&mut self, new_value: OpKind)

pub fn op2_kind(&self) -> OpKind

pub fn set_op2_kind(&mut self, new_value: OpKind)

pub fn op3_kind(&self) -> OpKind

pub fn set_op3_kind(&mut self, new_value: OpKind)

pub fn op4_kind(&self) -> OpKind

pub fn set_op4_kind(&mut self, new_value: OpKind)

pub fn op_kinds( &self) -> impl Iterator<Item = OpKind> + ExactSizeIterator + FusedIterator

pub fn op_kind(&self, operand: u32) -> OpKind

pub fn set_op_kind(&mut self, operand: u32, op_kind: OpKind)

pub fn has_segment_prefix(&self) -> bool

pub fn segment_prefix(&self) -> Register

pub fn set_segment_prefix(&mut self, new_value: Register)

pub fn memory_segment(&self) -> Register

pub fn memory_displ_size(&self) -> u32

pub fn set_memory_displ_size(&mut self, new_value: u32)

pub fn is_broadcast(&self) -> bool

pub fn set_is_broadcast(&mut self, new_value: bool)

pub fn is_mvex_eviction_hint(&self) -> bool

pub fn set_is_mvex_eviction_hint(&mut self, new_value: bool)

pub fn mvex_reg_mem_conv(&self) -> MvexRegMemConv

pub fn set_mvex_reg_mem_conv(&mut self, new_value: MvexRegMemConv)

pub fn memory_size(&self) -> MemorySize

pub fn memory_index_scale(&self) -> u32

pub fn set_memory_index_scale(&mut self, new_value: u32)

pub fn memory_displacement32(&self) -> u32

pub fn set_memory_displacement32(&mut self, new_value: u32)

pub fn memory_displacement64(&self) -> u64

pub fn set_memory_displacement64(&mut self, new_value: u64)

pub fn immediate(&self, operand: u32) -> u64

pub fn set_immediate_i32(&mut self, operand: u32, new_value: i32)

pub fn set_immediate_u32(&mut self, operand: u32, new_value: u32)

pub fn set_immediate_i64(&mut self, operand: u32, new_value: i64)

pub fn set_immediate_u64(&mut self, operand: u32, new_value: u64)

pub fn immediate8(&self) -> u8

pub fn set_immediate8(&mut self, new_value: u8)

pub fn immediate8_2nd(&self) -> u8

pub fn set_immediate8_2nd(&mut self, new_value: u8)

pub fn immediate16(&self) -> u16

pub fn op_kinds(
&self
) -> impl Iterator<Item = OpKind> + ExactSizeIterator + FusedIterator