1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303 304 305 306 307 308 309 310 311 312 313 314 315 316 317 318 319 320 321 322 323 324 325 326 327 328 329 330 331 332 333 334 335 336 337 338 339 340 341 342 343 344 345 346 347 348 349 350 351
use crate::primitive::Primitive;
use crate::{array_default::ArrayIter, prelude::*};
use core::ops::{BitAnd, BitAndAssign};
#[allow(clippy::suspicious_op_assign_impl)]
impl<PRECISION: Precision + WordType<BITS>, const BITS: usize> BitAndAssign<Self>
for HyperLogLog<PRECISION, BITS>
{
#[inline(always)]
/// Computes intersection between HLL counters.
///
/// # Caveats
/// Please be advised that HLL are not designed to compute intersections such as the
/// one estimated by this operation. The resulting set will most likely be an overestimation of
/// the real intersection. Operate with caution.
///
/// # Implementation details
/// This operation is implemented by computing the minimum register-wise of the
/// two HLL counters. This results in an estimation of the intersection because
/// we obtain a new HLL counter that at most contain the elements present in both
/// HLL counters.
///
/// # Example
///
/// ```rust
/// # use hyperloglog_rs::prelude::*;
/// # use core::ops::BitAndAssign;
///
/// let mut hll = HyperLogLog::<Precision8, 6>::default();
/// hll.insert(1u8);
///
/// let mut hll2 = HyperLogLog::<Precision8, 6>::default();
/// hll2.insert(2u8);
///
/// hll.bitand_assign(hll2);
///
/// assert!(hll.estimate_cardinality() < 0.1, "The cardinality is {}, we were expecting 0.", hll.estimate_cardinality());
///
/// let mut hll = HyperLogLog::<Precision8, 6>::default();
/// hll.insert(1u8);
///
/// let mut hll2 = HyperLogLog::<Precision8, 6>::default();
/// hll2.insert(1u8);
///
/// hll.bitand_assign(hll2);
///
/// assert!(hll.estimate_cardinality() > 1.0 - 0.1, "The cardinality is {}, we were expecting 1.", hll.estimate_cardinality());
/// assert!(hll.estimate_cardinality() < 1.0 + 0.1, "The cardinality is {}, we were expecting 1.", hll.estimate_cardinality());
///
/// let mut hll3 = HyperLogLog::<Precision16, 6>::default();
/// hll3.insert(3u8);
/// hll3.insert(5u8);
///
/// let mut hll4 = HyperLogLog::<Precision16, 6>::default();
/// hll4.insert(5u8);
/// hll4.insert(6u8);
///
/// hll3.bitand_assign(hll4);
///
/// assert!(hll3.estimate_cardinality() > 1.0 - 0.1, "Expected a value equal to around 1, got {}", hll3.estimate_cardinality());
/// assert!(hll3.estimate_cardinality() < 1.0 + 0.1, "Expected a value equal to around 1, got {}", hll3.estimate_cardinality());
/// ```
fn bitand_assign(&mut self, rhs: Self) {
self.bitand_assign(&rhs)
}
}
#[allow(clippy::suspicious_op_assign_impl)]
impl<PRECISION: Precision + WordType<BITS>, const BITS: usize> BitAndAssign<&Self>
for HyperLogLog<PRECISION, BITS>
{
#[inline(always)]
/// Computes intersection between HLL counters.
///
/// # Caveats
/// Please be advised that HLL are not designed to compute intersections such as the
/// one estimated by this operation. The resulting set will most likely be an overestimation of
/// the real intersection. Operate with caution.
///
/// # Implementation details
/// This operation is implemented by computing the minimum register-wise of the
/// two HLL counters. This results in an estimation of the intersection because
/// we obtain a new HLL counter that at most contain the elements present in both
/// HLL counters.
///
/// # Example
///
/// ```rust
/// # use hyperloglog_rs::prelude::*;
/// # use core::ops::BitAndAssign;
///
/// let mut hll = HyperLogLog::<Precision8, 6>::default();
/// hll.insert(1u8);
///
/// let mut hll2 = HyperLogLog::<Precision8, 6>::default();
/// hll2.insert(2u8);
///
/// hll.bitand_assign(&hll2);
///
/// assert!(hll.estimate_cardinality() < 0.1, "The cardinality is {}, we were expecting 0.", hll.estimate_cardinality());
///
/// let mut hll = HyperLogLog::<Precision8, 6>::default();
/// hll.insert(1u8);
///
/// let mut hll2 = HyperLogLog::<Precision8, 6>::default();
/// hll2.insert(1u8);
///
/// hll.bitand_assign(&hll2);
///
/// assert!(hll.estimate_cardinality() > 1.0 - 0.1, "The cardinality is {}, we were expecting 1.", hll.estimate_cardinality());
/// assert!(hll.estimate_cardinality() < 1.0 + 0.1, "The cardinality is {}, we were expecting 1.", hll.estimate_cardinality());
///
/// let mut hll3 = HyperLogLog::<Precision16, 6>::default();
/// hll3.insert(3u8);
/// hll3.insert(5u8);
/// hll3.insert(6u8);
///
/// let mut hll4 = HyperLogLog::<Precision16, 6>::default();
/// hll4.insert(5u8);
/// hll4.insert(6u8);
///
/// hll3.bitand_assign(&hll4);
///
/// assert!(hll3.estimate_cardinality() > 2.0 - 0.1, "Expected a value equal to around 2, got {}", hll3.estimate_cardinality());
/// assert!(hll3.estimate_cardinality() < 2.0 + 0.1, "Expected a value equal to around 2, got {}", hll3.estimate_cardinality());
/// ```
///
/// Another example is that, if we allocate two example vectors which we will
/// use to populate both two sets and the two HyperLogLog counter. All elements
/// in the intersection of the two sets must also appear in the intersection of
/// the two HyperLogLog counters. Usually, the problem is that it may over-estimate
/// the cardinality of the intersection.
///
/// ```rust
/// # use hyperloglog_rs::prelude::*;
/// # use core::ops::BitAndAssign;
///
/// let first_vec: Vec<u64> = vec![1, 2, 3, 4, 4, 5, 6, 6, 7, 8];
/// let second_vec: Vec<u64> = vec![5, 6, 7, 8, 8, 9, 9, 10, 11, 11, 12];
///
/// let first_set = first_vec.iter().collect::<std::collections::HashSet<_>>();
/// let second_set = second_vec.iter().collect::<std::collections::HashSet<_>>();
///
/// let mut hll1 = HyperLogLog::<Precision8, 6>::default();
/// let mut hll2 = HyperLogLog::<Precision8, 6>::default();
///
/// for element in first_vec.iter() {
/// hll1.insert(element);
/// }
///
/// for element in second_vec.iter() {
/// hll2.insert(element);
/// }
///
/// let mut hll_intersection = hll1.clone();
/// hll_intersection &= &hll2;
///
/// let intersection = first_set.intersection(&second_set).collect::<std::collections::HashSet<_>>();
///
/// assert!(hll_intersection.estimate_cardinality() >= intersection.len() as f32 * 0.9 &&
/// hll_intersection.estimate_cardinality() <= intersection.len() as f32 * 1.1);
///
/// for element in intersection.iter() {
/// assert!(hll_intersection.may_contain(element));
/// }
///
/// ```
///
fn bitand_assign(&mut self, rhs: &Self) {
self.number_of_zero_registers = PRECISION::NumberOfZeros::ZERO;
for (left_word, mut right_word) in self
.words
.iter_elements_mut()
.zip(rhs.words.into_iter_elements())
{
let mut left_word_copy = *left_word;
for i in 0..Self::NUMBER_OF_REGISTERS_IN_WORD {
let mut left_register = left_word_copy & Self::LOWER_REGISTER_MASK;
let right_register = right_word & Self::LOWER_REGISTER_MASK;
left_register = (left_register).min(right_register);
*left_word &= !(Self::LOWER_REGISTER_MASK << (i * BITS));
*left_word |= left_register << (i * BITS);
self.number_of_zero_registers +=
PRECISION::NumberOfZeros::reverse((left_register == 0) as usize);
left_word_copy >>= BITS;
right_word >>= BITS;
}
}
self.number_of_zero_registers -= PRECISION::NumberOfZeros::reverse(Self::get_number_of_padding_registers());
}
}
impl<PRECISION: Precision + WordType<BITS>, const BITS: usize> BitAnd<Self>
for HyperLogLog<PRECISION, BITS>
{
type Output = Self;
#[inline(always)]
/// Computes the intersection between two HyperLogLog counters of the same precision and number of bits per register.
///
/// # Caveats
/// Please be advised that HLL are not designed to compute intersections such as the
/// one estimated by this operation. The resulting set will most likely be an overestimation of
/// the real intersection. Operate with caution.
///
/// # Implementation details
/// This operation is implemented by computing the minimum register-wise of the
/// two HLL counters. This results in an estimation of the intersection because
/// we obtain a new HLL counter that at most contain the elements present in both
/// HLL counters.
///
/// # Example
///
/// ```rust
/// # use hyperloglog_rs::prelude::*;
/// let mut hll1 = HyperLogLog::<Precision14, 5>::default();
/// hll1.insert(&1);
/// hll1.insert(&2);
///
/// let mut hll2 = HyperLogLog::<Precision14, 5>::default();
/// hll2.insert(&2);
/// hll2.insert(&3);
///
/// let hll_intersection = hll1 & hll2;
///
/// assert!(hll_intersection.estimate_cardinality() >= 1.0_f32 * 0.9 &&
/// hll_intersection.estimate_cardinality() <= 1.0_f32 * 1.1);
/// ```
///
/// Executing the intersection between a set and an empty set
/// should result in an empty set.
///
/// ```rust
/// # use hyperloglog_rs::prelude::*;
/// let mut hll1 = HyperLogLog::<Precision14, 5>::default();
/// hll1.insert(&1);
/// hll1.insert(&2);
///
/// let hll_intersection = hll1.clone() & HyperLogLog::<Precision14, 5>::default();
/// assert_eq!(
/// HyperLogLog::<Precision14, 5>::default(),
/// hll_intersection,
/// concat!(
/// "The cardinality of the intersection should ",
/// "be the same as the empty test."
/// )
/// );
/// ```
///
/// We can create the HLL counters from array from registers,
/// so to be able to check that everything works as expected.
///
/// ```rust
/// # use hyperloglog_rs::prelude::*;
///
/// let first_registers = [1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16];
/// let second_registers = [9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 19];
/// let expected = [9, 9, 9, 9, 9, 9, 9, 9, 9, 10, 11, 12, 13, 14, 15, 19];
///
/// let mut hll1 = HyperLogLog::<Precision4, 5>::from_registers(&first_registers);
/// let mut hll2 = HyperLogLog::<Precision4, 5>::from_registers(&second_registers);
/// let intersection = hll1 | hll2;
///
/// assert_eq!(intersection.get_registers(), expected, "The registers are not the expected ones, got {:?} instead of {:?}.", intersection.get_registers(), expected);
/// ```
///
fn bitand(mut self, rhs: Self) -> Self {
self.bitand_assign(rhs);
self
}
}
impl<PRECISION: Precision + WordType<BITS>, const BITS: usize> BitAnd<&Self>
for HyperLogLog<PRECISION, BITS>
{
type Output = Self;
#[inline(always)]
/// Computes the intersection between two HyperLogLog counters of the same precision and number of bits per register.
///
/// # Caveats
/// Please be advised that HLL are not designed to compute intersections such as the
/// one estimated by this operation. The resulting set will most likely be an overestimation of
/// the real intersection. Operate with caution.
///
/// # Implementation details
/// This operation is implemented by computing the minimum register-wise of the
/// two HLL counters. This results in an estimation of the intersection because
/// we obtain a new HLL counter that at most contain the elements present in both
/// HLL counters.
///
/// # Example
///
/// ```rust
/// # use hyperloglog_rs::prelude::*;
/// let mut hll1 = HyperLogLog::<Precision14, 5>::default();
/// hll1.insert(&1);
/// hll1.insert(&2);
///
/// let mut hll2 = HyperLogLog::<Precision14, 5>::default();
/// hll2.insert(&2);
/// hll2.insert(&3);
///
/// let hll_intersection = hll1 | hll2;
///
/// assert!(hll_intersection.estimate_cardinality() >= 3.0_f32 * 0.9 &&
/// hll_intersection.estimate_cardinality() <= 3.0_f32 * 1.1);
/// ```
///
/// Merging a set with an empty set should not change the cardinality.
///
/// ```rust
/// # use hyperloglog_rs::prelude::*;
/// let mut hll1 = HyperLogLog::<Precision14, 5>::default();
/// hll1.insert(&1);
/// hll1.insert(&2);
///
/// let hll_intersection = hll1.clone() | HyperLogLog::<Precision14, 5>::default();
/// assert_eq!(
/// hll_intersection,
/// hll1,
/// concat!(
/// "The cardinality of the intersection should ",
/// "be the same as the cardinality of the first set."
/// )
/// );
/// ```
///
/// We can create the HLL counters from array from registers,
/// so to be able to check that everything works as expected.
///
/// ```rust
/// # use hyperloglog_rs::prelude::*;
///
/// let first_registers = [1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16];
/// let second_registers = [9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 19];
/// let expected = [9, 9, 9, 9, 9, 9, 9, 9, 9, 10, 11, 12, 13, 14, 15, 19];
///
/// let mut hll1 = HyperLogLog::<Precision4, 5>::from_registers(&first_registers);
/// let mut hll2 = HyperLogLog::<Precision4, 5>::from_registers(&second_registers);
/// let intersection = hll1 | &hll2;
///
/// assert_eq!(intersection.get_registers(), expected, "The registers are not the expected ones, got {:?} instead of {:?}.", intersection.get_registers(), expected);
/// ```
///
fn bitand(mut self, rhs: &Self) -> Self {
self.bitand_assign(rhs);
self
}
}