hyperlight_common/arch/amd64/layout.rs
1/*
2Copyright 2025 The Hyperlight Authors.
3
4Licensed under the Apache License, Version 2.0 (the "License");
5you may not use this file except in compliance with the License.
6You may obtain a copy of the License at
7
8 http://www.apache.org/licenses/LICENSE-2.0
9
10Unless required by applicable law or agreed to in writing, software
11distributed under the License is distributed on an "AS IS" BASIS,
12WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13See the License for the specific language governing permissions and
14limitations under the License.
15 */
16
17// The addresses in this file should be coordinated with
18// src/hyperlight_guest/src/arch/amd64/layout.rs and
19// src/hyperlight_guest_bin/src/arch/amd64/layout.rs
20
21/// We have this the top of the page below the top of memory in order
22/// to make working with start/end ptrs in a few places more
23/// convenient (not needing to worry about overflow)
24pub const MAX_GVA: usize = 0xffff_ffff_ffff_efff;
25pub const SNAPSHOT_PT_GVA_MIN: usize = 0xffff_8000_0000_0000;
26pub const SNAPSHOT_PT_GVA_MAX: usize = 0xffff_80ff_ffff_ffff;
27
28/// We assume 36-bit IPAs for now, since every amd64 processor
29/// supports at least 36 bits. Almost all of them support at least 40
30/// bits, so we could consider bumping this in the future if we were
31/// ever memory-constrained.
32pub const MAX_GPA: usize = 0x0000_000f_ffff_ffff;
33
34/// On amd64, this is:
35/// - Two pages for the TSS and IDT
36/// - (up to) 4 pages for the PTEs for mapping that (including CoW'ing the root PT)
37/// - A page for the smallest possible non-exception stack
38/// - (up to) 3 pages for mapping that
39/// - Two pages for the exception stack and metadata
40/// - A page-aligned amount of memory for I/O buffers (for now)
41pub fn min_scratch_size(input_data_size: usize, output_data_size: usize) -> usize {
42 (input_data_size + output_data_size).next_multiple_of(crate::vmem::PAGE_SIZE)
43 + 12 * crate::vmem::PAGE_SIZE
44}