[−][src]Struct ht32f1xxxx::ht32f12345::adc::RegisterBlock

#[repr(C)]pub struct RegisterBlock {
    pub adc_rst: ADC_RST,
    pub adc_conv: ADC_CONV,
    pub adc_hconv: ADC_HCONV,
    pub adc_lst0: ADC_LST0,
    pub adc_lst1: ADC_LST1,
    pub adc_lst2: ADC_LST2,
    pub adc_lst3: ADC_LST3,
    pub adc_hlst: ADC_HLST,
    pub adc_ofr0: ADC_OFR0,
    pub adc_ofr1: ADC_OFR1,
    pub adc_ofr2: ADC_OFR2,
    pub adc_ofr3: ADC_OFR3,
    pub adc_ofr4: ADC_OFR4,
    pub adc_ofr5: ADC_OFR5,
    pub adc_ofr6: ADC_OFR6,
    pub adc_ofr7: ADC_OFR7,
    pub adc_ofr8: ADC_OFR8,
    pub adc_ofr9: ADC_OFR9,
    pub adc_ofr10: ADC_OFR10,
    pub adc_ofr11: ADC_OFR11,
    pub adc_ofr12: ADC_OFR12,
    pub adc_ofr13: ADC_OFR13,
    pub adc_ofr14: ADC_OFR14,
    pub adc_ofr15: ADC_OFR15,
    pub adc_str0: ADC_STR0,
    pub adc_str1: ADC_STR1,
    pub adc_str2: ADC_STR2,
    pub adc_str3: ADC_STR3,
    pub adc_str4: ADC_STR4,
    pub adc_str5: ADC_STR5,
    pub adc_str6: ADC_STR6,
    pub adc_str7: ADC_STR7,
    pub adc_str8: ADC_STR8,
    pub adc_str9: ADC_STR9,
    pub adc_str10: ADC_STR10,
    pub adc_str11: ADC_STR11,
    pub adc_str12: ADC_STR12,
    pub adc_str13: ADC_STR13,
    pub adc_str14: ADC_STR14,
    pub adc_str15: ADC_STR15,
    pub adc_dr0: ADC_DR0,
    pub adc_dr1: ADC_DR1,
    pub adc_dr2: ADC_DR2,
    pub adc_dr3: ADC_DR3,
    pub adc_dr4: ADC_DR4,
    pub adc_dr5: ADC_DR5,
    pub adc_dr6: ADC_DR6,
    pub adc_dr7: ADC_DR7,
    pub adc_dr8: ADC_DR8,
    pub adc_dr9: ADC_DR9,
    pub adc_dr10: ADC_DR10,
    pub adc_dr11: ADC_DR11,
    pub adc_dr12: ADC_DR12,
    pub adc_dr13: ADC_DR13,
    pub adc_dr14: ADC_DR14,
    pub adc_dr15: ADC_DR15,
    pub adc_hdr0: ADC_HDR0,
    pub adc_hdr1: ADC_HDR1,
    pub adc_hdr2: ADC_HDR2,
    pub adc_hdr3: ADC_HDR3,
    pub adc_tcr: ADC_TCR,
    pub adc_tsr: ADC_TSR,
    pub adc_htcr: ADC_HTCR,
    pub adc_htsr: ADC_HTSR,
    pub adc_wcr: ADC_WCR,
    pub adc_ltr: ADC_LTR,
    pub adc_utr: ADC_UTR,
    pub adc_imr: ADC_IMR,
    pub adc_iraw: ADC_IRAW,
    pub adc_imask: ADC_IMASK,
    pub adc_iclr: ADC_ICLR,
    pub adc_dmar: ADC_DMAR,
    // some fields omitted
}

Register block

Fields

adc_rst: ADC_RST

0x04 - ADC_RST

adc_conv: ADC_CONV

0x08 - ADC_CONV

adc_hconv: ADC_HCONV

0x0c - ADC_HCONV

adc_lst0: ADC_LST0

0x10 - ADC_LST0

adc_lst1: ADC_LST1

0x14 - ADC_LST1

adc_lst2: ADC_LST2

0x18 - ADC_LST2

adc_lst3: ADC_LST3

0x1c - ADC_LST3

adc_hlst: ADC_HLST

0x20 - ADC_HLST

adc_ofr0: ADC_OFR0

0x30 - ADC_OFR0

adc_ofr1: ADC_OFR1

0x34 - ADC_OFR1

adc_ofr2: ADC_OFR2

0x38 - ADC_OFR2

adc_ofr3: ADC_OFR3

0x3c - ADC_OFR3

adc_ofr4: ADC_OFR4

0x40 - ADC_OFR4

adc_ofr5: ADC_OFR5

0x44 - ADC_OFR5

adc_ofr6: ADC_OFR6

0x48 - ADC_OFR6

adc_ofr7: ADC_OFR7

0x4c - ADC_OFR7

adc_ofr8: ADC_OFR8

0x50 - ADC_OFR8

adc_ofr9: ADC_OFR9

0x54 - ADC_OFR9

adc_ofr10: ADC_OFR10

0x58 - ADC_OFR10

adc_ofr11: ADC_OFR11

0x5c - ADC_OFR11

adc_ofr12: ADC_OFR12

0x60 - ADC_OFR12

adc_ofr13: ADC_OFR13

0x64 - ADC_OFR13

adc_ofr14: ADC_OFR14

0x68 - ADC_OFR14

adc_ofr15: ADC_OFR15

0x6c - ADC_OFR15

adc_str0: ADC_STR0

0x70 - ADC_STR0

adc_str1: ADC_STR1

0x74 - ADC_STR1

adc_str2: ADC_STR2

0x78 - ADC_STR2

adc_str3: ADC_STR3

0x7c - ADC_STR3

adc_str4: ADC_STR4

0x80 - ADC_STR4

adc_str5: ADC_STR5

0x84 - ADC_STR5

adc_str6: ADC_STR6

0x88 - ADC_STR6

adc_str7: ADC_STR7

0x8c - ADC_STR7

adc_str8: ADC_STR8

0x90 - ADC_STR8

adc_str9: ADC_STR9

0x94 - ADC_STR9

adc_str10: ADC_STR10

0x98 - ADC_STR10

adc_str11: ADC_STR11

0x9c - ADC_STR11

adc_str12: ADC_STR12

0xa0 - ADC_STR12

adc_str13: ADC_STR13

0xa4 - ADC_STR13

adc_str14: ADC_STR14

0xa8 - ADC_STR14

adc_str15: ADC_STR15

0xac - ADC_STR15

adc_dr0: ADC_DR0

0xb0 - ADC_DR0

adc_dr1: ADC_DR1

0xb4 - ADC_DR1

adc_dr2: ADC_DR2

0xb8 - ADC_DR2

adc_dr3: ADC_DR3

0xbc - ADC_DR3

adc_dr4: ADC_DR4

0xc0 - ADC_DR4

adc_dr5: ADC_DR5

0xc4 - ADC_DR5

adc_dr6: ADC_DR6

0xc8 - ADC_DR6

adc_dr7: ADC_DR7

0xcc - ADC_DR7

adc_dr8: ADC_DR8

0xd0 - ADC_DR8

adc_dr9: ADC_DR9

0xd4 - ADC_DR9

adc_dr10: ADC_DR10

0xd8 - ADC_DR10

adc_dr11: ADC_DR11

0xdc - ADC_DR11

adc_dr12: ADC_DR12

0xe0 - ADC_DR12

adc_dr13: ADC_DR13

0xe4 - ADC_DR13

adc_dr14: ADC_DR14

0xe8 - ADC_DR14

adc_dr15: ADC_DR15

0xec - ADC_DR15

adc_hdr0: ADC_HDR0

0xf0 - ADC_HDR0

adc_hdr1: ADC_HDR1

0xf4 - ADC_HDR1

adc_hdr2: ADC_HDR2

0xf8 - ADC_HDR2

adc_hdr3: ADC_HDR3

0xfc - ADC_HDR3

adc_tcr: ADC_TCR

0x100 - ADC_TCR

adc_tsr: ADC_TSR

0x104 - ADC_TSR

adc_htcr: ADC_HTCR

0x110 - ADC_HTCR

adc_htsr: ADC_HTSR

0x114 - ADC_HTSR

adc_wcr: ADC_WCR

0x120 - ADC_WCR

adc_ltr: ADC_LTR

0x124 - ADC_LTR

adc_utr: ADC_UTR

0x128 - ADC_UTR

adc_imr: ADC_IMR

0x130 - ADC_IMR

adc_iraw: ADC_IRAW

0x134 - ADC_IRAW

adc_imask: ADC_IMASK

0x138 - ADC_IMASK

adc_iclr: ADC_ICLR

0x13c - ADC_ICLR

adc_dmar: ADC_DMAR

0x140 - ADC_DMAR

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