Crate ht1621b 

Platform-agnostic driver for the HT1621B LCD controller.

The HT1621B is driven over a custom 3‑ or 4‑wire serial interface (not SPI):

• CS: active-low chip select, frames each transaction
• WR: write clock, data latched on the rising edge
• RD: read clock (only needed for read / read‑modify‑write)
• DA: bidirectional data line

Each transaction is framed by CS↓ … CS↑. Within a frame the first 3 bits select the mode:

ID	Mode	Payload
100	Command	8-bit command + 1 don’t-care bit
101	Write / Read‑Modify‑Write	6-bit addr + N × 4-bit data
110	Read RAM	6-bit addr + N × 4-bit data (read)

RAM is 32 × 4 bits (128 segments). The address auto-increments after each nibble in write/read mode, allowing continuous burst transfer. Command bits and the RAM address are sent MSB-first; RAM data nibbles are sent LSB-first (D0→D3) per the datasheet.

Layers

Struct	Pins	Capabilities
Ht1621bBus + Ht1621b	CS, WR, DA	Write commands + RAM data
Ht1621bBusRW + Ht1621bRW	CS, WR, RD, DA	Write + read + read‑modify‑write

The read / read‑modify‑write layer (Ht1621bBusRW / Ht1621bRW) is gated behind the read feature, which also pulls in embedded-flex-pin for the bidirectional DA pin.

Both are generic over embedded_hal::digital::OutputPin / FlexPin and embedded_hal::delay::DelayNs, so the driver works with any embedded-hal 1.0 implementation.

Example

use ht1621b::{Config, Ht1621b};

// `cs`, `wr`, `da`: OutputPin; `delay`: DelayNs; `async_delay`: async DelayNs
let mut lcd = Ht1621b::new(cs, wr, da, delay, &mut async_delay, Config::default()).await;
lcd.write_byte(arbitrary_int::u6::new(0x00), 0xEF); // display a digit

Modules

cmd

Raw 8-bit command codes.

Structs

Config

Power-on configuration for Ht1621b.

Driver

High-level, ergonomic HT1621B driver.

Ht1621bBus

Low-level protocol layer (3-wire, write-only).

Enums

Bias

LCD bias level.

ClockSource

System clock source.

Commons

Number of COM (backplane) lines driven.

TimerFreq

Time base / WDT clock output frequency.

TimerMode

Time-base subsystem mode. Time base and WDT share one generator and are mutually exclusive; this enum makes an illegal “both on” state unrepresentable. IRQ output follows the mode (on for TimeBase/Watchdog, off for Off).

ToneFreq

Buzzer output frequency.

Type Aliases

Ht1621b

3-wire write-only driver. Uses CS, WR, DA pins.