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Crate hrx

Crate hrx 

Source
Expand description

GPU execution and Loom compilation without a build-time native dependency.

Native libraries are verified and loaded on first use. See bundle for offline setup.

Re-exports§

pub use execution::Access;
pub use execution::Completion;
pub use execution::Runtime;

Modules§

artifacts
Model artifact discovery and parsing.
benchmark
Reusable benchmark distributions and synchronized stage timing.
bundle
Reproducible native provisioning. No build script downloads or native link flags.
execution
Coordinated GPU/NPU execution with inferred memory dependencies. Coordinated execution for GPU and NPU kernels.
fabric
Native AMD device ownership through libamdf’s versioned C ABI. Discovery is passive; only opening a device activates hardware.
gpu
Low-level GPU execution. Kernel dispatch and external memory access require the caller to establish their safety and synchronization contracts.
image
Device-resident image transformations with bounded reusable plans.
inference
Shared model context, owned tensor transfers, and bounded inference slots.
jobs
Bounded host orchestration for asynchronous FFI callers and streaming pipelines. Jobs may block on coordinated GPU completions without occupying the caller’s scheduler. Cancellation never interrupts native work: running work drains.
loom
In-process Loom compilation with reusable indexed modules and verified disk artifacts.
model
Resident Loom workloads built from reusable buffers, kernels and graphs.
npu
Native XDNA compilation and execution through the shared AMD fabric. Programs use canonical Loom .xdna images; allocation is device-scoped.
plan_cache
Bounded, single-flight preparation with idle-only LRU eviction.
residency
Opt-in, byte-budgeted model residency with transactional loader reservations.
runner
hrx run — launch one Loom-compiled kernel on the GPU and dump its buffers.
tensor
Checked tensor metadata and owned views in one coordinated runtime.

Structs§

AccessGraph
A raw GPU graph whose edges are inferred from declared buffer access.
AccessView
One graph binding and the complete access performed through it.
Buffer
Device backing with allocation-budget ownership.
BufferPool
A bounded free list whose allocations are safe to reuse on one ordered stream.
Constants
Explicit scalar widths, packed in declaration order for HRX binding dispatch. Unlike direct kernargs this format has no implicit alignment or pointer slots. Export metadata gives only the total byte count. Mixed scalar widths must come from the kernel’s argument contract.
Device
An owned GPU address and execution domain.
Event
Immutable native completion point.
ExportInfo
Native entry’s checked argument and workgroup layout.
Graph
Owned native commands being recorded under checked dependency edges.
GraphExec
Reusable prepared GPU graph and its last immutable completion point.
Kernel
Trusted native GPU entry and its declaration-order argument layout.
Node
A dependency node branded with its recording’s identity.
PooledBuffer
Device storage returned to its BufferPool when the lease drops.
Readback
Owned destination retained through native readback completion.
Stream
An ordered GPU stream with explicit prepared commands and bounded pools.
Submission
Borrowed completion observer that also reclaims completed staging.
Target
An exact AMDGPU or XDNA deployment key.
View
Checked borrowed logical range in an owned buffer.

Enums§

Error
A runtime, validation, provisioning or compiler failure.

Constants§

TARGET_KEY
Default compiler target; devices report their architecture at runtime.

Traits§

Scalar
A supported fixed-width scalar for little-endian binding constants.

Type Aliases§

Result
The result of an HRX operation.