Struct hpm5361_pac::RDC
source · pub struct RDC { /* private fields */ }
Expand description
RDC
Implementations§
source§impl RDC
impl RDC
sourcepub const PTR: *const RegisterBlock = {0xf0320000 as *const rdc::RegisterBlock}
pub const PTR: *const RegisterBlock = {0xf0320000 as *const rdc::RegisterBlock}
Pointer to the register block
sourcepub const fn ptr() -> *const RegisterBlock
pub const fn ptr() -> *const RegisterBlock
Return the pointer to the register block
sourcepub unsafe fn steal() -> Self
pub unsafe fn steal() -> Self
Steal an instance of this peripheral
§Safety
Ensure that the new instance of the peripheral cannot be used in a way that may race with any existing instances, for example by only accessing read-only or write-only registers, or by consuming the original peripheral and using critical sections to coordinate access between multiple new instances.
Additionally, other software such as HALs may rely on only one peripheral instance existing to ensure memory safety; ensure no stolen instances are passed to such software.
Methods from Deref<Target = RegisterBlock>§
sourcepub fn exc_timming(&self) -> &EXC_TIMMING
pub fn exc_timming(&self) -> &EXC_TIMMING
0x34 - excitation signal timming setting
sourcepub fn exc_scaling(&self) -> &EXC_SCALING
pub fn exc_scaling(&self) -> &EXC_SCALING
0x38 - amplitude scaling for excitation
sourcepub fn exc_offset(&self) -> &EXC_OFFSET
pub fn exc_offset(&self) -> &EXC_OFFSET
0x3c - amplitude offset setting
sourcepub fn pwm_scaling(&self) -> &PWM_SCALING
pub fn pwm_scaling(&self) -> &PWM_SCALING
0x40 - amplitude scaling for excitation
sourcepub fn pwm_offset(&self) -> &PWM_OFFSET
pub fn pwm_offset(&self) -> &PWM_OFFSET
0x44 - amplitude offset setting
sourcepub fn trig_out0_cfg(&self) -> &TRIG_OUT0_CFG
pub fn trig_out0_cfg(&self) -> &TRIG_OUT0_CFG
0x48 - Configuration for trigger out 0 in clock cycle
sourcepub fn trig_out1_cfg(&self) -> &TRIG_OUT1_CFG
pub fn trig_out1_cfg(&self) -> &TRIG_OUT1_CFG
0x4c - Configuration for trigger out 1 in clock cycle
sourcepub fn sync_out_ctrl(&self) -> &SYNC_OUT_CTRL
pub fn sync_out_ctrl(&self) -> &SYNC_OUT_CTRL
0x54 - synchronize output signal control
sourcepub fn exc_sync_dly(&self) -> &EXC_SYNC_DLY
pub fn exc_sync_dly(&self) -> &EXC_SYNC_DLY
0x58 - trigger in delay timming in soc bus cycle
sourcepub fn edg_det_ctl(&self) -> &EDG_DET_CTL
pub fn edg_det_ctl(&self) -> &EDG_DET_CTL
0x88 - the control for edge detection
sourcepub fn acc_scaling(&self) -> &ACC_SCALING
pub fn acc_scaling(&self) -> &ACC_SCALING
0x8c - scaling for accumulation result
sourcepub fn exc_period(&self) -> &EXC_PERIOD
pub fn exc_period(&self) -> &EXC_PERIOD
0x90 - period of excitation
sourcepub fn sync_delay_i(&self) -> &SYNC_DELAY_I
pub fn sync_delay_i(&self) -> &SYNC_DELAY_I
0xa0 - delay setting in clock cycle for synchronous signal
sourcepub fn rise_delay_i(&self) -> &RISE_DELAY_I
pub fn rise_delay_i(&self) -> &RISE_DELAY_I
0xa8 - delay in clock cycle between excitation synchrnous signal and rising edge of i_channel data
sourcepub fn fall_delay_i(&self) -> &FALL_DELAY_I
pub fn fall_delay_i(&self) -> &FALL_DELAY_I
0xac - delay in clock cycle between excitation synchrnous signal and falling edge of i_channel data
sourcepub fn sample_rise_i(&self) -> &SAMPLE_RISE_I
pub fn sample_rise_i(&self) -> &SAMPLE_RISE_I
0xb0 - sample value on rising edge of rectify signal
sourcepub fn sample_fall_i(&self) -> &SAMPLE_FALL_I
pub fn sample_fall_i(&self) -> &SAMPLE_FALL_I
0xb4 - sample value on falling edge of rectify signal
sourcepub fn sign_cnt_i(&self) -> &SIGN_CNT_I
pub fn sign_cnt_i(&self) -> &SIGN_CNT_I
0xbc - sample counter of opposite sign with rectify signal
sourcepub fn sync_delay_q(&self) -> &SYNC_DELAY_Q
pub fn sync_delay_q(&self) -> &SYNC_DELAY_Q
0xc0 - delay setting in clock cycle for synchronous signal
sourcepub fn rise_delay_q(&self) -> &RISE_DELAY_Q
pub fn rise_delay_q(&self) -> &RISE_DELAY_Q
0xc8 - delay in clock cycle between excitation synchrnous signal and rising edge of q_channel data
sourcepub fn fall_delay_q(&self) -> &FALL_DELAY_Q
pub fn fall_delay_q(&self) -> &FALL_DELAY_Q
0xcc - delay in clock cycle between excitation synchrnous signal and falling edge of q_channel data
sourcepub fn sample_rise_q(&self) -> &SAMPLE_RISE_Q
pub fn sample_rise_q(&self) -> &SAMPLE_RISE_Q
0xd0 - sample value on rising edge of rectify signal
sourcepub fn sample_fall_q(&self) -> &SAMPLE_FALL_Q
pub fn sample_fall_q(&self) -> &SAMPLE_FALL_Q
0xd4 - sample value on falling edge of rectify signal
sourcepub fn sign_cnt_q(&self) -> &SIGN_CNT_Q
pub fn sign_cnt_q(&self) -> &SIGN_CNT_Q
0xdc - sample counter of opposite sign with rectify signal
sourcepub fn adc_int_state(&self) -> &ADC_INT_STATE
pub fn adc_int_state(&self) -> &ADC_INT_STATE
0xec - the interrupt state