Expand description
Generic runtime-dispatch register-blocked matrix–vector product (y += A · x).
Plumbs the core register-blocked gemv micro-kernel
(hermes_simd_core::tiling::TilingStrategy::gemv) through runtime backend
selection, mirroring super::gemm. A is row-major nrows × ncols; the
result accumulates into y (y += A·x), so callers wanting y = A·x
zero y first — matching the axpy/GEMM accumulate convention.
§Theorem (operand reuse — why register blocking helps)
GEMV performs 2·nrows·ncols flops over nrows·ncols matrix elements:
arithmetic intensity ≈ 2 flops/element, so it is memory-bound and
throughput is governed by operand reuse, not FLOP rate. Blocking TILE_M
rows of A loads each x[c..c+lane] vector once and applies it to all
TILE_M rows held in independent register accumulators; this cuts x
traffic by TILE_M× and breaks the per-row FMA dependency chain (one live
accumulator per row). The nrows mod TILE_M remainder is handled by a
single-row cleanup, so any shape is supported. TILE_M scales with the
register file: wider ISAs block more rows before spilling. ∎