pub fn build_aux_rows<F: TowerField + HardwareField>(
layout: &OuterLayout,
wires: &[[Flat<F>; 3]],
code_len: usize,
filler: &[Flat<F>],
) -> Result<Vec<Vec<Flat<F>>>>Expand description
AUX oracle rows: the wire blocks and the five mask
rows, filler on every message tail, then the
zero-sum mask row’s first code_len - 1 cells and
the messages of the interleaved and both high masks.