pub trait System {
Show 15 methods
// Required methods
fn read(&mut self, cpu: &mut W65C02S, addr: u16) -> u8;
fn write(&mut self, cpu: &mut W65C02S, addr: u16, data: u8);
// Provided methods
fn read_opcode(&mut self, cpu: &mut W65C02S, addr: u16) -> u8 { ... }
fn read_locked(&mut self, cpu: &mut W65C02S, addr: u16) -> u8 { ... }
fn read_locked_spurious(&mut self, cpu: &mut W65C02S, addr: u16) { ... }
fn read_vector(&mut self, cpu: &mut W65C02S, addr: u16) -> u8 { ... }
fn write_stack(&mut self, cpu: &mut W65C02S, addr: u16, data: u8) { ... }
fn write_locked(&mut self, cpu: &mut W65C02S, addr: u16, data: u8) { ... }
fn read_opcode_spurious(&mut self, cpu: &mut W65C02S, addr: u16) { ... }
fn read_operand(&mut self, cpu: &mut W65C02S, addr: u16) -> u8 { ... }
fn read_operand_spurious(&mut self, cpu: &mut W65C02S, addr: u16) { ... }
fn read_pointer(&mut self, cpu: &mut W65C02S, addr: u16) -> u8 { ... }
fn read_stack(&mut self, cpu: &mut W65C02S, addr: u16) -> u8 { ... }
fn read_stack_spurious(&mut self, cpu: &mut W65C02S, addr: u16) { ... }
fn read_spurious(&mut self, cpu: &mut W65C02S, addr: u16) { ... }
}Expand description
Implements a system connected to a W65C02S’s bus. Only read and write
need be implemented for a simple system, but other systems may be more
complicated; for instance, many 65C02-based microcontrollers have advanced
interrupt vectoring logic that would require implementing read_vector.
Required Methods§
Provided Methods§
Sourcefn read_opcode(&mut self, cpu: &mut W65C02S, addr: u16) -> u8
fn read_opcode(&mut self, cpu: &mut W65C02S, addr: u16) -> u8
Read an instruction opcode from the given address. VPB, MLB, and SYNC are all HIGH.
Sourcefn read_locked(&mut self, cpu: &mut W65C02S, addr: u16) -> u8
fn read_locked(&mut self, cpu: &mut W65C02S, addr: u16) -> u8
Read data from the given address as part of a Read-Modify-Write instruction. SYNC and MLB are LOW, VPB is HIGH.
Sourcefn read_locked_spurious(&mut self, cpu: &mut W65C02S, addr: u16)
fn read_locked_spurious(&mut self, cpu: &mut W65C02S, addr: u16)
Second data read from the given address as part of a Read-Modify-Write instruction. This data is ignored; this is an “idle cycle”. SYNC and MLB are LOW, VPB is HIGH. Indistinguishable from a locked data read on real hardware, but the distinction may be useful for simulation.
Sourcefn read_vector(&mut self, cpu: &mut W65C02S, addr: u16) -> u8
fn read_vector(&mut self, cpu: &mut W65C02S, addr: u16) -> u8
Read part of an interrupt vector from the given address. VPB is LOW, and SYNC and MLB are HIGH.
Sourcefn write_stack(&mut self, cpu: &mut W65C02S, addr: u16, data: u8)
fn write_stack(&mut self, cpu: &mut W65C02S, addr: u16, data: u8)
Push a byte of data onto the stack at the given address. SYNC is LOW and VPB and MLB are HIGH. Indistinguishable from a normal data write on real hardware, but the distinction may be useful for simulation.
Sourcefn write_locked(&mut self, cpu: &mut W65C02S, addr: u16, data: u8)
fn write_locked(&mut self, cpu: &mut W65C02S, addr: u16, data: u8)
Write a byte of data to the given address as the conclusion of a Read- Modify-Write instruction. SYNC and MLB are LOW, VPB is HIGH.
Sourcefn read_opcode_spurious(&mut self, cpu: &mut W65C02S, addr: u16)
fn read_opcode_spurious(&mut self, cpu: &mut W65C02S, addr: u16)
Read an instruction opcode whose execution will be preempted by an interrupt or a reset, or which follows a WAI or STP instruction that has not yet been broken out of. VPB, MLB, and SYNC are all HIGH. Indistinguishable from a normal opcode fetch on real hardware, but the distinction may be useful for simulation.
Sourcefn read_operand(&mut self, cpu: &mut W65C02S, addr: u16) -> u8
fn read_operand(&mut self, cpu: &mut W65C02S, addr: u16) -> u8
Read an instruction operand from the given address. SYNC is LOW and VPB and MLB are HIGH. Indistinguishable from an ordinary data read on real hardware, but the distinction may be useful for simulation.
Sourcefn read_operand_spurious(&mut self, cpu: &mut W65C02S, addr: u16)
fn read_operand_spurious(&mut self, cpu: &mut W65C02S, addr: u16)
Read an instruction operand from the given address, except that the instruction had an implied operand or was preempted by a reset. SYNC is LOW and VPB and MLB are HIGH. Indistinguishable from an ordinary data read on real hardware, but the distinction may be useful for simulation.
Sourcefn read_pointer(&mut self, cpu: &mut W65C02S, addr: u16) -> u8
fn read_pointer(&mut self, cpu: &mut W65C02S, addr: u16) -> u8
Read part of a pointer from the given address. SYNC is LOW and VPB and MLB are HIGH. Indistinguishable from an ordinary data read on real hardware, but the distinction may be useful for simulation.
Sourcefn read_stack(&mut self, cpu: &mut W65C02S, addr: u16) -> u8
fn read_stack(&mut self, cpu: &mut W65C02S, addr: u16) -> u8
Pop a value from the stack at the given address. SYNC is LOW and VPB and MLB are HIGH. Indistinguishable from an ordinary data read on real hardware, but the distinction may be useful for simulation.
Sourcefn read_stack_spurious(&mut self, cpu: &mut W65C02S, addr: u16)
fn read_stack_spurious(&mut self, cpu: &mut W65C02S, addr: u16)
Spurious stack “read” that occurs during reset. SYNC is LOW and VPB and MLB are HIGH. Indistinguishable from an ordinary data read on real hardware, but the distinction may be useful for simulation.
Sourcefn read_spurious(&mut self, cpu: &mut W65C02S, addr: u16)
fn read_spurious(&mut self, cpu: &mut W65C02S, addr: u16)
Read a byte of data from the given address during an “internal operation” cycle. SYNC is LOW and VPB and MLB are HIGH. Indistinguishable from an ordinary data read on real hardware, but the distinction may be useful for simulation.