gdt_cpus/cpu/core_kind.rs
1/// Classifies a CPU core by its performance/efficiency role.
2///
3/// Modern CPUs are heterogeneous in more than one way: Intel ships Performance,
4/// Efficiency and Low-Power-Efficiency cores on one die (Meteor Lake onward),
5/// AMD mixes full-fat and dense ("c") cores that differ by frequency and cache
6/// rather than ISA, and ARM big.LITTLE/DynamIQ has always been multi-kind.
7/// A boolean P/E split cannot represent shipping silicon - this enum is N-ary.
8#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash)]
9#[cfg_attr(feature = "serde", derive(serde::Serialize, serde::Deserialize))]
10pub enum CoreKind {
11 /// A Performance core (Intel P-core, ARM "big", AMD full-fat, Apple P).
12 Performance,
13 /// An Efficiency core (Intel E-core, ARM "LITTLE", AMD dense/"c", Apple E).
14 Efficiency,
15 /// A Low-Power Efficiency core (Intel LP-E cores on the SoC tile, or the
16 /// lowest capacity tier on a 3-tier ARM design).
17 LpEfficiency,
18 /// The core kind could not be determined.
19 ///
20 /// NOTE: detection never *returns* this on a homogeneous machine - the
21 /// classification invariant is "homogeneous means all Performance".
22 Unknown,
23}
24
25impl CoreKind {
26 /// Number of variants - sizes the per-kind tables in [`crate::CpuInfo`].
27 pub const COUNT: usize = 4;
28
29 /// Stable index for per-kind tables (`l1d[kind.index()]`).
30 pub fn index(self) -> usize {
31 match self {
32 CoreKind::Performance => 0,
33 CoreKind::Efficiency => 1,
34 CoreKind::LpEfficiency => 2,
35 CoreKind::Unknown => 3,
36 }
37 }
38}
39
40impl std::fmt::Display for CoreKind {
41 fn fmt(&self, f: &mut std::fmt::Formatter<'_>) -> std::fmt::Result {
42 match self {
43 CoreKind::Performance => write!(f, "Performance"),
44 CoreKind::Efficiency => write!(f, "Efficiency"),
45 CoreKind::LpEfficiency => write!(f, "LpEfficiency"),
46 CoreKind::Unknown => write!(f, "Unknown"),
47 }
48 }
49}