Enum gdbstub_arch::riscv::Riscv32 [−][src]
pub enum Riscv32 {}
Expand description
Implements Arch
for 32-bit RISC-V.
Trait Implementations
impl Arch for Riscv32
[src]
impl Arch for Riscv32
[src]type Usize = u32
type Usize = u32
The architecture’s pointer size (e.g: u32
on a 32-bit system).
type Registers = RiscvCoreRegs<u32>
type Registers = RiscvCoreRegs<u32>
The architecture’s register file. See Registers
for more details.
type RegId = RiscvRegId<u32>
type RegId = RiscvRegId<u32>
Register identifier enum/struct. Read more
type BreakpointKind = usize
type BreakpointKind = usize
The architecture’s breakpoint “kind”, used to determine the “size”
of breakpoint to set. See BreakpointKind
for more details. Read more
fn target_description_xml() -> Option<&'static str>
[src]
fn target_description_xml() -> Option<&'static str>
[src](optional) Return the arch’s description XML file (target.xml
). Read more