Module gd32vf103_pac::timer0::chctl1_input
source · Expand description
Channel control register 1 (input mode)
Structs
- Channel control register 1 (input mode)
- Register
CHCTL1_Input
reader - Register
CHCTL1_Input
writer
Type Definitions
- Field
CH2CAPFLT
reader - Channel 2 input capture filter control - Field
CH2CAPFLT
writer - Channel 2 input capture filter control - Field
CH2CAPPSC
reader - Channel 2 input capture prescaler - Field
CH2CAPPSC
writer - Channel 2 input capture prescaler - Field
CH2MS
reader - Channel 2 mode selection - Field
CH2MS
writer - Channel 2 mode selection - Field
CH3CAPFLT
reader - Channel 3 input capture filter control - Field
CH3CAPFLT
writer - Channel 3 input capture filter control - Field
CH3CAPPSC
reader - Channel 3 input capture prescaler - Field
CH3CAPPSC
writer - Channel 3 input capture prescaler - Field
CH3MS
reader - Channel 3 mode selection - Field
CH3MS
writer - Channel 3 mode selection