Module gd32vf103_pac::dac

source ·
Expand description

Digital-to-analog converter

Modules

  • control register
  • DAC0 data output register
  • DAC0 12-bit left-aligned data holding register
  • DAC0 8-bit right aligned data holding register
  • DAC0 12-bit right-aligned data holding register
  • DAC1 data output register
  • DAC1 12-bit left aligned data holding register
  • DAC1 8-bit right aligned data holding register
  • DAC1 12-bit right-aligned data holding register
  • DAC concurrent mode 12-bit left aligned data holding register
  • DAC concurrent mode 8-bit right aligned data holding register
  • DAC concurrent mode 12-bit right-aligned data holding register
  • software trigger register

Structs

Type Definitions

  • CTL (rw) register accessor: an alias for Reg<CTL_SPEC>
  • DAC0_DO (r) register accessor: an alias for Reg<DAC0_DO_SPEC>
  • DAC0_L12DH (rw) register accessor: an alias for Reg<DAC0_L12DH_SPEC>
  • DAC0_R8DH (rw) register accessor: an alias for Reg<DAC0_R8DH_SPEC>
  • DAC0_R12DH (rw) register accessor: an alias for Reg<DAC0_R12DH_SPEC>
  • DAC1_DO (r) register accessor: an alias for Reg<DAC1_DO_SPEC>
  • DAC1_L12DH (rw) register accessor: an alias for Reg<DAC1_L12DH_SPEC>
  • DAC1_R8DH (rw) register accessor: an alias for Reg<DAC1_R8DH_SPEC>
  • DAC1_R12DH (rw) register accessor: an alias for Reg<DAC1_R12DH_SPEC>
  • DACC_L12DH (rw) register accessor: an alias for Reg<DACC_L12DH_SPEC>
  • DACC_R8DH (rw) register accessor: an alias for Reg<DACC_R8DH_SPEC>
  • DACC_R12DH (rw) register accessor: an alias for Reg<DACC_R12DH_SPEC>
  • SWT (w) register accessor: an alias for Reg<SWT_SPEC>