Module gd32vf103_pac::dac::dacc_l12dh

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Expand description

DAC concurrent mode 12-bit left aligned data holding register

Structs

  • DACC_L12DH_SPEC
    DAC concurrent mode 12-bit left aligned data holding register
  • R
    Register DACC_L12DH reader
  • W
    Register DACC_L12DH writer

Type Definitions

  • DAC0_DH_R
    Field DAC0_DH reader - DAC0 12-bit left-aligned data
  • DAC0_DH_W
    Field DAC0_DH writer - DAC0 12-bit left-aligned data
  • DAC1_DH_R
    Field DAC1_DH reader - DAC1 12-bit left-aligned data
  • DAC1_DH_W
    Field DAC1_DH writer - DAC1 12-bit left-aligned data