1#[doc = r"Register block"]
2#[repr(C)]
3pub struct RegisterBlock {
4 #[doc = "0x00 - control register 0"]
5 pub ctl0: CTL0,
6 _reserved1: [u8; 0x02],
7 #[doc = "0x04 - control register 1"]
8 pub ctl1: CTL1,
9 _reserved2: [u8; 0x02],
10 #[doc = "0x08 - slave mode control register"]
11 pub smcfg: SMCFG,
12 _reserved3: [u8; 0x02],
13 #[doc = "0x0c - DMA/Interrupt enable register"]
14 pub dmainten: DMAINTEN,
15 _reserved4: [u8; 0x02],
16 #[doc = "0x10 - interrupt flag register"]
17 pub intf: INTF,
18 _reserved5: [u8; 0x02],
19 #[doc = "0x14 - event generation register"]
20 pub swevg: SWEVG,
21 _reserved6: [u8; 0x02],
22 _reserved_6_chctl0: [u8; 0x02],
23 _reserved7: [u8; 0x02],
24 _reserved_7_chctl1: [u8; 0x02],
25 _reserved8: [u8; 0x02],
26 #[doc = "0x20 - Channel control register 2"]
27 pub chctl2: CHCTL2,
28 _reserved9: [u8; 0x02],
29 #[doc = "0x24 - Counter register"]
30 pub cnt: CNT,
31 _reserved10: [u8; 0x02],
32 #[doc = "0x28 - Prescaler register"]
33 pub psc: PSC,
34 _reserved11: [u8; 0x02],
35 #[doc = "0x2c - Counter auto reload register"]
36 pub car: CAR,
37 _reserved12: [u8; 0x06],
38 #[doc = "0x34 - Channel 0 capture/compare value register"]
39 pub ch0cv: CH0CV,
40 _reserved13: [u8; 0x02],
41 #[doc = "0x38 - Channel 1 capture/compare value register"]
42 pub ch1cv: CH1CV,
43 _reserved14: [u8; 0x02],
44 #[doc = "0x3c - Channel 2 capture/compare value register"]
45 pub ch2cv: CH2CV,
46 _reserved15: [u8; 0x02],
47 #[doc = "0x40 - Channel 3 capture/compare value register"]
48 pub ch3cv: CH3CV,
49 _reserved16: [u8; 0x06],
50 #[doc = "0x48 - DMA configuration register"]
51 pub dmacfg: DMACFG,
52 _reserved17: [u8; 0x02],
53 #[doc = "0x4c - DMA transfer buffer register"]
54 pub dmatb: DMATB,
55}
56impl RegisterBlock {
57 #[doc = "0x18 - Channel control register 0 (input mode)"]
58 #[inline(always)]
59 pub const fn chctl0_input(&self) -> &CHCTL0_INPUT {
60 unsafe { &*(self as *const Self).cast::<u8>().add(24usize).cast() }
61 }
62 #[doc = "0x18 - Channel control register 0 (output mode)"]
63 #[inline(always)]
64 pub const fn chctl0_output(&self) -> &CHCTL0_OUTPUT {
65 unsafe { &*(self as *const Self).cast::<u8>().add(24usize).cast() }
66 }
67 #[doc = "0x1c - Channel control register 1 (input mode)"]
68 #[inline(always)]
69 pub const fn chctl1_input(&self) -> &CHCTL1_INPUT {
70 unsafe { &*(self as *const Self).cast::<u8>().add(28usize).cast() }
71 }
72 #[doc = "0x1c - Channel control register 1 (output mode)"]
73 #[inline(always)]
74 pub const fn chctl1_output(&self) -> &CHCTL1_OUTPUT {
75 unsafe { &*(self as *const Self).cast::<u8>().add(28usize).cast() }
76 }
77}
78#[doc = "CTL0 (rw) register accessor: an alias for `Reg<CTL0_SPEC>`"]
79pub type CTL0 = crate::Reg<ctl0::CTL0_SPEC>;
80#[doc = "control register 0"]
81pub mod ctl0;
82#[doc = "CTL1 (rw) register accessor: an alias for `Reg<CTL1_SPEC>`"]
83pub type CTL1 = crate::Reg<ctl1::CTL1_SPEC>;
84#[doc = "control register 1"]
85pub mod ctl1;
86#[doc = "SMCFG (rw) register accessor: an alias for `Reg<SMCFG_SPEC>`"]
87pub type SMCFG = crate::Reg<smcfg::SMCFG_SPEC>;
88#[doc = "slave mode control register"]
89pub mod smcfg;
90#[doc = "DMAINTEN (rw) register accessor: an alias for `Reg<DMAINTEN_SPEC>`"]
91pub type DMAINTEN = crate::Reg<dmainten::DMAINTEN_SPEC>;
92#[doc = "DMA/Interrupt enable register"]
93pub mod dmainten;
94#[doc = "INTF (rw) register accessor: an alias for `Reg<INTF_SPEC>`"]
95pub type INTF = crate::Reg<intf::INTF_SPEC>;
96#[doc = "interrupt flag register"]
97pub mod intf;
98#[doc = "SWEVG (w) register accessor: an alias for `Reg<SWEVG_SPEC>`"]
99pub type SWEVG = crate::Reg<swevg::SWEVG_SPEC>;
100#[doc = "event generation register"]
101pub mod swevg;
102#[doc = "CHCTL0_Output (rw) register accessor: an alias for `Reg<CHCTL0_OUTPUT_SPEC>`"]
103pub type CHCTL0_OUTPUT = crate::Reg<chctl0_output::CHCTL0_OUTPUT_SPEC>;
104#[doc = "Channel control register 0 (output mode)"]
105pub mod chctl0_output;
106#[doc = "CHCTL0_Input (rw) register accessor: an alias for `Reg<CHCTL0_INPUT_SPEC>`"]
107pub type CHCTL0_INPUT = crate::Reg<chctl0_input::CHCTL0_INPUT_SPEC>;
108#[doc = "Channel control register 0 (input mode)"]
109pub mod chctl0_input;
110#[doc = "CHCTL1_Output (rw) register accessor: an alias for `Reg<CHCTL1_OUTPUT_SPEC>`"]
111pub type CHCTL1_OUTPUT = crate::Reg<chctl1_output::CHCTL1_OUTPUT_SPEC>;
112#[doc = "Channel control register 1 (output mode)"]
113pub mod chctl1_output;
114#[doc = "CHCTL1_Input (rw) register accessor: an alias for `Reg<CHCTL1_INPUT_SPEC>`"]
115pub type CHCTL1_INPUT = crate::Reg<chctl1_input::CHCTL1_INPUT_SPEC>;
116#[doc = "Channel control register 1 (input mode)"]
117pub mod chctl1_input;
118#[doc = "CHCTL2 (rw) register accessor: an alias for `Reg<CHCTL2_SPEC>`"]
119pub type CHCTL2 = crate::Reg<chctl2::CHCTL2_SPEC>;
120#[doc = "Channel control register 2"]
121pub mod chctl2;
122#[doc = "CNT (rw) register accessor: an alias for `Reg<CNT_SPEC>`"]
123pub type CNT = crate::Reg<cnt::CNT_SPEC>;
124#[doc = "Counter register"]
125pub mod cnt;
126#[doc = "PSC (rw) register accessor: an alias for `Reg<PSC_SPEC>`"]
127pub type PSC = crate::Reg<psc::PSC_SPEC>;
128#[doc = "Prescaler register"]
129pub mod psc;
130#[doc = "CAR (rw) register accessor: an alias for `Reg<CAR_SPEC>`"]
131pub type CAR = crate::Reg<car::CAR_SPEC>;
132#[doc = "Counter auto reload register"]
133pub mod car;
134#[doc = "CH0CV (rw) register accessor: an alias for `Reg<CH0CV_SPEC>`"]
135pub type CH0CV = crate::Reg<ch0cv::CH0CV_SPEC>;
136#[doc = "Channel 0 capture/compare value register"]
137pub mod ch0cv;
138#[doc = "CH1CV (rw) register accessor: an alias for `Reg<CH1CV_SPEC>`"]
139pub type CH1CV = crate::Reg<ch1cv::CH1CV_SPEC>;
140#[doc = "Channel 1 capture/compare value register"]
141pub mod ch1cv;
142#[doc = "CH2CV (rw) register accessor: an alias for `Reg<CH2CV_SPEC>`"]
143pub type CH2CV = crate::Reg<ch2cv::CH2CV_SPEC>;
144#[doc = "Channel 2 capture/compare value register"]
145pub mod ch2cv;
146#[doc = "CH3CV (rw) register accessor: an alias for `Reg<CH3CV_SPEC>`"]
147pub type CH3CV = crate::Reg<ch3cv::CH3CV_SPEC>;
148#[doc = "Channel 3 capture/compare value register"]
149pub mod ch3cv;
150#[doc = "DMACFG (rw) register accessor: an alias for `Reg<DMACFG_SPEC>`"]
151pub type DMACFG = crate::Reg<dmacfg::DMACFG_SPEC>;
152#[doc = "DMA configuration register"]
153pub mod dmacfg;
154#[doc = "DMATB (rw) register accessor: an alias for `Reg<DMATB_SPEC>`"]
155pub type DMATB = crate::Reg<dmatb::DMATB_SPEC>;
156#[doc = "DMA transfer buffer register"]
157pub mod dmatb;