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#[doc = "Reader of register CFG1"] pub type R = crate::R<u32, super::CFG1>; #[doc = "Writer for register CFG1"] pub type W = crate::W<u32, super::CFG1>; #[doc = "Register CFG1 `reset()`'s with value 0"] impl crate::ResetValue for super::CFG1 { type Type = u32; #[inline(always)] fn reset_value() -> Self::Type { 0 } } #[doc = "Reader of field `PREDV0`"] pub type PREDV0_R = crate::R<u8, u8>; #[doc = "Write proxy for field `PREDV0`"] pub struct PREDV0_W<'a> { w: &'a mut W, } impl<'a> PREDV0_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !0x0f) | ((value as u32) & 0x0f); self.w } } #[doc = "Reader of field `PREDV1`"] pub type PREDV1_R = crate::R<u8, u8>; #[doc = "Write proxy for field `PREDV1`"] pub struct PREDV1_W<'a> { w: &'a mut W, } impl<'a> PREDV1_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x0f << 4)) | (((value as u32) & 0x0f) << 4); self.w } } #[doc = "Reader of field `PLL1MF`"] pub type PLL1MF_R = crate::R<u8, u8>; #[doc = "Write proxy for field `PLL1MF`"] pub struct PLL1MF_W<'a> { w: &'a mut W, } impl<'a> PLL1MF_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x0f << 8)) | (((value as u32) & 0x0f) << 8); self.w } } #[doc = "Reader of field `PLL2MF`"] pub type PLL2MF_R = crate::R<u8, u8>; #[doc = "Write proxy for field `PLL2MF`"] pub struct PLL2MF_W<'a> { w: &'a mut W, } impl<'a> PLL2MF_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x0f << 12)) | (((value as u32) & 0x0f) << 12); self.w } } #[doc = "Reader of field `PREDV0SEL`"] pub type PREDV0SEL_R = crate::R<bool, bool>; #[doc = "Write proxy for field `PREDV0SEL`"] pub struct PREDV0SEL_W<'a> { w: &'a mut W, } impl<'a> PREDV0SEL_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 16)) | (((value as u32) & 0x01) << 16); self.w } } #[doc = "Reader of field `I2S1SEL`"] pub type I2S1SEL_R = crate::R<bool, bool>; #[doc = "Write proxy for field `I2S1SEL`"] pub struct I2S1SEL_W<'a> { w: &'a mut W, } impl<'a> I2S1SEL_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 17)) | (((value as u32) & 0x01) << 17); self.w } } #[doc = "Reader of field `I2S2SEL`"] pub type I2S2SEL_R = crate::R<bool, bool>; #[doc = "Write proxy for field `I2S2SEL`"] pub struct I2S2SEL_W<'a> { w: &'a mut W, } impl<'a> I2S2SEL_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 18)) | (((value as u32) & 0x01) << 18); self.w } } impl R { #[doc = "Bits 0:3 - PREDV0 division factor"] #[inline(always)] pub fn predv0(&self) -> PREDV0_R { PREDV0_R::new((self.bits & 0x0f) as u8) } #[doc = "Bits 4:7 - PREDV1 division factor"] #[inline(always)] pub fn predv1(&self) -> PREDV1_R { PREDV1_R::new(((self.bits >> 4) & 0x0f) as u8) } #[doc = "Bits 8:11 - The PLL1 clock multiplication factor"] #[inline(always)] pub fn pll1mf(&self) -> PLL1MF_R { PLL1MF_R::new(((self.bits >> 8) & 0x0f) as u8) } #[doc = "Bits 12:15 - The PLL2 clock multiplication factor"] #[inline(always)] pub fn pll2mf(&self) -> PLL2MF_R { PLL2MF_R::new(((self.bits >> 12) & 0x0f) as u8) } #[doc = "Bit 16 - PREDV0 input Clock Source Selection"] #[inline(always)] pub fn predv0sel(&self) -> PREDV0SEL_R { PREDV0SEL_R::new(((self.bits >> 16) & 0x01) != 0) } #[doc = "Bit 17 - I2S1 Clock Source Selection"] #[inline(always)] pub fn i2s1sel(&self) -> I2S1SEL_R { I2S1SEL_R::new(((self.bits >> 17) & 0x01) != 0) } #[doc = "Bit 18 - I2S2 Clock Source Selection"] #[inline(always)] pub fn i2s2sel(&self) -> I2S2SEL_R { I2S2SEL_R::new(((self.bits >> 18) & 0x01) != 0) } } impl W { #[doc = "Bits 0:3 - PREDV0 division factor"] #[inline(always)] pub fn predv0(&mut self) -> PREDV0_W { PREDV0_W { w: self } } #[doc = "Bits 4:7 - PREDV1 division factor"] #[inline(always)] pub fn predv1(&mut self) -> PREDV1_W { PREDV1_W { w: self } } #[doc = "Bits 8:11 - The PLL1 clock multiplication factor"] #[inline(always)] pub fn pll1mf(&mut self) -> PLL1MF_W { PLL1MF_W { w: self } } #[doc = "Bits 12:15 - The PLL2 clock multiplication factor"] #[inline(always)] pub fn pll2mf(&mut self) -> PLL2MF_W { PLL2MF_W { w: self } } #[doc = "Bit 16 - PREDV0 input Clock Source Selection"] #[inline(always)] pub fn predv0sel(&mut self) -> PREDV0SEL_W { PREDV0SEL_W { w: self } } #[doc = "Bit 17 - I2S1 Clock Source Selection"] #[inline(always)] pub fn i2s1sel(&mut self) -> I2S1SEL_W { I2S1SEL_W { w: self } } #[doc = "Bit 18 - I2S2 Clock Source Selection"] #[inline(always)] pub fn i2s2sel(&mut self) -> I2S2SEL_W { I2S2SEL_W { w: self } } }