[][src]Type Definition gd32vf103_pac::timer1::dmainten::W

type W = W<u16, DMAINTEN>;

Writer for register DMAINTEN

Implementations

impl W[src]

pub fn trgden(&mut self) -> TRGDEN_W<'_>[src]

Bit 14 - Trigger DMA request enable

pub fn ch3den(&mut self) -> CH3DEN_W<'_>[src]

Bit 12 - Channel 3 capture/compare DMA request enable

pub fn ch2den(&mut self) -> CH2DEN_W<'_>[src]

Bit 11 - Channel 2 capture/compare DMA request enable

pub fn ch1den(&mut self) -> CH1DEN_W<'_>[src]

Bit 10 - Channel 1 capture/compare DMA request enable

pub fn ch0den(&mut self) -> CH0DEN_W<'_>[src]

Bit 9 - Channel 0 capture/compare DMA request enable

pub fn upden(&mut self) -> UPDEN_W<'_>[src]

Bit 8 - Update DMA request enable

pub fn trgie(&mut self) -> TRGIE_W<'_>[src]

Bit 6 - Trigger interrupt enable

pub fn ch3ie(&mut self) -> CH3IE_W<'_>[src]

Bit 4 - Channel 3 capture/compare interrupt enable

pub fn ch2ie(&mut self) -> CH2IE_W<'_>[src]

Bit 3 - Channel 2 capture/compare interrupt enable

pub fn ch1ie(&mut self) -> CH1IE_W<'_>[src]

Bit 2 - Channel 1 capture/compare interrupt enable

pub fn ch0ie(&mut self) -> CH0IE_W<'_>[src]

Bit 1 - Channel 0 capture/compare interrupt enable

pub fn upie(&mut self) -> UPIE_W<'_>[src]

Bit 0 - Update interrupt enable