gd32f2/gd32f205/
sdio.rs

1#[repr(C)]
2#[doc = "Register block"]
3pub struct RegisterBlock {
4    pwrctl: Pwrctl,
5    clkctl: Clkctl,
6    cmdagmt: Cmdagmt,
7    cmdctl: Cmdctl,
8    rspcmdidx: Rspcmdidx,
9    resp0: Resp0,
10    resp1: Resp1,
11    resp2: Resp2,
12    resp3: Resp3,
13    datato: Datato,
14    datalen: Datalen,
15    datactl: Datactl,
16    datacnt: Datacnt,
17    stat: Stat,
18    intc: Intc,
19    inten: Inten,
20    _reserved16: [u8; 0x08],
21    fifocnt: Fifocnt,
22    _reserved17: [u8; 0x34],
23    fifo: Fifo,
24}
25impl RegisterBlock {
26    #[doc = "0x00 - Power control register"]
27    #[inline(always)]
28    pub const fn pwrctl(&self) -> &Pwrctl {
29        &self.pwrctl
30    }
31    #[doc = "0x04 - SDI clock control register (SDIO_CLKCTL)"]
32    #[inline(always)]
33    pub const fn clkctl(&self) -> &Clkctl {
34        &self.clkctl
35    }
36    #[doc = "0x08 - Command argument register"]
37    #[inline(always)]
38    pub const fn cmdagmt(&self) -> &Cmdagmt {
39        &self.cmdagmt
40    }
41    #[doc = "0x0c - Command control register"]
42    #[inline(always)]
43    pub const fn cmdctl(&self) -> &Cmdctl {
44        &self.cmdctl
45    }
46    #[doc = "0x10 - Command index response register"]
47    #[inline(always)]
48    pub const fn rspcmdidx(&self) -> &Rspcmdidx {
49        &self.rspcmdidx
50    }
51    #[doc = "0x14 - Response register 0"]
52    #[inline(always)]
53    pub const fn resp0(&self) -> &Resp0 {
54        &self.resp0
55    }
56    #[doc = "0x18 - Response register 1"]
57    #[inline(always)]
58    pub const fn resp1(&self) -> &Resp1 {
59        &self.resp1
60    }
61    #[doc = "0x1c - Response register 2"]
62    #[inline(always)]
63    pub const fn resp2(&self) -> &Resp2 {
64        &self.resp2
65    }
66    #[doc = "0x20 - Response register 3"]
67    #[inline(always)]
68    pub const fn resp3(&self) -> &Resp3 {
69        &self.resp3
70    }
71    #[doc = "0x24 - Data timeout register"]
72    #[inline(always)]
73    pub const fn datato(&self) -> &Datato {
74        &self.datato
75    }
76    #[doc = "0x28 - Data length register"]
77    #[inline(always)]
78    pub const fn datalen(&self) -> &Datalen {
79        &self.datalen
80    }
81    #[doc = "0x2c - Data control register"]
82    #[inline(always)]
83    pub const fn datactl(&self) -> &Datactl {
84        &self.datactl
85    }
86    #[doc = "0x30 - Data counter register"]
87    #[inline(always)]
88    pub const fn datacnt(&self) -> &Datacnt {
89        &self.datacnt
90    }
91    #[doc = "0x34 - SDIO status register (SDIO_STR)"]
92    #[inline(always)]
93    pub const fn stat(&self) -> &Stat {
94        &self.stat
95    }
96    #[doc = "0x38 - Interrupt clear register (SDIO_INTC)"]
97    #[inline(always)]
98    pub const fn intc(&self) -> &Intc {
99        &self.intc
100    }
101    #[doc = "0x3c - Interrupt Enable register"]
102    #[inline(always)]
103    pub const fn inten(&self) -> &Inten {
104        &self.inten
105    }
106    #[doc = "0x48 - FIFO counter register"]
107    #[inline(always)]
108    pub const fn fifocnt(&self) -> &Fifocnt {
109        &self.fifocnt
110    }
111    #[doc = "0x80 - FIFO data register"]
112    #[inline(always)]
113    pub const fn fifo(&self) -> &Fifo {
114        &self.fifo
115    }
116}
117#[doc = "PWRCTL (rw) register accessor: Power control register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pwrctl::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pwrctl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pwrctl`]
118module"]
119#[doc(alias = "PWRCTL")]
120pub type Pwrctl = crate::Reg<pwrctl::PwrctlSpec>;
121#[doc = "Power control register"]
122pub mod pwrctl;
123#[doc = "CLKCTL (rw) register accessor: SDI clock control register (SDIO_CLKCTL)\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`clkctl::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clkctl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clkctl`]
124module"]
125#[doc(alias = "CLKCTL")]
126pub type Clkctl = crate::Reg<clkctl::ClkctlSpec>;
127#[doc = "SDI clock control register (SDIO_CLKCTL)"]
128pub mod clkctl;
129#[doc = "CMDAGMT (rw) register accessor: Command argument register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cmdagmt::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cmdagmt::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cmdagmt`]
130module"]
131#[doc(alias = "CMDAGMT")]
132pub type Cmdagmt = crate::Reg<cmdagmt::CmdagmtSpec>;
133#[doc = "Command argument register"]
134pub mod cmdagmt;
135#[doc = "CMDCTL (rw) register accessor: Command control register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cmdctl::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cmdctl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cmdctl`]
136module"]
137#[doc(alias = "CMDCTL")]
138pub type Cmdctl = crate::Reg<cmdctl::CmdctlSpec>;
139#[doc = "Command control register"]
140pub mod cmdctl;
141#[doc = "RSPCMDIDX (r) register accessor: Command index response register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rspcmdidx::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rspcmdidx`]
142module"]
143#[doc(alias = "RSPCMDIDX")]
144pub type Rspcmdidx = crate::Reg<rspcmdidx::RspcmdidxSpec>;
145#[doc = "Command index response register"]
146pub mod rspcmdidx;
147#[doc = "RESP0 (r) register accessor: Response register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`resp0::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@resp0`]
148module"]
149#[doc(alias = "RESP0")]
150pub type Resp0 = crate::Reg<resp0::Resp0Spec>;
151#[doc = "Response register 0"]
152pub mod resp0;
153#[doc = "RESP1 (r) register accessor: Response register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`resp1::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@resp1`]
154module"]
155#[doc(alias = "RESP1")]
156pub type Resp1 = crate::Reg<resp1::Resp1Spec>;
157#[doc = "Response register 1"]
158pub mod resp1;
159#[doc = "RESP2 (r) register accessor: Response register 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`resp2::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@resp2`]
160module"]
161#[doc(alias = "RESP2")]
162pub type Resp2 = crate::Reg<resp2::Resp2Spec>;
163#[doc = "Response register 2"]
164pub mod resp2;
165#[doc = "RESP3 (r) register accessor: Response register 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`resp3::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@resp3`]
166module"]
167#[doc(alias = "RESP3")]
168pub type Resp3 = crate::Reg<resp3::Resp3Spec>;
169#[doc = "Response register 3"]
170pub mod resp3;
171#[doc = "DATATO (rw) register accessor: Data timeout register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`datato::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`datato::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@datato`]
172module"]
173#[doc(alias = "DATATO")]
174pub type Datato = crate::Reg<datato::DatatoSpec>;
175#[doc = "Data timeout register"]
176pub mod datato;
177#[doc = "DATALEN (rw) register accessor: Data length register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`datalen::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`datalen::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@datalen`]
178module"]
179#[doc(alias = "DATALEN")]
180pub type Datalen = crate::Reg<datalen::DatalenSpec>;
181#[doc = "Data length register"]
182pub mod datalen;
183#[doc = "DATACTL (rw) register accessor: Data control register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`datactl::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`datactl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@datactl`]
184module"]
185#[doc(alias = "DATACTL")]
186pub type Datactl = crate::Reg<datactl::DatactlSpec>;
187#[doc = "Data control register"]
188pub mod datactl;
189#[doc = "DATACNT (r) register accessor: Data counter register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`datacnt::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@datacnt`]
190module"]
191#[doc(alias = "DATACNT")]
192pub type Datacnt = crate::Reg<datacnt::DatacntSpec>;
193#[doc = "Data counter register"]
194pub mod datacnt;
195#[doc = "STAT (r) register accessor: SDIO status register (SDIO_STR)\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`stat::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@stat`]
196module"]
197#[doc(alias = "STAT")]
198pub type Stat = crate::Reg<stat::StatSpec>;
199#[doc = "SDIO status register (SDIO_STR)"]
200pub mod stat;
201#[doc = "INTC (w) register accessor: Interrupt clear register (SDIO_INTC)\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`intc::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@intc`]
202module"]
203#[doc(alias = "INTC")]
204pub type Intc = crate::Reg<intc::IntcSpec>;
205#[doc = "Interrupt clear register (SDIO_INTC)"]
206pub mod intc;
207#[doc = "INTEN (rw) register accessor: Interrupt Enable register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`inten::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`inten::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@inten`]
208module"]
209#[doc(alias = "INTEN")]
210pub type Inten = crate::Reg<inten::IntenSpec>;
211#[doc = "Interrupt Enable register"]
212pub mod inten;
213#[doc = "FIFOCNT (r) register accessor: FIFO counter register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`fifocnt::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@fifocnt`]
214module"]
215#[doc(alias = "FIFOCNT")]
216pub type Fifocnt = crate::Reg<fifocnt::FifocntSpec>;
217#[doc = "FIFO counter register"]
218pub mod fifocnt;
219#[doc = "FIFO (rw) register accessor: FIFO data register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`fifo::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`fifo::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@fifo`]
220module"]
221#[doc(alias = "FIFO")]
222pub type Fifo = crate::Reg<fifo::FifoSpec>;
223#[doc = "FIFO data register"]
224pub mod fifo;