gd32f2/gd32f205/timer1/
chctl0_output.rs1#[doc = "Register `CHCTL0_Output` reader"]
2pub type R = crate::R<Chctl0OutputSpec>;
3#[doc = "Register `CHCTL0_Output` writer"]
4pub type W = crate::W<Chctl0OutputSpec>;
5#[doc = "Channel 0 output compare clear enable"]
6pub use crate::gd32f205::timer0::chctl0_output::Ch0comcen;
7#[doc = "Field `CH0COMCEN` reader - Channel 0 output compare clear enable"]
8pub use crate::gd32f205::timer0::chctl0_output::Ch0comcenR;
9#[doc = "Field `CH1COMCEN` reader - Channel 1 output compare clear enable"]
10pub use crate::gd32f205::timer0::chctl0_output::Ch0comcenR as Ch1comcenR;
11#[doc = "Field `CH0COMCEN` writer - Channel 0 output compare clear enable"]
12pub use crate::gd32f205::timer0::chctl0_output::Ch0comcenW;
13#[doc = "Field `CH1COMCEN` writer - Channel 1 output compare clear enable"]
14pub use crate::gd32f205::timer0::chctl0_output::Ch0comcenW as Ch1comcenW;
15#[doc = "Channel 0 compare output control"]
16pub use crate::gd32f205::timer0::chctl0_output::Ch0comctl;
17#[doc = "Field `CH0COMCTL` reader - Channel 0 compare output control"]
18pub use crate::gd32f205::timer0::chctl0_output::Ch0comctlR;
19#[doc = "Field `CH1COMCTL` reader - Channel 1 compare output control"]
20pub use crate::gd32f205::timer0::chctl0_output::Ch0comctlR as Ch1comctlR;
21#[doc = "Field `CH0COMCTL` writer - Channel 0 compare output control"]
22pub use crate::gd32f205::timer0::chctl0_output::Ch0comctlW;
23#[doc = "Field `CH1COMCTL` writer - Channel 1 compare output control"]
24pub use crate::gd32f205::timer0::chctl0_output::Ch0comctlW as Ch1comctlW;
25#[doc = "Channel 0 output compare fast enable"]
26pub use crate::gd32f205::timer0::chctl0_output::Ch0comfen;
27#[doc = "Field `CH0COMFEN` reader - Channel 0 output compare fast enable"]
28pub use crate::gd32f205::timer0::chctl0_output::Ch0comfenR;
29#[doc = "Field `CH1COMFEN` reader - Channel 1 output compare fast enable"]
30pub use crate::gd32f205::timer0::chctl0_output::Ch0comfenR as Ch1comfenR;
31#[doc = "Field `CH0COMFEN` writer - Channel 0 output compare fast enable"]
32pub use crate::gd32f205::timer0::chctl0_output::Ch0comfenW;
33#[doc = "Field `CH1COMFEN` writer - Channel 1 output compare fast enable"]
34pub use crate::gd32f205::timer0::chctl0_output::Ch0comfenW as Ch1comfenW;
35#[doc = "Channel 0 compare output shadow enable"]
36pub use crate::gd32f205::timer0::chctl0_output::Ch0comsen;
37#[doc = "Field `CH0COMSEN` reader - Channel 0 compare output shadow enable"]
38pub use crate::gd32f205::timer0::chctl0_output::Ch0comsenR;
39#[doc = "Field `CH1COMSEN` reader - Channel 1 output compare shadow enable"]
40pub use crate::gd32f205::timer0::chctl0_output::Ch0comsenR as Ch1comsenR;
41#[doc = "Field `CH0COMSEN` writer - Channel 0 compare output shadow enable"]
42pub use crate::gd32f205::timer0::chctl0_output::Ch0comsenW;
43#[doc = "Field `CH1COMSEN` writer - Channel 1 output compare shadow enable"]
44pub use crate::gd32f205::timer0::chctl0_output::Ch0comsenW as Ch1comsenW;
45#[doc = "Channel 0 I/O mode selection"]
46pub use crate::gd32f205::timer0::chctl0_output::Ch0ms;
47#[doc = "Field `CH0MS` reader - Channel 0 I/O mode selection"]
48pub use crate::gd32f205::timer0::chctl0_output::Ch0msR;
49#[doc = "Field `CH1MS` reader - Channel 1 mode selection"]
50pub use crate::gd32f205::timer0::chctl0_output::Ch0msR as Ch1msR;
51#[doc = "Field `CH0MS` writer - Channel 0 I/O mode selection"]
52pub use crate::gd32f205::timer0::chctl0_output::Ch0msW;
53#[doc = "Field `CH1MS` writer - Channel 1 mode selection"]
54pub use crate::gd32f205::timer0::chctl0_output::Ch0msW as Ch1msW;
55impl R {
56 #[doc = "Bits 0:1 - Channel 0 I/O mode selection"]
57 #[inline(always)]
58 pub fn ch0ms(&self) -> Ch0msR {
59 Ch0msR::new((self.bits & 3) as u8)
60 }
61 #[doc = "Bit 2 - Channel 0 output compare fast enable"]
62 #[inline(always)]
63 pub fn ch0comfen(&self) -> Ch0comfenR {
64 Ch0comfenR::new(((self.bits >> 2) & 1) != 0)
65 }
66 #[doc = "Bit 3 - Channel 0 compare output shadow enable"]
67 #[inline(always)]
68 pub fn ch0comsen(&self) -> Ch0comsenR {
69 Ch0comsenR::new(((self.bits >> 3) & 1) != 0)
70 }
71 #[doc = "Bits 4:6 - Channel 0 compare output control"]
72 #[inline(always)]
73 pub fn ch0comctl(&self) -> Ch0comctlR {
74 Ch0comctlR::new(((self.bits >> 4) & 7) as u8)
75 }
76 #[doc = "Bit 7 - Channel 0 output compare clear enable"]
77 #[inline(always)]
78 pub fn ch0comcen(&self) -> Ch0comcenR {
79 Ch0comcenR::new(((self.bits >> 7) & 1) != 0)
80 }
81 #[doc = "Bits 8:9 - Channel 1 mode selection"]
82 #[inline(always)]
83 pub fn ch1ms(&self) -> Ch1msR {
84 Ch1msR::new(((self.bits >> 8) & 3) as u8)
85 }
86 #[doc = "Bit 10 - Channel 1 output compare fast enable"]
87 #[inline(always)]
88 pub fn ch1comfen(&self) -> Ch1comfenR {
89 Ch1comfenR::new(((self.bits >> 10) & 1) != 0)
90 }
91 #[doc = "Bit 11 - Channel 1 output compare shadow enable"]
92 #[inline(always)]
93 pub fn ch1comsen(&self) -> Ch1comsenR {
94 Ch1comsenR::new(((self.bits >> 11) & 1) != 0)
95 }
96 #[doc = "Bits 12:14 - Channel 1 compare output control"]
97 #[inline(always)]
98 pub fn ch1comctl(&self) -> Ch1comctlR {
99 Ch1comctlR::new(((self.bits >> 12) & 7) as u8)
100 }
101 #[doc = "Bit 15 - Channel 1 output compare clear enable"]
102 #[inline(always)]
103 pub fn ch1comcen(&self) -> Ch1comcenR {
104 Ch1comcenR::new(((self.bits >> 15) & 1) != 0)
105 }
106}
107impl W {
108 #[doc = "Bits 0:1 - Channel 0 I/O mode selection"]
109 #[inline(always)]
110 #[must_use]
111 pub fn ch0ms(&mut self) -> Ch0msW<Chctl0OutputSpec> {
112 Ch0msW::new(self, 0)
113 }
114 #[doc = "Bit 2 - Channel 0 output compare fast enable"]
115 #[inline(always)]
116 #[must_use]
117 pub fn ch0comfen(&mut self) -> Ch0comfenW<Chctl0OutputSpec> {
118 Ch0comfenW::new(self, 2)
119 }
120 #[doc = "Bit 3 - Channel 0 compare output shadow enable"]
121 #[inline(always)]
122 #[must_use]
123 pub fn ch0comsen(&mut self) -> Ch0comsenW<Chctl0OutputSpec> {
124 Ch0comsenW::new(self, 3)
125 }
126 #[doc = "Bits 4:6 - Channel 0 compare output control"]
127 #[inline(always)]
128 #[must_use]
129 pub fn ch0comctl(&mut self) -> Ch0comctlW<Chctl0OutputSpec> {
130 Ch0comctlW::new(self, 4)
131 }
132 #[doc = "Bit 7 - Channel 0 output compare clear enable"]
133 #[inline(always)]
134 #[must_use]
135 pub fn ch0comcen(&mut self) -> Ch0comcenW<Chctl0OutputSpec> {
136 Ch0comcenW::new(self, 7)
137 }
138 #[doc = "Bits 8:9 - Channel 1 mode selection"]
139 #[inline(always)]
140 #[must_use]
141 pub fn ch1ms(&mut self) -> Ch1msW<Chctl0OutputSpec> {
142 Ch1msW::new(self, 8)
143 }
144 #[doc = "Bit 10 - Channel 1 output compare fast enable"]
145 #[inline(always)]
146 #[must_use]
147 pub fn ch1comfen(&mut self) -> Ch1comfenW<Chctl0OutputSpec> {
148 Ch1comfenW::new(self, 10)
149 }
150 #[doc = "Bit 11 - Channel 1 output compare shadow enable"]
151 #[inline(always)]
152 #[must_use]
153 pub fn ch1comsen(&mut self) -> Ch1comsenW<Chctl0OutputSpec> {
154 Ch1comsenW::new(self, 11)
155 }
156 #[doc = "Bits 12:14 - Channel 1 compare output control"]
157 #[inline(always)]
158 #[must_use]
159 pub fn ch1comctl(&mut self) -> Ch1comctlW<Chctl0OutputSpec> {
160 Ch1comctlW::new(self, 12)
161 }
162 #[doc = "Bit 15 - Channel 1 output compare clear enable"]
163 #[inline(always)]
164 #[must_use]
165 pub fn ch1comcen(&mut self) -> Ch1comcenW<Chctl0OutputSpec> {
166 Ch1comcenW::new(self, 15)
167 }
168}
169#[doc = "Channel control register 0 (output mode)\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`chctl0_output::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`chctl0_output::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
170pub struct Chctl0OutputSpec;
171impl crate::RegisterSpec for Chctl0OutputSpec {
172 type Ux = u32;
173}
174#[doc = "`read()` method returns [`chctl0_output::R`](R) reader structure"]
175impl crate::Readable for Chctl0OutputSpec {}
176#[doc = "`write(|w| ..)` method takes [`chctl0_output::W`](W) writer structure"]
177impl crate::Writable for Chctl0OutputSpec {
178 type Safety = crate::Unsafe;
179 const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
180 const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
181}
182#[doc = "`reset()` method sets CHCTL0_Output to value 0"]
183impl crate::Resettable for Chctl0OutputSpec {
184 const RESET_VALUE: u32 = 0;
185}