1#[repr(C)]
2#[doc = "Register block"]
3pub struct RegisterBlock {
4 snctl0: Snctl0,
5 sntcfg0: Sntcfg0,
6 snctl1: Snctl1,
7 sntcfg1: Sntcfg1,
8 snctl2: Snctl2,
9 sntcfg2: Sntcfg2,
10 snctl3: Snctl3,
11 sntcfg3: Sntcfg3,
12 _reserved8: [u8; 0x40],
13 npctl1: Npctl1,
14 npinten1: Npinten1,
15 npctcfg1: Npctcfg1,
16 npatcfg1: Npatcfg1,
17 _reserved12: [u8; 0x04],
18 necc1: Necc1,
19 _reserved13: [u8; 0x08],
20 npctl2: Npctl2,
21 npinten2: Npinten2,
22 npctcfg2: Npctcfg2,
23 npatcfg2: Npatcfg2,
24 _reserved17: [u8; 0x04],
25 necc2: Necc2,
26 _reserved18: [u8; 0x08],
27 npctl3: Npctl3,
28 npinten3: Npinten3,
29 npctcfg3: Npctcfg3,
30 npatcfg3: Npatcfg3,
31 piotcfg3: Piotcfg3,
32 _reserved23: [u8; 0x50],
33 snwtcfg0: Snwtcfg0,
34 _reserved24: [u8; 0x04],
35 snwtcfg1: Snwtcfg1,
36 _reserved25: [u8; 0x04],
37 snwtcfg2: Snwtcfg2,
38 _reserved26: [u8; 0x04],
39 snwtcfg3: Snwtcfg3,
40}
41impl RegisterBlock {
42 #[doc = "0x00 - SRAM/NOR flash control register 0"]
43 #[inline(always)]
44 pub const fn snctl0(&self) -> &Snctl0 {
45 &self.snctl0
46 }
47 #[doc = "0x04 - SRAM/NOR flash timing configuration register 0"]
48 #[inline(always)]
49 pub const fn sntcfg0(&self) -> &Sntcfg0 {
50 &self.sntcfg0
51 }
52 #[doc = "0x08 - SRAM/NOR flash control register 1"]
53 #[inline(always)]
54 pub const fn snctl1(&self) -> &Snctl1 {
55 &self.snctl1
56 }
57 #[doc = "0x0c - SRAM/NOR flash timing configuration register 1"]
58 #[inline(always)]
59 pub const fn sntcfg1(&self) -> &Sntcfg1 {
60 &self.sntcfg1
61 }
62 #[doc = "0x10 - SRAM/NOR flash control register 2"]
63 #[inline(always)]
64 pub const fn snctl2(&self) -> &Snctl2 {
65 &self.snctl2
66 }
67 #[doc = "0x14 - SRAM/NOR flash timing configuration register 2"]
68 #[inline(always)]
69 pub const fn sntcfg2(&self) -> &Sntcfg2 {
70 &self.sntcfg2
71 }
72 #[doc = "0x18 - SRAM/NOR flash control register 3"]
73 #[inline(always)]
74 pub const fn snctl3(&self) -> &Snctl3 {
75 &self.snctl3
76 }
77 #[doc = "0x1c - SRAM/NOR flash timing configuration register 3"]
78 #[inline(always)]
79 pub const fn sntcfg3(&self) -> &Sntcfg3 {
80 &self.sntcfg3
81 }
82 #[doc = "0x60 - NAND flash/PC card control register 1"]
83 #[inline(always)]
84 pub const fn npctl1(&self) -> &Npctl1 {
85 &self.npctl1
86 }
87 #[doc = "0x64 - NAND flash/PC card interrupt enable register 1"]
88 #[inline(always)]
89 pub const fn npinten1(&self) -> &Npinten1 {
90 &self.npinten1
91 }
92 #[doc = "0x68 - NAND flash/PC card common space timing configuration register 1"]
93 #[inline(always)]
94 pub const fn npctcfg1(&self) -> &Npctcfg1 {
95 &self.npctcfg1
96 }
97 #[doc = "0x6c - NAND flash/PC card attribute space timing configuration register 1"]
98 #[inline(always)]
99 pub const fn npatcfg1(&self) -> &Npatcfg1 {
100 &self.npatcfg1
101 }
102 #[doc = "0x74 - NAND flash ECC register 1"]
103 #[inline(always)]
104 pub const fn necc1(&self) -> &Necc1 {
105 &self.necc1
106 }
107 #[doc = "0x80 - NAND flash/PC card control register 2"]
108 #[inline(always)]
109 pub const fn npctl2(&self) -> &Npctl2 {
110 &self.npctl2
111 }
112 #[doc = "0x84 - NAND flash/PC card interrupt enable register 2"]
113 #[inline(always)]
114 pub const fn npinten2(&self) -> &Npinten2 {
115 &self.npinten2
116 }
117 #[doc = "0x88 - NAND flash/PC card common space timing configuration register 2"]
118 #[inline(always)]
119 pub const fn npctcfg2(&self) -> &Npctcfg2 {
120 &self.npctcfg2
121 }
122 #[doc = "0x8c - NAND flash/PC card attribute space timing configuration register 2"]
123 #[inline(always)]
124 pub const fn npatcfg2(&self) -> &Npatcfg2 {
125 &self.npatcfg2
126 }
127 #[doc = "0x94 - NAND flash ECC register 2"]
128 #[inline(always)]
129 pub const fn necc2(&self) -> &Necc2 {
130 &self.necc2
131 }
132 #[doc = "0xa0 - NAND flash/PC card control register 3"]
133 #[inline(always)]
134 pub const fn npctl3(&self) -> &Npctl3 {
135 &self.npctl3
136 }
137 #[doc = "0xa4 - NAND flash/PC card interrupt enable register 3"]
138 #[inline(always)]
139 pub const fn npinten3(&self) -> &Npinten3 {
140 &self.npinten3
141 }
142 #[doc = "0xa8 - NAND flash/PC card common space timing configuration register 3"]
143 #[inline(always)]
144 pub const fn npctcfg3(&self) -> &Npctcfg3 {
145 &self.npctcfg3
146 }
147 #[doc = "0xac - NAND flash/PC card attribute space timing configuration register 3"]
148 #[inline(always)]
149 pub const fn npatcfg3(&self) -> &Npatcfg3 {
150 &self.npatcfg3
151 }
152 #[doc = "0xb0 - PC card I/O space timing configuration register"]
153 #[inline(always)]
154 pub const fn piotcfg3(&self) -> &Piotcfg3 {
155 &self.piotcfg3
156 }
157 #[doc = "0x104 - SRAM/NOR flash write timing configuration register 0"]
158 #[inline(always)]
159 pub const fn snwtcfg0(&self) -> &Snwtcfg0 {
160 &self.snwtcfg0
161 }
162 #[doc = "0x10c - SRAM/NOR flash write timing configuration register 1"]
163 #[inline(always)]
164 pub const fn snwtcfg1(&self) -> &Snwtcfg1 {
165 &self.snwtcfg1
166 }
167 #[doc = "0x114 - SRAM/NOR flash write timing configuration register 2"]
168 #[inline(always)]
169 pub const fn snwtcfg2(&self) -> &Snwtcfg2 {
170 &self.snwtcfg2
171 }
172 #[doc = "0x11c - SRAM/NOR flash write timing configuration register 3"]
173 #[inline(always)]
174 pub const fn snwtcfg3(&self) -> &Snwtcfg3 {
175 &self.snwtcfg3
176 }
177}
178#[doc = "SNCTL0 (rw) register accessor: SRAM/NOR flash control register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`snctl0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`snctl0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@snctl0`]
179module"]
180#[doc(alias = "SNCTL0")]
181pub type Snctl0 = crate::Reg<snctl0::Snctl0Spec>;
182#[doc = "SRAM/NOR flash control register 0"]
183pub mod snctl0;
184#[doc = "SNTCFG0 (rw) register accessor: SRAM/NOR flash timing configuration register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sntcfg0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sntcfg0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sntcfg0`]
185module"]
186#[doc(alias = "SNTCFG0")]
187pub type Sntcfg0 = crate::Reg<sntcfg0::Sntcfg0Spec>;
188#[doc = "SRAM/NOR flash timing configuration register 0"]
189pub mod sntcfg0;
190#[doc = "SNCTL1 (rw) register accessor: SRAM/NOR flash control register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`snctl1::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`snctl1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@snctl1`]
191module"]
192#[doc(alias = "SNCTL1")]
193pub type Snctl1 = crate::Reg<snctl1::Snctl1Spec>;
194#[doc = "SRAM/NOR flash control register 1"]
195pub mod snctl1;
196#[doc = "SNTCFG1 (rw) register accessor: SRAM/NOR flash timing configuration register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sntcfg1::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sntcfg1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sntcfg1`]
197module"]
198#[doc(alias = "SNTCFG1")]
199pub type Sntcfg1 = crate::Reg<sntcfg1::Sntcfg1Spec>;
200#[doc = "SRAM/NOR flash timing configuration register 1"]
201pub mod sntcfg1;
202#[doc = "SNCTL2 (rw) register accessor: SRAM/NOR flash control register 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`snctl2::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`snctl2::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@snctl2`]
203module"]
204#[doc(alias = "SNCTL2")]
205pub type Snctl2 = crate::Reg<snctl2::Snctl2Spec>;
206#[doc = "SRAM/NOR flash control register 2"]
207pub mod snctl2;
208#[doc = "SNTCFG2 (rw) register accessor: SRAM/NOR flash timing configuration register 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sntcfg2::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sntcfg2::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sntcfg2`]
209module"]
210#[doc(alias = "SNTCFG2")]
211pub type Sntcfg2 = crate::Reg<sntcfg2::Sntcfg2Spec>;
212#[doc = "SRAM/NOR flash timing configuration register 2"]
213pub mod sntcfg2;
214#[doc = "SNCTL3 (rw) register accessor: SRAM/NOR flash control register 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`snctl3::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`snctl3::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@snctl3`]
215module"]
216#[doc(alias = "SNCTL3")]
217pub type Snctl3 = crate::Reg<snctl3::Snctl3Spec>;
218#[doc = "SRAM/NOR flash control register 3"]
219pub mod snctl3;
220#[doc = "SNTCFG3 (rw) register accessor: SRAM/NOR flash timing configuration register 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sntcfg3::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sntcfg3::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sntcfg3`]
221module"]
222#[doc(alias = "SNTCFG3")]
223pub type Sntcfg3 = crate::Reg<sntcfg3::Sntcfg3Spec>;
224#[doc = "SRAM/NOR flash timing configuration register 3"]
225pub mod sntcfg3;
226#[doc = "SNWTCFG0 (rw) register accessor: SRAM/NOR flash write timing configuration register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`snwtcfg0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`snwtcfg0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@snwtcfg0`]
227module"]
228#[doc(alias = "SNWTCFG0")]
229pub type Snwtcfg0 = crate::Reg<snwtcfg0::Snwtcfg0Spec>;
230#[doc = "SRAM/NOR flash write timing configuration register 0"]
231pub mod snwtcfg0;
232#[doc = "SNWTCFG1 (rw) register accessor: SRAM/NOR flash write timing configuration register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`snwtcfg1::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`snwtcfg1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@snwtcfg1`]
233module"]
234#[doc(alias = "SNWTCFG1")]
235pub type Snwtcfg1 = crate::Reg<snwtcfg1::Snwtcfg1Spec>;
236#[doc = "SRAM/NOR flash write timing configuration register 1"]
237pub mod snwtcfg1;
238#[doc = "SNWTCFG2 (rw) register accessor: SRAM/NOR flash write timing configuration register 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`snwtcfg2::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`snwtcfg2::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@snwtcfg2`]
239module"]
240#[doc(alias = "SNWTCFG2")]
241pub type Snwtcfg2 = crate::Reg<snwtcfg2::Snwtcfg2Spec>;
242#[doc = "SRAM/NOR flash write timing configuration register 2"]
243pub mod snwtcfg2;
244#[doc = "SNWTCFG3 (rw) register accessor: SRAM/NOR flash write timing configuration register 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`snwtcfg3::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`snwtcfg3::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@snwtcfg3`]
245module"]
246#[doc(alias = "SNWTCFG3")]
247pub type Snwtcfg3 = crate::Reg<snwtcfg3::Snwtcfg3Spec>;
248#[doc = "SRAM/NOR flash write timing configuration register 3"]
249pub mod snwtcfg3;
250#[doc = "NPCTL1 (rw) register accessor: NAND flash/PC card control register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`npctl1::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`npctl1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@npctl1`]
251module"]
252#[doc(alias = "NPCTL1")]
253pub type Npctl1 = crate::Reg<npctl1::Npctl1Spec>;
254#[doc = "NAND flash/PC card control register 1"]
255pub mod npctl1;
256#[doc = "NPCTL2 (rw) register accessor: NAND flash/PC card control register 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`npctl2::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`npctl2::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@npctl2`]
257module"]
258#[doc(alias = "NPCTL2")]
259pub type Npctl2 = crate::Reg<npctl2::Npctl2Spec>;
260#[doc = "NAND flash/PC card control register 2"]
261pub mod npctl2;
262#[doc = "NPCTL3 (rw) register accessor: NAND flash/PC card control register 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`npctl3::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`npctl3::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@npctl3`]
263module"]
264#[doc(alias = "NPCTL3")]
265pub type Npctl3 = crate::Reg<npctl3::Npctl3Spec>;
266#[doc = "NAND flash/PC card control register 3"]
267pub mod npctl3;
268#[doc = "NPINTEN1 (rw) register accessor: NAND flash/PC card interrupt enable register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`npinten1::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`npinten1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@npinten1`]
269module"]
270#[doc(alias = "NPINTEN1")]
271pub type Npinten1 = crate::Reg<npinten1::Npinten1Spec>;
272#[doc = "NAND flash/PC card interrupt enable register 1"]
273pub mod npinten1;
274#[doc = "NPINTEN2 (rw) register accessor: NAND flash/PC card interrupt enable register 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`npinten2::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`npinten2::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@npinten2`]
275module"]
276#[doc(alias = "NPINTEN2")]
277pub type Npinten2 = crate::Reg<npinten2::Npinten2Spec>;
278#[doc = "NAND flash/PC card interrupt enable register 2"]
279pub mod npinten2;
280#[doc = "NPINTEN3 (rw) register accessor: NAND flash/PC card interrupt enable register 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`npinten3::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`npinten3::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@npinten3`]
281module"]
282#[doc(alias = "NPINTEN3")]
283pub type Npinten3 = crate::Reg<npinten3::Npinten3Spec>;
284#[doc = "NAND flash/PC card interrupt enable register 3"]
285pub mod npinten3;
286#[doc = "NPCTCFG1 (rw) register accessor: NAND flash/PC card common space timing configuration register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`npctcfg1::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`npctcfg1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@npctcfg1`]
287module"]
288#[doc(alias = "NPCTCFG1")]
289pub type Npctcfg1 = crate::Reg<npctcfg1::Npctcfg1Spec>;
290#[doc = "NAND flash/PC card common space timing configuration register 1"]
291pub mod npctcfg1;
292#[doc = "NPCTCFG2 (rw) register accessor: NAND flash/PC card common space timing configuration register 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`npctcfg2::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`npctcfg2::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@npctcfg2`]
293module"]
294#[doc(alias = "NPCTCFG2")]
295pub type Npctcfg2 = crate::Reg<npctcfg2::Npctcfg2Spec>;
296#[doc = "NAND flash/PC card common space timing configuration register 2"]
297pub mod npctcfg2;
298#[doc = "NPCTCFG3 (rw) register accessor: NAND flash/PC card common space timing configuration register 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`npctcfg3::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`npctcfg3::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@npctcfg3`]
299module"]
300#[doc(alias = "NPCTCFG3")]
301pub type Npctcfg3 = crate::Reg<npctcfg3::Npctcfg3Spec>;
302#[doc = "NAND flash/PC card common space timing configuration register 3"]
303pub mod npctcfg3;
304#[doc = "NPATCFG1 (rw) register accessor: NAND flash/PC card attribute space timing configuration register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`npatcfg1::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`npatcfg1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@npatcfg1`]
305module"]
306#[doc(alias = "NPATCFG1")]
307pub type Npatcfg1 = crate::Reg<npatcfg1::Npatcfg1Spec>;
308#[doc = "NAND flash/PC card attribute space timing configuration register 1"]
309pub mod npatcfg1;
310#[doc = "NPATCFG2 (rw) register accessor: NAND flash/PC card attribute space timing configuration register 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`npatcfg2::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`npatcfg2::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@npatcfg2`]
311module"]
312#[doc(alias = "NPATCFG2")]
313pub type Npatcfg2 = crate::Reg<npatcfg2::Npatcfg2Spec>;
314#[doc = "NAND flash/PC card attribute space timing configuration register 2"]
315pub mod npatcfg2;
316#[doc = "NPATCFG3 (rw) register accessor: NAND flash/PC card attribute space timing configuration register 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`npatcfg3::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`npatcfg3::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@npatcfg3`]
317module"]
318#[doc(alias = "NPATCFG3")]
319pub type Npatcfg3 = crate::Reg<npatcfg3::Npatcfg3Spec>;
320#[doc = "NAND flash/PC card attribute space timing configuration register 3"]
321pub mod npatcfg3;
322#[doc = "PIOTCFG3 (rw) register accessor: PC card I/O space timing configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`piotcfg3::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`piotcfg3::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@piotcfg3`]
323module"]
324#[doc(alias = "PIOTCFG3")]
325pub type Piotcfg3 = crate::Reg<piotcfg3::Piotcfg3Spec>;
326#[doc = "PC card I/O space timing configuration register"]
327pub mod piotcfg3;
328#[doc = "NECC1 (r) register accessor: NAND flash ECC register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`necc1::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@necc1`]
329module"]
330#[doc(alias = "NECC1")]
331pub type Necc1 = crate::Reg<necc1::Necc1Spec>;
332#[doc = "NAND flash ECC register 1"]
333pub mod necc1;
334#[doc = "NECC2 (r) register accessor: NAND flash ECC register 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`necc2::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@necc2`]
335module"]
336#[doc(alias = "NECC2")]
337pub type Necc2 = crate::Reg<necc2::Necc2Spec>;
338#[doc = "NAND flash ECC register 2"]
339pub mod necc2;