Struct gd32f1x0_hal::pac::dma::ch1ctl::R

pub struct R(_);

Register CH1CTL reader

Implementations

impl R

pub fn chen(&self) -> BitReaderRaw<CHEN_A>

Bit 0 - Channel enable

pub fn ftfie(&self) -> BitReaderRaw<FTFIE_A>

Bit 1 - Enable bit for full transfer finish interrupt

pub fn htfie(&self) -> BitReaderRaw<HTFIE_A>

Bit 2 - Enable bit for half transfer finish interrupt

pub fn errie(&self) -> BitReaderRaw<ERRIE_A>

Bit 3 - Enable bit for tranfer access error interrupt

pub fn dir(&self) -> BitReaderRaw<DIR_A>

Bit 4 - Transfer mode

pub fn cmen(&self) -> BitReaderRaw<CMEN_A>

Bit 5 - Circular mode enable

pub fn pnaga(&self) -> BitReaderRaw<PNAGA_A>

Bit 6 - Next address generation algorithm of peripheral

pub fn mnaga(&self) -> BitReaderRaw<PNAGA_A>

Bit 7 - Next address generation algorithm of memory

pub fn pwidth(&self) -> FieldReaderRaw<u8, PWIDTH_A>

Bits 8:9 - Transfer data size of peripheral

pub fn mwidth(&self) -> FieldReaderRaw<u8, PWIDTH_A>

Bits 10:11 - Transfer data size of memory

pub fn prio(&self) -> FieldReaderRaw<u8, PRIO_A>

Bits 12:13 - Priority Level of this channel

pub fn m2m(&self) -> BitReaderRaw<M2M_A>

Bit 14 - Memory to memory mode

Methods from Deref<Target = R<CH1CTL_SPEC>>

pub fn bits(&self) -> <REG as RegisterSpec>::Ux

Reads raw bits from register.

Trait Implementations

impl Deref for R

type Target = R<CH1CTL_SPEC>

The resulting type after dereferencing.

fn deref(&self) -> &<R as Deref>::Target

Dereferences the value.

impl From<R<CH1CTL_SPEC>> for R

fn from(reader: R<CH1CTL_SPEC>) -> R

Converts to this type from the input type.