Struct gd32f1x0_hal::pac::timer1::chctl0_output::CHCTL0_OUTPUT_SPEC [−][src]
pub struct CHCTL0_OUTPUT_SPEC;
Expand description
Channel control register 0 (output mode)
This register you can read
, write_with_zero
, reset
, write
, modify
. See API.
For information about available fields see chctl0_output module
Trait Implementations
impl Readable for CHCTL0_OUTPUT_SPEC
[src]
impl Readable for CHCTL0_OUTPUT_SPEC
[src]read()
method returns chctl0_output::R reader structure
impl RegisterSpec for CHCTL0_OUTPUT_SPEC
[src]
impl RegisterSpec for CHCTL0_OUTPUT_SPEC
[src]type Ux = u16
type Ux = u16
Raw register type (u8
, u16
, u32
, …).
impl Resettable for CHCTL0_OUTPUT_SPEC
[src]
impl Resettable for CHCTL0_OUTPUT_SPEC
[src]reset()
method sets CHCTL0_Output to value 0
pub fn reset_value() -> <CHCTL0_OUTPUT_SPEC as RegisterSpec>::Ux
[src]
pub fn reset_value() -> <CHCTL0_OUTPUT_SPEC as RegisterSpec>::Ux
[src]Reset value of the register.
impl Writable for CHCTL0_OUTPUT_SPEC
[src]
impl Writable for CHCTL0_OUTPUT_SPEC
[src]write(|w| ..)
method takes chctl0_output::W writer structure