Struct gd32f1x0_hal::pac::dma::ch6ctl0::R

pub struct R(_);

Register CH6CTL0 reader

Implementations

impl R

pub fn chen(&self) -> CHEN_R

Bit 0 - Channel enable

pub fn ftfie(&self) -> FTFIE_R

Bit 1 - Enable bit for full transfer finish interrupt

pub fn htfie(&self) -> HTFIE_R

Bit 2 - Enable bit for full transfer finish interrupt

pub fn taeie(&self) -> TAEIE_R

Bit 3 - Enable bit for tranfer access error interrupt

pub fn dir(&self) -> DIR_R

Bit 4 - Transfer mode

pub fn cmen(&self) -> CMEN_R

Bit 5 - Circular mode enable

pub fn pnaga(&self) -> PNAGA_R

Bit 6 - Next address generation algorithm of peripheral

pub fn mnaga(&self) -> PNAGA_R

Bit 7 - Next address generation algorithm of memory

pub fn pwidth(&self) -> PWIDTH_R

Bits 8:9 - Transfer data size of peripheral

pub fn mwidth(&self) -> PWIDTH_R

Bits 10:11 - Transfer data size of memory

pub fn prio(&self) -> PRIO_R

Bits 12:13 - Priority Level of this channel

pub fn m2m(&self) -> M2M_R

Bit 14 - Memory to memory mode

Methods from Deref<Target = R<CH6CTL0_SPEC>>

pub fn bits(&self) -> <REG as RegisterSpec>::Ux

Reads raw bits from register.

Trait Implementations

impl Deref for R

type Target = R<CH6CTL0_SPEC>

The resulting type after dereferencing.

pub fn deref(&self) -> &<R as Deref>::Target

Dereferences the value.

impl From<R<CH6CTL0_SPEC>> for R

pub fn from(reader: R<CH6CTL0_SPEC>) -> R

Performs the conversion.