Struct gd32f1::gd32f190::rcu::cfg0::R

pub struct R(_);

Register CFG0 reader

Implementations

impl R

pub fn scs(&self) -> SCS_R

Bits 0:1 - System clock switch

pub fn scss(&self) -> SCSS_R

Bits 2:3 - System clock switch status

pub fn ahbpsc(&self) -> AHBPSC_R

Bits 4:7 - AHB prescaler selection

pub fn apb1psc(&self) -> APB1PSC_R

Bits 8:10 - APB1 prescaler selection

pub fn apb2psc(&self) -> APB2PSC_R

Bits 11:13 - APB2 prescaler selection

pub fn adcpsc(&self) -> ADCPSC_R

Bits 14:15 - ADC clock prescaler selection

pub fn pllsel(&self) -> PLLSEL_R

Bit 16 - PLL Clock Source Selection

pub fn pllpredv(&self) -> PLLPREDV_R

Bit 17 - HXTAL divider for PLL source clock selection.

pub fn pllmf(&self) -> PLLMF_R

Bits 18:21 - PLL multiply factor

pub fn ckoutsel(&self) -> CKOUTSEL_R

Bits 24:26 - CK_OUT Clock Source Selection

pub fn pllmf_msb(&self) -> PLLMF_MSB_R

Bit 27 - Bit 4 of PLLMF register

pub fn ckoutdiv(&self) -> CKOUTDIV_R

Bits 28:30 - The CK_OUT divider which the CK_OUT frequency can be reduced

pub fn plldv(&self) -> PLLDV_R

Bit 31 - The CK_PLL divide by 1 or 2 for CK_OUT

Methods from Deref<Target = R<CFG0_SPEC>>

pub fn bits(&self) -> REG::Ux

Reads raw bits from register.

Trait Implementations

impl Deref for R

type Target = R<CFG0_SPEC>

The resulting type after dereferencing.

fn deref(&self) -> &Self::Target

Dereferences the value.

impl From<R<CFG0_SPEC>> for R

fn from(reader: R<CFG0_SPEC>) -> Self

Performs the conversion.