Struct gd32f1::gd32f130::timer14::smcfg::MSM_W [−][src]
pub struct MSM_W<'a> { /* fields omitted */ }
Field MSM
writer - Master/Slave mode
Implementations
impl<'a> MSM_W<'a>
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impl<'a> MSM_W<'a>
[src]pub fn variant(self, variant: MSM_A) -> &'a mut W
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Writes variant
to the field
pub fn no_sync(self) -> &'a mut W
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No action
pub fn sync(self) -> &'a mut W
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The effect of an event on the trigger input (TRGI) is delayed to allow a perfect synchronization between the current timer and its slaves (through TRGO). It is useful if we want to synchronize several timers on a single external event.
pub fn set_bit(self) -> &'a mut W
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Sets the field bit
pub fn clear_bit(self) -> &'a mut W
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Clears the field bit
pub fn bit(self, value: bool) -> &'a mut W
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Writes raw bits to the field