Struct gd32f1::gd32f130::dma::ch0ctl0::W [−][src]
pub struct W(_);
Register CH0CTL0
writer
Implementations
impl W
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impl W
[src]pub fn chen(&mut self) -> CHEN_W<'_>
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Bit 0 - Channel enable
pub fn ftfie(&mut self) -> FTFIE_W<'_>
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Bit 1 - Enable bit for full transfer finish interrupt
pub fn htfie(&mut self) -> HTFIE_W<'_>
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Bit 2 - Enable bit for half transfer finish interrupt
pub fn taeie(&mut self) -> TAEIE_W<'_>
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Bit 3 - Enable bit for tranfer access error interrupt
pub fn dir(&mut self) -> DIR_W<'_>
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Bit 4 - Transfer mode
pub fn cmen(&mut self) -> CMEN_W<'_>
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Bit 5 - Circular mode enable
pub fn pnaga(&mut self) -> PNAGA_W<'_>
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Bit 6 - Next address generation algorithm of peripheral
pub fn mnaga(&mut self) -> MNAGA_W<'_>
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Bit 7 - Next address generation algorithm of memory
pub fn pwidth(&mut self) -> PWIDTH_W<'_>
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Bits 8:9 - Transfer data size of peripheral
pub fn mwidth(&mut self) -> MWIDTH_W<'_>
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Bits 10:11 - Transfer data size of memory
pub fn prio(&mut self) -> PRIO_W<'_>
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Bits 12:13 - Priority Level of this channel
pub fn m2m(&mut self) -> M2M_W<'_>
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Bit 14 - Memory to memory mode
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self
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Writes raw bits to the register.
Methods from Deref<Target = W<CH0CTL0_SPEC>>
Trait Implementations
impl From<W<CH0CTL0_SPEC>> for W
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impl From<W<CH0CTL0_SPEC>> for W
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