Type Definition gd32f1::gd32f170::timer0::chctl2::W[][src]

type W = W<u16, CHCTL2>;

Writer for register CHCTL2

Implementations

impl W[src]

pub fn ch3p(&mut self) -> CH3P_W<'_>[src]

Bit 13 - Channel 3 polarity

pub fn ch3en(&mut self) -> CH3EN_W<'_>[src]

Bit 12 - Channel 3 enable

pub fn ch2np(&mut self) -> CH2NP_W<'_>[src]

Bit 11 - Channel 2 complementary output polarity

pub fn ch2nen(&mut self) -> CH2NEN_W<'_>[src]

Bit 10 - Channel 2 complementary output enable

pub fn ch2p(&mut self) -> CH2P_W<'_>[src]

Bit 9 - Channel 2 polarity

pub fn ch2en(&mut self) -> CH2EN_W<'_>[src]

Bit 8 - Channel 2 enable

pub fn ch1np(&mut self) -> CH1NP_W<'_>[src]

Bit 7 - Channel 1 complementary output polarity

pub fn ch1nen(&mut self) -> CH1NEN_W<'_>[src]

Bit 6 - Channel 1 complementary output enable

pub fn ch1p(&mut self) -> CH1P_W<'_>[src]

Bit 5 - Channel 1 polarity

pub fn ch1en(&mut self) -> CH1EN_W<'_>[src]

Bit 4 - Channel 1 enable

pub fn ch0np(&mut self) -> CH0NP_W<'_>[src]

Bit 3 - Channel 0 complementary output polarity

pub fn ch0nen(&mut self) -> CH0NEN_W<'_>[src]

Bit 2 - Channel 0 complementary output enable

pub fn ch0p(&mut self) -> CH0P_W<'_>[src]

Bit 1 - Channel 0 polarity

pub fn ch0en(&mut self) -> CH0EN_W<'_>[src]

Bit 0 - Channel 0 enable