Type Definition gd32f1::gd32f170::adc::ctl1::W [−][src]
type W = W<u32, CTL1>;
Writer for register CTL1
Implementations
impl W[src]
pub fn vbaten(&mut self) -> VBATEN_W<'_>[src]
Bit 24 - enable/disable the VBAT channel
pub fn tsvren(&mut self) -> TSVREN_W<'_>[src]
Bit 23 - Channel 16 and 17 enable of ADC
pub fn swrcst(&mut self) -> SWRCST_W<'_>[src]
Bit 22 - Start on regular channel
pub fn swicst(&mut self) -> SWICST_W<'_>[src]
Bit 21 - Start on inserted channel
pub fn eterc(&mut self) -> ETERC_W<'_>[src]
Bit 20 - External trigger enable for regular channel
pub fn etsrc(&mut self) -> ETSRC_W<'_>[src]
Bits 17:19 - External trigger select for regular channel
pub fn eteic(&mut self) -> ETEIC_W<'_>[src]
Bit 15 - External trigger enable for inserted channel
pub fn etsic(&mut self) -> ETSIC_W<'_>[src]
Bits 12:14 - External trigger select for inserted channel
pub fn dal(&mut self) -> DAL_W<'_>[src]
Bit 11 - Data alignment
pub fn dma(&mut self) -> DMA_W<'_>[src]
Bit 8 - DMA request enable
pub fn rstclb(&mut self) -> RSTCLB_W<'_>[src]
Bit 3 - Reset calibration
pub fn clb(&mut self) -> CLB_W<'_>[src]
Bit 2 - ADC calibration
pub fn ctn(&mut self) -> CTN_W<'_>[src]
Bit 1 - Continuous mode
pub fn adcon(&mut self) -> ADCON_W<'_>[src]
Bit 0 - ADC ON