Module gd32f1::gd32f130::dma::intc [−][src]
DMA interrupt flag clear register (DMA_INTC)
Structs
| FTFIFC0_W | Write proxy for field |
| FTFIFC1_W | Write proxy for field |
| FTFIFC2_W | Write proxy for field |
| FTFIFC3_W | Write proxy for field |
| FTFIFC4_W | Write proxy for field |
| FTFIFC5_W | Write proxy for field |
| FTFIFC6_W | Write proxy for field |
| GIC0_W | Write proxy for field |
| GIC1_W | Write proxy for field |
| GIC2_W | Write proxy for field |
| GIC3_W | Write proxy for field |
| GIC4_W | Write proxy for field |
| GIC5_W | Write proxy for field |
| GIC6_W | Write proxy for field |
| HTFIFC0_W | Write proxy for field |
| HTFIFC1_W | Write proxy for field |
| HTFIFC2_W | Write proxy for field |
| HTFIFC3_W | Write proxy for field |
| HTFIFC4_W | Write proxy for field |
| HTFIFC5_W | Write proxy for field |
| HTFIFC6_W | Write proxy for field |
| TAEIFC0_W | Write proxy for field |
| TAEIFC1_W | Write proxy for field |
| TAEIFC2_W | Write proxy for field |
| TAEIFC3_W | Write proxy for field |
| TAEIFC4_W | Write proxy for field |
| TAEIFC5_W | Write proxy for field |
| TAEIFC6_W | Write proxy for field |
Enums
| FTFIFC0_AW | Clear bit for Full transfer finish flag of channel 0 |
| GIC0_AW | Clear global interrupt flag of channel 0 |
| HTFIFC0_AW | Clear bit for half transfer finish flag of channel 0 |
| TAEIFC0_AW | Clear bit for transfer access error flag of channel 0 |
Type Definitions
| FTFIFC1_AW | Clear bit for Full transfer finish flag of channel 1 |
| FTFIFC2_AW | Clear bit for Full transfer finish flag of channel 2 |
| FTFIFC3_AW | Clear bit for Full transfer finish flag of channel 3 |
| FTFIFC4_AW | Clear bit for Full transfer finish flag of channel 4 |
| FTFIFC5_AW | Clear bit for Full transfer finish flag of channel 5 |
| FTFIFC6_AW | Clear bit for Full transfer finish flag of channel 6 |
| GIC1_AW | Clear global interrupt flag of channel 1 |
| GIC2_AW | Clear global interrupt flag of channel 2 |
| GIC3_AW | Clear global interrupt flag of channel 3 |
| GIC4_AW | Clear global interrupt flag of channel 4 |
| GIC5_AW | Clear global interrupt flag of channel 5 |
| GIC6_AW | Clear global interrupt flag of channel 6 |
| HTFIFC1_AW | Clear bit for half transfer finish flag of channel 1 |
| HTFIFC2_AW | Clear bit for half transfer finish flag of channel 2 |
| HTFIFC3_AW | Clear bit for half transfer finish flag of channel 3 |
| HTFIFC4_AW | Clear bit for half transfer finish flag of channel 4 |
| HTFIFC5_AW | Clear bit for half transfer finish flag of channel 5 |
| HTFIFC6_AW | Clear bit for half transfer finish flag of channel 6 |
| TAEIFC1_AW | Clear bit for transfer access error flag of channel 1 |
| TAEIFC2_AW | Clear bit for transfer access error flag of channel 2 |
| TAEIFC3_AW | Clear bit for transfer access error flag of channel 3 |
| TAEIFC4_AW | Clear bit for transfer access error flag of channel 4 |
| TAEIFC5_AW | Clear bit for transfer access error flag of channel 5 |
| TAEIFC6_AW | Clear bit for transfer access error flag of channel 6 |
| W | Writer for register INTC |