Type Definition gd32f1::gd32f130::dbg::ctl0::W[][src]

type W = W<u32, CTL0>;

Writer for register CTL0

Implementations

impl W[src]

pub fn slp_hold(&mut self) -> SLP_HOLD_W<'_>[src]

Bit 0 - Sleep mode hold register

pub fn dslp_hold(&mut self) -> DSLP_HOLD_W<'_>[src]

Bit 1 - Deep-sleep mode hold register

pub fn stb_hold(&mut self) -> STB_HOLD_W<'_>[src]

Bit 2 - Standby mode hold register

pub fn fwdgt_hold(&mut self) -> FWDGT_HOLD_W<'_>[src]

Bit 8 - FWDGT hold register

pub fn wwdgt_hold(&mut self) -> WWDGT_HOLD_W<'_>[src]

Bit 9 - WWDGT hold register

pub fn timer0_hold(&mut self) -> TIMER0_HOLD_W<'_>[src]

Bit 10 - Timer 0 hold register

pub fn timer1_hold(&mut self) -> TIMER1_HOLD_W<'_>[src]

Bit 11 - Timer 1 hold register

pub fn timer2_hold(&mut self) -> TIMER2_HOLD_W<'_>[src]

Bit 12 - Timer 2 hold register

pub fn can0_hold(&mut self) -> CAN0_HOLD_W<'_>[src]

Bit 14 - CAN 0 hold register

pub fn i2c0_hold(&mut self) -> I2C0_HOLD_W<'_>[src]

Bit 15 - I2C0 hold register

pub fn i2c1_hold(&mut self) -> I2C1_HOLD_W<'_>[src]

Bit 16 - I2C1 hold register

pub fn i2c2_hold(&mut self) -> I2C2_HOLD_W<'_>[src]

Bit 17 - I2C2 hold register

pub fn timer5_hold(&mut self) -> TIMER5_HOLD_W<'_>[src]

Bit 19 - Timer 5 hold register

pub fn can1_hold(&mut self) -> CAN1_HOLD_W<'_>[src]

Bit 21 - CAN1 hold register

pub fn timer13_hold(&mut self) -> TIMER13_HOLD_W<'_>[src]

Bit 27 - Timer 13 hold register