gd32e5/gd32e503/timer7/
dmacfg.rs

1#[doc = "Register `DMACFG` reader"]
2pub type R = crate::R<DmacfgSpec>;
3#[doc = "Register `DMACFG` writer"]
4pub type W = crate::W<DmacfgSpec>;
5#[doc = "Field `DMATA` reader - DMA transfer access start address"]
6pub type DmataR = crate::FieldReader;
7#[doc = "Field `DMATA` writer - DMA transfer access start address"]
8pub type DmataW<'a, REG> = crate::FieldWriterSafe<'a, REG, 5>;
9#[doc = "Field `DMATC` reader - DMA transfer count"]
10pub type DmatcR = crate::FieldReader;
11#[doc = "Field `DMATC` writer - DMA transfer count"]
12pub type DmatcW<'a, REG> = crate::FieldWriterSafe<'a, REG, 5>;
13impl R {
14    #[doc = "Bits 0:4 - DMA transfer access start address"]
15    #[inline(always)]
16    pub fn dmata(&self) -> DmataR {
17        DmataR::new((self.bits & 0x1f) as u8)
18    }
19    #[doc = "Bits 8:12 - DMA transfer count"]
20    #[inline(always)]
21    pub fn dmatc(&self) -> DmatcR {
22        DmatcR::new(((self.bits >> 8) & 0x1f) as u8)
23    }
24}
25impl W {
26    #[doc = "Bits 0:4 - DMA transfer access start address"]
27    #[inline(always)]
28    #[must_use]
29    pub fn dmata(&mut self) -> DmataW<DmacfgSpec> {
30        DmataW::new(self, 0)
31    }
32    #[doc = "Bits 8:12 - DMA transfer count"]
33    #[inline(always)]
34    #[must_use]
35    pub fn dmatc(&mut self) -> DmatcW<DmacfgSpec> {
36        DmatcW::new(self, 8)
37    }
38}
39#[doc = "DMA configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dmacfg::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dmacfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
40pub struct DmacfgSpec;
41impl crate::RegisterSpec for DmacfgSpec {
42    type Ux = u32;
43}
44#[doc = "`read()` method returns [`dmacfg::R`](R) reader structure"]
45impl crate::Readable for DmacfgSpec {}
46#[doc = "`write(|w| ..)` method takes [`dmacfg::W`](W) writer structure"]
47impl crate::Writable for DmacfgSpec {
48    type Safety = crate::Unsafe;
49    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
50    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
51}
52#[doc = "`reset()` method sets DMACFG to value 0"]
53impl crate::Resettable for DmacfgSpec {
54    const RESET_VALUE: u32 = 0;
55}
gd32e5/gd32e503/timer7/dmacfg.rs

gd32e5/gd32e503/timer7/
dmacfg.rs
