gd32e2/gd32e231/dma/
ch0cnt.rs

1#[doc = "Register `CH0CNT` reader"]
2pub type R = crate::R<Ch0cntSpec>;
3#[doc = "Register `CH0CNT` writer"]
4pub type W = crate::W<Ch0cntSpec>;
5#[doc = "Field `CNT` reader - Transfer counter"]
6pub type CntR = crate::FieldReader<u16>;
7#[doc = "Field `CNT` writer - Transfer counter"]
8pub type CntW<'a, REG> = crate::FieldWriterSafe<'a, REG, 16, u16>;
9impl R {
10    #[doc = "Bits 0:15 - Transfer counter"]
11    #[inline(always)]
12    pub fn cnt(&self) -> CntR {
13        CntR::new((self.bits & 0xffff) as u16)
14    }
15}
16impl W {
17    #[doc = "Bits 0:15 - Transfer counter"]
18    #[inline(always)]
19    #[must_use]
20    pub fn cnt(&mut self) -> CntW<Ch0cntSpec> {
21        CntW::new(self, 0)
22    }
23}
24#[doc = "DMA channel 0 counter register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ch0cnt::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ch0cnt::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
25pub struct Ch0cntSpec;
26impl crate::RegisterSpec for Ch0cntSpec {
27    type Ux = u32;
28}
29#[doc = "`read()` method returns [`ch0cnt::R`](R) reader structure"]
30impl crate::Readable for Ch0cntSpec {}
31#[doc = "`write(|w| ..)` method takes [`ch0cnt::W`](W) writer structure"]
32impl crate::Writable for Ch0cntSpec {
33    type Safety = crate::Unsafe;
34    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
35    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
36}
37#[doc = "`reset()` method sets CH0CNT to value 0"]
38impl crate::Resettable for Ch0cntSpec {
39    const RESET_VALUE: u32 = 0;
40}
gd32e2/gd32e231/dma/ch0cnt.rs

gd32e2/gd32e231/dma/
ch0cnt.rs
