Struct gd32e1::gd32e103::Dma0

pub struct Dma0 { /* private fields */ }

DMA controller

Implementations

impl Dma0

pub const PTR: *const RegisterBlock = {0x40020000 as *const gd32e103::dma0::RegisterBlock}

Pointer to the register block

pub const fn ptr() -> *const RegisterBlock

Return the pointer to the register block

pub unsafe fn steal() -> Self

Steal an instance of this peripheral

Safety

Ensure that the new instance of the peripheral cannot be used in a way that may race with any existing instances, for example by only accessing read-only or write-only registers, or by consuming the original peripheral and using critical sections to coordinate access between multiple new instances.

Additionally, other software such as HALs may rely on only one peripheral instance existing to ensure memory safety; ensure no stolen instances are passed to such software.

Methods from Deref<Target = RegisterBlock>

pub fn intf(&self) -> &Intf

0x00 - Interrupt flag register

pub fn intc(&self) -> &Intc

0x04 - Interrupt flag clear register

pub fn ch0ctl(&self) -> &Ch0ctl

0x08 - Channel 0 control register

pub fn ch0cnt(&self) -> &Ch0cnt

0x0c - Channel 0 counter register

pub fn ch0paddr(&self) -> &Ch0paddr

0x10 - Channel 0 peripheral base address register

pub fn ch0maddr(&self) -> &Ch0maddr

0x14 - Channel 0 memory base address register

pub fn ch1ctl(&self) -> &Ch1ctl

0x1c - Channel 1 control register

pub fn ch1cnt(&self) -> &Ch1cnt

0x20 - Channel 1 counter register

pub fn ch1paddr(&self) -> &Ch1paddr

0x24 - Channel 1 peripheral base address register

pub fn ch1maddr(&self) -> &Ch1maddr

0x28 - Channel 1 memory base address register

pub fn ch2ctl(&self) -> &Ch2ctl

0x30 - Channel 2 control register

pub fn ch2cnt(&self) -> &Ch2cnt

0x34 - Channel 2 counter register

pub fn ch2paddr(&self) -> &Ch2paddr

0x38 - Channel 2 peripheral base address register

pub fn ch2maddr(&self) -> &Ch2maddr

0x3c - Channel 2 memory base address register

pub fn ch3ctl(&self) -> &Ch3ctl

0x44 - Channel 3 control register

pub fn ch3cnt(&self) -> &Ch3cnt

0x48 - Channel 3 counter register

pub fn ch3paddr(&self) -> &Ch3paddr

0x4c - Channel 3 peripheral base address register

pub fn ch3maddr(&self) -> &Ch3maddr

0x50 - Channel 3 memory base address register

pub fn ch4ctl(&self) -> &Ch4ctl

0x58 - Channel 4 control register

pub fn ch4cnt(&self) -> &Ch4cnt

0x5c - Channel 4 counter register

pub fn ch4paddr(&self) -> &Ch4paddr

0x60 - Channel 4 peripheral base address register

pub fn ch4maddr(&self) -> &Ch4maddr

0x64 - Channel 4 memory base address register

pub fn ch5ctl(&self) -> &Ch5ctl

0x6c - Channel 5 control register

pub fn ch5cnt(&self) -> &Ch5cnt

0x70 - Channel 5 counter register

pub fn ch5paddr(&self) -> &Ch5paddr

0x74 - Channel 5 peripheral base address register

pub fn ch5maddr(&self) -> &Ch5maddr

0x78 - Channel 5 memory base address register

pub fn ch6ctl(&self) -> &Ch6ctl

0x80 - Channel 6 control register

pub fn ch6cnt(&self) -> &Ch6cnt

0x84 - Channel 6 counter register

pub fn ch6paddr(&self) -> &Ch6paddr

0x88 - Channel 6 peripheral base address register

pub fn ch6maddr(&self) -> &Ch6maddr

0x8c - Channel 6 memory base address register

Trait Implementations

impl Debug for Dma0

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.

impl Deref for Dma0

type Target = RegisterBlock

The resulting type after dereferencing.

fn deref(&self) -> &Self::Target

Dereferences the value.

impl Send for Dma0