Crate fletcher_simd
source ·Expand description
fletcher-simd
A SIMD implementation of the Fletcher’s checksum algorithm.
Note: This implementation uses a modulus of 2^k
where k
is the checksum block size in bits, as this is fast with wrapping math. Other implementations may use 2^k - 1
.
Features
- Uses
std::simd
, which currently requires nightly. - Supports all architectures supported by
std::simd
. - Both run-time and compile-time detection available via the
multiversion
crate. - Scalar fallback.
Cargo features
There is one cargo feature, runtime_dispatch
, enabled by default. When enabled, the crate will use CPU feature detection at runtime to dispatch to the appropriate SIMD implementation. Disabling this feature will result in static dispatch only.
Example
use byteorder::{ByteOrder, LittleEndian};
use fletcher_simd::Fletcher128;
fn main() {
const DATA: &str = "abcdefgh";
let mut fletcher = Fletcher128::new();
// Read bytes in little endian. Endianness matters!
fletcher.update_with_iter(
DATA.as_bytes()
.chunks(8)
.map(|chunk| LittleEndian::read_u64(chunk)),
);
assert_eq!(fletcher.value(), 0x68676665646362616867666564636261);
}
Structs
A Fletcher checksum object that allows for continuous updates to the checksum.
Traits
Trait for the type representing a certain sized Fletcher checksum.
Type Definitions
Convenient type alias for the 16-bit Fletcher checksum object.
Convenient type alias for the 32-bit Fletcher checksum object.
Convenient type alias for the 64-bit Fletcher checksum object.
Convenient type alias for the 128-bit Fletcher checksum object.