fk_lis3dsh/
register.rs

1use num_enum::TryFromPrimitive;
2
3/// Enumerate all device registers.
4#[allow(dead_code, non_camel_case_types)]
5#[derive(Copy, Clone, Debug, Eq, PartialEq)]
6#[repr(u8)]
7pub enum Register {
8    OUT_T = 0x0C,
9    INFO1 = 0x0D,
10    INFO2 = 0x0E,
11    WHOAMI = 0x0F,
12
13    OFF_X = 0x10,
14    OFF_Y = 0x11,
15    OFF_Z = 0x12,
16
17    CS_X = 0x13,
18    CS_Y = 0x14,
19    CS_Z = 0x15,
20
21    LC_L = 0x16,
22    LC_H = 0x17,
23
24    STAT = 0x18,
25
26    //
27    CTRL_REG4 = 0x20,
28    CTRL_REG1 = 0x21,
29    CTRL_REG2 = 0x22,
30    CTRL_REG3 = 0x23,
31    CTRL_REG5 = 0x24,
32    CTRL_REG6 = 0x26,
33
34    STATUS = 0x27, // 0xA7 read
35
36    OUT_X_L = 0x28,
37    OUT_X_H = 0x29,
38    OUT_Y_L = 0x2A,
39    OUT_Y_H = 0x2B,
40    OUT_Z_L = 0x2C,
41    OUT_Z_H = 0x2D,
42}
43
44impl Register {
45    /// Get register address
46    pub fn addr(self) -> u8 {
47        self as u8
48    }
49    pub fn read(self) -> u8 {
50        self as u8 | 0x01 << 7
51    }
52    pub fn write(self) -> u8 {
53        self as u8 & 0b0111_1111
54    }
55}
56
57/// Full-scale selection.
58#[allow(non_camel_case_types)]
59#[derive(Copy, Clone, Debug, Eq, PartialEq, TryFromPrimitive)]
60#[repr(u8)]
61pub enum Range {
62    /// ±16g
63    G16 = 0b100,
64
65    /// ±8g
66    G8 = 0b011,
67
68    ///  ±6g
69    G6 = 0b010,
70
71    /// ±4g
72    G4 = 0b001,
73
74    /// ±2g (Default)
75    G2 = 0b000,
76}
77
78impl Range {
79    pub fn bits(self) -> u8 {
80        self as u8
81    }
82}
83
84/// Output data rate.
85#[allow(non_camel_case_types)]
86#[derive(Copy, Clone, Debug, Eq, PartialEq, TryFromPrimitive)]
87#[repr(u8)]
88pub enum DataRate {
89    Hz_1600 = 0b1001,
90    Hz_800 = 0b1000,
91    Hz_400 = 0b0111,
92    Hz_100 = 0b0110,
93    Hz_50 = 0b0101,
94    Hz_25 = 0b0100,
95    Hz_12 = 0b0011,
96    Hz_6 = 0b0010,
97    Hz_3 = 0b0001,
98
99    /// Power down
100    PowerDown = 0b0000,
101}
102
103impl DataRate {
104    pub fn bits(self) -> u8 {
105        self as u8
106    }
107
108    pub fn sample_rate(self) -> f32 {
109        match self {
110            DataRate::Hz_1600 => 1600.0,
111            DataRate::Hz_800 => 800.0,
112            DataRate::Hz_400 => 400.0,
113            DataRate::Hz_100 => 100.0,
114            DataRate::Hz_50 => 50.0,
115            DataRate::Hz_25 => 25.0,
116            DataRate::Hz_12 => 12.5,
117            DataRate::Hz_6 => 6.25,
118            DataRate::Hz_3 => 3.125,
119            DataRate::PowerDown => 0.0,
120        }
121    }
122}
123pub struct DataStatus(u8);
124
125impl DataStatus {
126    const ZYXOR_MASK: u8 = 0x1 << 7;
127    const ZOR_MASK: u8 = 0x1 << 6;
128    const YOR_MASK: u8 = 0x1 << 5;
129    const XOR_MASK: u8 = 0x1 << 4;
130
131    const ZYXDA_MASK: u8 = 0x1 << 3;
132    const ZDA_MASK: u8 = 0x1 << 2;
133    const YDA_MASK: u8 = 0x1 << 1;
134    const XDA_MASK: u8 = 0x1 << 0;
135
136    /// New from STATUS register
137    pub fn from(status: u8) -> DataStatus {
138        DataStatus(status)
139    }
140    /// Data overrun on ZYX axis
141    pub fn zyxor(&self) -> bool {
142        self.0 & Self::ZYXOR_MASK != 0
143    }
144    /// Data overrun on Z axis
145    pub fn zor(&self) -> bool {
146        self.0 & Self::ZOR_MASK != 0
147    }
148    /// Data overrun on Y axis
149    pub fn yor(&self) -> bool {
150        self.0 & Self::YOR_MASK != 0
151    }
152    /// Data overrun on X axis
153    pub fn xor(&self) -> bool {
154        self.0 & Self::XOR_MASK != 0
155    }
156
157    /// Data available for all axes
158    pub fn zyxda(&self) -> bool {
159        self.0 & Self::ZYXDA_MASK != 0
160    }
161    /// Data available for Z axis
162    pub fn zda(&self) -> bool {
163        self.0 & Self::ZDA_MASK != 0
164    }
165    /// Data available for Y axis
166    pub fn yda(&self) -> bool {
167        self.0 & Self::YDA_MASK != 0
168    }
169    /// Data available for X axis
170    pub fn xda(&self) -> bool {
171        self.0 & Self::XDA_MASK != 0
172    }
173}
174
175pub const DEVICE_ID: u8 = 63;
176
177pub const ODR_MASK: u8 = 0b1111_0000;
178pub const ODR_OFFSET: u8 = 4;
179
180pub const BDU: u8 = 0b0000_1000;
181pub const Z_EN: u8 = 0b0000_0100;
182pub const Y_EN: u8 = 0b0000_0010;
183pub const X_EN: u8 = 0b0000_0001;
184
185pub const FS_MASK: u8 = 0b0011_1000;
186pub const FS_OFFSET: u8 = 3;
187
188pub const ZYXOR: u8 = 0b1000_0000;
189pub const ZOR: u8 = 0b0100_0000;
190pub const YOR: u8 = 0b0010_0000;
191pub const XOR: u8 = 0b0001_0000;
192pub const ZYXDA: u8 = 0b0000_1000;
193pub const ZDA: u8 = 0b0000_0100;
194pub const YDA: u8 = 0b0000_0010;
195pub const XDA: u8 = 0b0000_0001;
196
197pub const STRESET: u8 = 0b1;
fk_lis3dsh/register.rs

fk_lis3dsh/
register.rs
