firewire_dice_protocols/weiss/
normal.rs

1// SPDX-License-Identifier: LGPL-3.0-or-later
2// Copyright (c) 2024 Takashi Sakamoto
3
4//! Protocol specific to Weiss Engineering normal models.
5//!
6//! The module includes structure, enumeration, and trait and its implementation for protocol
7//! defined by Weiss Engineering.
8
9use super::*;
10
11/// Protocol implementation specific to ADC2.
12#[derive(Default, Debug)]
13pub struct WeissAdc2Protocol;
14
15impl TcatOperation for WeissAdc2Protocol {}
16
17// clock caps: 44100 48000 88200 96000 176400 192000 aes1
18// clock source names: AES12\Unused\Unused\Unused\Unused\Unused\Unused\Unused\Unused\Unused\Unused\Unused\Unused\\
19impl TcatGlobalSectionSpecification for WeissAdc2Protocol {}
20
21/// Protocol implementation specific to Vesta.
22#[derive(Default, Debug)]
23pub struct WeissVestaProtocol;
24
25impl TcatOperation for WeissVestaProtocol {}
26
27// clock caps: 44100 48000 88200 96000 176400 192000 aes1 aes2 aes3 arx1 internal
28// clock source names: AES/EBU (XLR)\S/PDIF (RCA)\S/PDIF (TOSLINK)\Unused\Unused\Unused\Unused\Unused\Unused\Unused\Unused\Unused\Internal\\
29impl TcatGlobalSectionSpecification for WeissVestaProtocol {}
30
31/// Protocol implementation specific to DAC2/Minerva.
32#[derive(Default, Debug)]
33pub struct WeissDac2Protocol;
34
35impl TcatOperation for WeissDac2Protocol {}
36
37// clock caps: 44100 48000 88200 96000 176400 192000 aes1 aes2 aes3 arx1 internal
38// clock source names: AES/EBU (XLR)\S/PDIF (RCA)\S/PDIF (TOSLINK)\Unused\Unused\Unused\Unused\Unused\Unused\Unused\Unused\Unused\Internal\\
39impl TcatGlobalSectionSpecification for WeissDac2Protocol {}
40
41/// Protocol implementation specific to AFI1.
42#[derive(Default, Debug)]
43pub struct WeissAfi1Protocol;
44
45impl TcatOperation for WeissAfi1Protocol {}
46
47// clock caps: 44100 48000 88200 96000 176400 192000 aes1 aes2 aes3 aes4 adat wc internal
48// clock source names: AES12\AES34\AES56\AES78\Unused\ADAT\Unused\Word Clock\Unused\Unused\Unused\Unused\Internal\\
49impl TcatGlobalSectionSpecification for WeissAfi1Protocol {}
50
51/// Protocol implementation specific to DAC202 and Maya Edition.
52#[derive(Default, Debug)]
53pub struct WeissDac202Protocol;
54
55impl TcatOperation for WeissDac202Protocol {}
56
57// clock caps: 44100 48000 88200 96000 176400 192000 aes1 aes2 aes3 wc arx1 internal
58// clock source names: AES/EBU (XLR)\S/PDIF (RCA)\S/PDIF (TOSLINK)\Unused\Unused\Unused\Unused\Word Clock\Unused\Unused\Unused\Unused\Internal\\
59impl TcatGlobalSectionSpecification for WeissDac202Protocol {}
60
61/// Protocol implementation specific to INT202, INT203, and FireWire option card for DAC1.
62#[derive(Default, Debug)]
63pub struct WeissInt203Protocol;
64
65impl TcatOperation for WeissInt203Protocol {}
66
67// clock caps: 44100 48000 88200 96000 176400 192000 aes1 aes2 arx1 internal
68// clock source names: AES/EBU (XLR)\S/PDIF (RCA)\Unused\Unused\Unused\Unused\Unused\Unused\Unused\Unused\Unused\Unused\Internal\\
69impl TcatGlobalSectionSpecification for WeissInt203Protocol {}
firewire_dice_protocols/weiss/normal.rs

firewire_dice_protocols/weiss/
normal.rs
