firewire_bebob_protocols/digidesign.rs
1// SPDX-License-Identifier: LGPL-3.0-or-later
2// Copyright (c) 2021 Takashi Sakamoto
3
4//! Protocol implementation for Digidesign Mbox 2 Pro.
5//!
6//! The module includes structure, enumeration, and trait and its implementation for protocol
7//! defined by Digidesign for Mbox 2 pro.
8//!
9//! ## Diagram of internal signal flow
10//!
11//! ```text
12//! digital-input-1/2 -------------------------> stream-output-1/2
13//! analog-input-1/2 ------------+-------------> stream-output-3/4
14//! analog-input-3/4 ------------|-+-----------> stream-output-5/6
15//! | |
16//! v v
17//! ++=======++
18//! +--> || 6 x 2 ||-------> monitor-output-1/2
19//! | || mixer ||
20//! | ++=======++
21//! stream-input-1/2 ---+----------------------> digital-output-1/2
22//! stream-input-3/4 --------------------------> analog-output-1/2
23//! stream-input-5/6 --------------------------> analog-output-3/4
24//! ```
25//!
26//! None of the above audio signals is configurable by software.
27//!
28//! The protocol implementation for M-Audio FireWire 1814 was written with firmware version
29//! below:
30//!
31//! ```sh
32//! $ cargo run --bin bco-bootloader-info -- /dev/fw1
33//! protocol:
34//! version: 1
35//! bootloader:
36//! timestamp: 2005-12-07T08:55:54+0000
37//! version: 0.0.0
38//! hardware:
39//! GUID: 0x00a9000000a07e01
40//! model ID: 0x000001
41//! revision: 0.0.1
42//! software:
43//! timestamp: 2007-10-31T03:44:02+0000
44//! ID: 0x000000a9
45//! revision: 0.255.65535
46//! image:
47//! base address: 0x20080000
48//! maximum size: 0x180000
49//! ```
50
51use super::*;
52
53/// The protocol implementation of operation for media clock and sampling clock.
54#[derive(Default, Debug)]
55pub struct Mbox2proClkProtocol;
56
57impl MediaClockFrequencyOperation for Mbox2proClkProtocol {
58 const FREQ_LIST: &'static [u32] = &[44100, 48000, 88200, 96000];
59}
60
61impl SamplingClockSourceOperation for Mbox2proClkProtocol {
62 const DST: SignalAddr = SignalAddr::Subunit(SignalSubunitAddr {
63 subunit: MUSIC_SUBUNIT_0,
64 plug_id: 0x01,
65 });
66
67 const SRC_LIST: &'static [SignalAddr] = &[
68 // Internal.
69 SignalAddr::Subunit(SignalSubunitAddr {
70 subunit: MUSIC_SUBUNIT_0,
71 plug_id: 0x01,
72 }),
73 // Internal with S/PDIF output.
74 SignalAddr::Subunit(SignalSubunitAddr {
75 subunit: MUSIC_SUBUNIT_0,
76 plug_id: 0x07,
77 }),
78 // S/PDIF input in coaxial interface.
79 SignalAddr::Unit(SignalUnitAddr::Ext(0x03)),
80 // Word clock input in BNC interface.
81 SignalAddr::Unit(SignalUnitAddr::Ext(0x04)),
82 // Word clock input or S/PDIF input.
83 SignalAddr::Unit(SignalUnitAddr::Ext(0x05)),
84 ];
85}
86
87/// The protocol implementation to initialize input/output.
88#[derive(Default, Debug)]
89pub struct Mbox2proIoProtocol;
90
91impl Mbox2proIoProtocol {
92 // This takes the unit to process audio signal from stream-input-1/2.
93 pub fn init(req: &FwReq, node: &FwNode, timeout_ms: u32) -> Result<(), Error> {
94 let mut frame = [0; 12];
95 frame[0] = 1;
96 req.transaction_sync(
97 node,
98 FwTcode::WriteBlockRequest,
99 DM_APPL_PARAM_OFFSET,
100 frame.len(),
101 &mut frame,
102 timeout_ms,
103 )
104 }
105}