1pub mod battery;
47pub mod cpu;
48pub mod cpu_freq;
49pub mod dmi;
50pub mod drm;
51pub mod init;
52pub mod parts;
53pub mod ram;
54pub mod soft;
55pub mod sys;
56pub mod vmstat;
57pub mod vulnerabilities;
58
59pub mod traits;
60pub mod utils;
61
62use crate::traits::ToPlainText;
63use anyhow::Result;
64use serde::Serialize;
65
66pub const FX_LIB_VERSION: &str = env!("CARGO_PKG_VERSION");
67
68#[derive(Debug, Serialize)]
69pub struct Ferrix {
70 pub cpu: cpu::Processors,
71 pub ram: ram::RAM,
72 pub swaps: ram::Swaps,
73 pub dmi: dmi::DMITable,
74 pub drm: drm::Video,
75 pub sys: sys::Sys,
76 pub init: init::SystemdServices,
77}
78
79impl Ferrix {
80 pub async fn new() -> Result<Self> {
81 let conn = zbus::Connection::system().await?;
82 Ok(Self {
83 cpu: cpu::Processors::new()?,
84 ram: ram::RAM::new()?,
85 swaps: ram::Swaps::new()?,
86 dmi: dmi::DMITable::new()?,
87 drm: drm::Video::new()?,
88 sys: sys::Sys::new()?,
89 init: init::SystemdServices::new_from_connection(&conn).await?,
90 })
91 }
92
93 fn _update(&mut self) -> Result<()> {
94 self.cpu = cpu::Processors::new()?;
95 self.ram = ram::RAM::new()?;
96 self.swaps = ram::Swaps::new()?;
97 self.sys.update()?;
98
99 Ok(())
100 }
101
102 pub async fn update(&mut self, conn: &zbus::Connection) -> Result<()> {
103 self._update()?;
104 self.init = init::SystemdServices::new_from_connection(&conn).await?;
105 Ok(())
106 }
107
108 pub async fn update1(&mut self) -> Result<()> {
109 self._update()?;
110 let conn = zbus::Connection::system().await?;
111 self.init = init::SystemdServices::new_from_connection(&conn).await?;
112 Ok(())
113 }
114
115 pub fn to_json(&self) -> Result<String> {
121 Ok(serde_json::to_string(&self)?)
122 }
123
124 pub fn to_json_pretty(&self) -> Result<String> {
130 Ok(serde_json::to_string_pretty(&self)?)
131 }
132
133 pub fn to_xml(&self) -> Result<String> {
135 let xml = XMLData::from(self);
136 let data = XMLFerrixData::from(&xml);
137 data.to_xml()
138 }
139}
140
141impl ToPlainText for Ferrix {
142 fn to_plain(&self) -> String {
143 let mut s = format!("");
144 s += &self.cpu.to_plain();
145 s += &self.init.to_plain();
146
147 s
148 }
149}
150
151#[derive(Serialize)]
152struct XMLFerrixData<'a> {
153 data: &'a XMLData<'a>,
154}
155
156#[derive(Serialize)]
157struct XMLData<'a> {
158 cpu: &'a cpu::Processors,
159 ram: &'a ram::RAM,
160 dmi: dmi::DMITableXml<'a>,
161 sys: &'a sys::Sys,
162 init: &'a init::SystemdServices,
163}
164
165impl<'a> From<&'a Ferrix> for XMLData<'a> {
166 fn from(value: &'a Ferrix) -> Self {
167 Self {
168 cpu: &value.cpu,
169 ram: &value.ram,
170 dmi: dmi::DMITableXml::from(&value.dmi),
171 sys: &value.sys,
172 init: &value.init,
173 }
174 }
175}
176
177impl<'a> XMLFerrixData<'a> {
178 fn to_xml(&self) -> Result<String> {
179 Ok(xml_serde::to_string(&self)?)
180 }
181}
182
183impl<'a> From<&'a XMLData<'a>> for XMLFerrixData<'a> {
184 fn from(value: &'a XMLData) -> Self {
185 Self { data: value }
186 }
187}