Struct feather_f405::pac::otg_hs_global::RegisterBlock

#[repr(C)]pub struct RegisterBlock {
    pub gotgctl: Reg<u32, _GOTGCTL>,
    pub gotgint: Reg<u32, _GOTGINT>,
    pub gahbcfg: Reg<u32, _GAHBCFG>,
    pub gusbcfg: Reg<u32, _GUSBCFG>,
    pub grstctl: Reg<u32, _GRSTCTL>,
    pub gintsts: Reg<u32, _GINTSTS>,
    pub gintmsk: Reg<u32, _GINTMSK>,
    pub grxfsiz: Reg<u32, _GRXFSIZ>,
    pub gnptxsts: Reg<u32, _GNPTXSTS>,
    pub gccfg: Reg<u32, _GCCFG>,
    pub cid: Reg<u32, _CID>,
    pub hptxfsiz: Reg<u32, _HPTXFSIZ>,
    pub dieptxf1: Reg<u32, _DIEPTXF>,
    pub dieptxf2: Reg<u32, _DIEPTXF>,
    pub dieptxf3: Reg<u32, _DIEPTXF>,
    pub dieptxf4: Reg<u32, _DIEPTXF>,
    pub dieptxf5: Reg<u32, _DIEPTXF>,
    // some fields omitted
}

Register block

Fields

gotgctl: Reg<u32, _GOTGCTL>

0x00 - OTG_HS control and status register

gotgint: Reg<u32, _GOTGINT>

0x04 - OTG_HS interrupt register

gahbcfg: Reg<u32, _GAHBCFG>

0x08 - OTG_HS AHB configuration register

gusbcfg: Reg<u32, _GUSBCFG>

0x0c - OTG_HS USB configuration register

grstctl: Reg<u32, _GRSTCTL>

0x10 - OTG_HS reset register

gintsts: Reg<u32, _GINTSTS>

0x14 - OTG_HS core interrupt register

gintmsk: Reg<u32, _GINTMSK>

0x18 - OTG_HS interrupt mask register

grxfsiz: Reg<u32, _GRXFSIZ>

0x24 - OTG_HS Receive FIFO size register

gnptxsts: Reg<u32, _GNPTXSTS>

0x2c - OTG_HS nonperiodic transmit FIFO/queue status register

gccfg: Reg<u32, _GCCFG>

0x38 - OTG_HS general core configuration register

cid: Reg<u32, _CID>

0x3c - OTG_HS core ID register

hptxfsiz: Reg<u32, _HPTXFSIZ>

0x100 - OTG_HS Host periodic transmit FIFO size register

dieptxf1: Reg<u32, _DIEPTXF>

0x104 - OTG_HS device IN endpoint transmit FIFO size register

dieptxf2: Reg<u32, _DIEPTXF>

0x108 - OTG_HS device IN endpoint transmit FIFO size register

dieptxf3: Reg<u32, _DIEPTXF>

0x10c - OTG_HS device IN endpoint transmit FIFO size register

dieptxf4: Reg<u32, _DIEPTXF>

0x110 - OTG_HS device IN endpoint transmit FIFO size register

dieptxf5: Reg<u32, _DIEPTXF>

0x114 - OTG_HS device IN endpoint transmit FIFO size register

Implementations

impl RegisterBlock

pub fn grxstsr_peripheral(&self) -> &Reg<u32, _GRXSTSR_PERIPHERAL>

0x1c - OTG_HS Receive status debug read register (peripheral mode mode)

pub fn grxstsr_peripheral_mut(&self) -> &mut Reg<u32, _GRXSTSR_PERIPHERAL>

0x1c - OTG_HS Receive status debug read register (peripheral mode mode)

pub fn grxstsr_host(&self) -> &Reg<u32, _GRXSTSR_HOST>

0x1c - OTG_HS Receive status debug read register (host mode)

pub fn grxstsr_host_mut(&self) -> &mut Reg<u32, _GRXSTSR_HOST>

0x1c - OTG_HS Receive status debug read register (host mode)

pub fn grxstsp_peripheral(&self) -> &Reg<u32, _GRXSTSP_PERIPHERAL>

0x20 - OTG_HS status read and pop register (peripheral mode)

pub fn grxstsp_peripheral_mut(&self) -> &mut Reg<u32, _GRXSTSP_PERIPHERAL>

0x20 - OTG_HS status read and pop register (peripheral mode)

pub fn grxstsp_host(&self) -> &Reg<u32, _GRXSTSP_HOST>

0x20 - OTG_HS status read and pop register (host mode)

pub fn grxstsp_host_mut(&self) -> &mut Reg<u32, _GRXSTSP_HOST>

0x20 - OTG_HS status read and pop register (host mode)

pub fn tx0fsiz(&self) -> &Reg<u32, _TX0FSIZ>

0x28 - Endpoint 0 transmit FIFO size (peripheral mode)

pub fn tx0fsiz_mut(&self) -> &mut Reg<u32, _TX0FSIZ>

0x28 - Endpoint 0 transmit FIFO size (peripheral mode)

pub fn gnptxfsiz(&self) -> &Reg<u32, _GNPTXFSIZ>

0x28 - OTG_HS nonperiodic transmit FIFO size register (host mode)

pub fn gnptxfsiz_mut(&self) -> &mut Reg<u32, _GNPTXFSIZ>

0x28 - OTG_HS nonperiodic transmit FIFO size register (host mode)