1use crate::{Simd, SimdInto};
7use crate::{
8 f32x4, f32x8, f32x16, f64x2, f64x4, f64x8, i8x16, i8x32, i8x64, i16x8, i16x16, i16x32, i32x4,
9 i32x8, i32x16, i64x2, i64x4, i64x8, mask8x16, mask8x32, mask8x64, mask16x8, mask16x16,
10 mask16x32, mask32x4, mask32x8, mask32x16, mask64x2, mask64x4, mask64x8, u8x16, u8x32, u8x64,
11 u16x8, u16x16, u16x32, u32x4, u32x8, u32x16, u64x2, u64x4, u64x8,
12};
13impl<S: Simd> core::ops::Neg for f32x4<S> {
14 type Output = Self;
15 #[doc = "Negate each element of the vector."]
16 #[inline(always)]
17 fn neg(self) -> Self::Output {
18 self.simd.neg_f32x4(self)
19 }
20}
21impl<S: Simd> core::ops::Add for f32x4<S> {
22 type Output = Self;
23 #[doc = "Add two vectors element-wise."]
24 #[inline(always)]
25 fn add(self, rhs: Self) -> Self::Output {
26 self.simd.add_f32x4(self, rhs)
27 }
28}
29impl<S: Simd> core::ops::AddAssign for f32x4<S> {
30 #[doc = "Add two vectors element-wise."]
31 #[inline(always)]
32 fn add_assign(&mut self, rhs: Self) {
33 *self = self.simd.add_f32x4(*self, rhs);
34 }
35}
36impl<S: Simd> core::ops::Add<f32> for f32x4<S> {
37 type Output = Self;
38 #[inline(always)]
39 fn add(self, rhs: f32) -> Self::Output {
40 self.simd.add_f32x4(self, rhs.simd_into(self.simd))
41 }
42}
43impl<S: Simd> core::ops::AddAssign<f32> for f32x4<S> {
44 #[inline(always)]
45 fn add_assign(&mut self, rhs: f32) {
46 *self = self.simd.add_f32x4(*self, rhs.simd_into(self.simd));
47 }
48}
49impl<S: Simd> core::ops::Add<f32x4<S>> for f32 {
50 type Output = f32x4<S>;
51 #[inline(always)]
52 fn add(self, rhs: f32x4<S>) -> Self::Output {
53 rhs.simd.add_f32x4(self.simd_into(rhs.simd), rhs)
54 }
55}
56impl<S: Simd> core::ops::Sub for f32x4<S> {
57 type Output = Self;
58 #[doc = "Subtract two vectors element-wise."]
59 #[inline(always)]
60 fn sub(self, rhs: Self) -> Self::Output {
61 self.simd.sub_f32x4(self, rhs)
62 }
63}
64impl<S: Simd> core::ops::SubAssign for f32x4<S> {
65 #[doc = "Subtract two vectors element-wise."]
66 #[inline(always)]
67 fn sub_assign(&mut self, rhs: Self) {
68 *self = self.simd.sub_f32x4(*self, rhs);
69 }
70}
71impl<S: Simd> core::ops::Sub<f32> for f32x4<S> {
72 type Output = Self;
73 #[inline(always)]
74 fn sub(self, rhs: f32) -> Self::Output {
75 self.simd.sub_f32x4(self, rhs.simd_into(self.simd))
76 }
77}
78impl<S: Simd> core::ops::SubAssign<f32> for f32x4<S> {
79 #[inline(always)]
80 fn sub_assign(&mut self, rhs: f32) {
81 *self = self.simd.sub_f32x4(*self, rhs.simd_into(self.simd));
82 }
83}
84impl<S: Simd> core::ops::Sub<f32x4<S>> for f32 {
85 type Output = f32x4<S>;
86 #[inline(always)]
87 fn sub(self, rhs: f32x4<S>) -> Self::Output {
88 rhs.simd.sub_f32x4(self.simd_into(rhs.simd), rhs)
89 }
90}
91impl<S: Simd> core::ops::Mul for f32x4<S> {
92 type Output = Self;
93 #[doc = "Multiply two vectors element-wise."]
94 #[inline(always)]
95 fn mul(self, rhs: Self) -> Self::Output {
96 self.simd.mul_f32x4(self, rhs)
97 }
98}
99impl<S: Simd> core::ops::MulAssign for f32x4<S> {
100 #[doc = "Multiply two vectors element-wise."]
101 #[inline(always)]
102 fn mul_assign(&mut self, rhs: Self) {
103 *self = self.simd.mul_f32x4(*self, rhs);
104 }
105}
106impl<S: Simd> core::ops::Mul<f32> for f32x4<S> {
107 type Output = Self;
108 #[inline(always)]
109 fn mul(self, rhs: f32) -> Self::Output {
110 self.simd.mul_f32x4(self, rhs.simd_into(self.simd))
111 }
112}
113impl<S: Simd> core::ops::MulAssign<f32> for f32x4<S> {
114 #[inline(always)]
115 fn mul_assign(&mut self, rhs: f32) {
116 *self = self.simd.mul_f32x4(*self, rhs.simd_into(self.simd));
117 }
118}
119impl<S: Simd> core::ops::Mul<f32x4<S>> for f32 {
120 type Output = f32x4<S>;
121 #[inline(always)]
122 fn mul(self, rhs: f32x4<S>) -> Self::Output {
123 rhs.simd.mul_f32x4(self.simd_into(rhs.simd), rhs)
124 }
125}
126impl<S: Simd> core::ops::Div for f32x4<S> {
127 type Output = Self;
128 #[doc = "Divide two vectors element-wise."]
129 #[inline(always)]
130 fn div(self, rhs: Self) -> Self::Output {
131 self.simd.div_f32x4(self, rhs)
132 }
133}
134impl<S: Simd> core::ops::DivAssign for f32x4<S> {
135 #[doc = "Divide two vectors element-wise."]
136 #[inline(always)]
137 fn div_assign(&mut self, rhs: Self) {
138 *self = self.simd.div_f32x4(*self, rhs);
139 }
140}
141impl<S: Simd> core::ops::Div<f32> for f32x4<S> {
142 type Output = Self;
143 #[inline(always)]
144 fn div(self, rhs: f32) -> Self::Output {
145 self.simd.div_f32x4(self, rhs.simd_into(self.simd))
146 }
147}
148impl<S: Simd> core::ops::DivAssign<f32> for f32x4<S> {
149 #[inline(always)]
150 fn div_assign(&mut self, rhs: f32) {
151 *self = self.simd.div_f32x4(*self, rhs.simd_into(self.simd));
152 }
153}
154impl<S: Simd> core::ops::Div<f32x4<S>> for f32 {
155 type Output = f32x4<S>;
156 #[inline(always)]
157 fn div(self, rhs: f32x4<S>) -> Self::Output {
158 rhs.simd.div_f32x4(self.simd_into(rhs.simd), rhs)
159 }
160}
161impl<S: Simd> core::ops::Neg for i8x16<S> {
162 type Output = Self;
163 #[doc = "Negate each element of the vector, wrapping on overflow."]
164 #[inline(always)]
165 fn neg(self) -> Self::Output {
166 self.simd.neg_i8x16(self)
167 }
168}
169impl<S: Simd> core::ops::Add for i8x16<S> {
170 type Output = Self;
171 #[doc = "Add two vectors element-wise, wrapping on overflow."]
172 #[inline(always)]
173 fn add(self, rhs: Self) -> Self::Output {
174 self.simd.add_i8x16(self, rhs)
175 }
176}
177impl<S: Simd> core::ops::AddAssign for i8x16<S> {
178 #[doc = "Add two vectors element-wise, wrapping on overflow."]
179 #[inline(always)]
180 fn add_assign(&mut self, rhs: Self) {
181 *self = self.simd.add_i8x16(*self, rhs);
182 }
183}
184impl<S: Simd> core::ops::Add<i8> for i8x16<S> {
185 type Output = Self;
186 #[inline(always)]
187 fn add(self, rhs: i8) -> Self::Output {
188 self.simd.add_i8x16(self, rhs.simd_into(self.simd))
189 }
190}
191impl<S: Simd> core::ops::AddAssign<i8> for i8x16<S> {
192 #[inline(always)]
193 fn add_assign(&mut self, rhs: i8) {
194 *self = self.simd.add_i8x16(*self, rhs.simd_into(self.simd));
195 }
196}
197impl<S: Simd> core::ops::Add<i8x16<S>> for i8 {
198 type Output = i8x16<S>;
199 #[inline(always)]
200 fn add(self, rhs: i8x16<S>) -> Self::Output {
201 rhs.simd.add_i8x16(self.simd_into(rhs.simd), rhs)
202 }
203}
204impl<S: Simd> core::ops::Sub for i8x16<S> {
205 type Output = Self;
206 #[doc = "Subtract two vectors element-wise, wrapping on overflow."]
207 #[inline(always)]
208 fn sub(self, rhs: Self) -> Self::Output {
209 self.simd.sub_i8x16(self, rhs)
210 }
211}
212impl<S: Simd> core::ops::SubAssign for i8x16<S> {
213 #[doc = "Subtract two vectors element-wise, wrapping on overflow."]
214 #[inline(always)]
215 fn sub_assign(&mut self, rhs: Self) {
216 *self = self.simd.sub_i8x16(*self, rhs);
217 }
218}
219impl<S: Simd> core::ops::Sub<i8> for i8x16<S> {
220 type Output = Self;
221 #[inline(always)]
222 fn sub(self, rhs: i8) -> Self::Output {
223 self.simd.sub_i8x16(self, rhs.simd_into(self.simd))
224 }
225}
226impl<S: Simd> core::ops::SubAssign<i8> for i8x16<S> {
227 #[inline(always)]
228 fn sub_assign(&mut self, rhs: i8) {
229 *self = self.simd.sub_i8x16(*self, rhs.simd_into(self.simd));
230 }
231}
232impl<S: Simd> core::ops::Sub<i8x16<S>> for i8 {
233 type Output = i8x16<S>;
234 #[inline(always)]
235 fn sub(self, rhs: i8x16<S>) -> Self::Output {
236 rhs.simd.sub_i8x16(self.simd_into(rhs.simd), rhs)
237 }
238}
239impl<S: Simd> core::ops::Mul for i8x16<S> {
240 type Output = Self;
241 #[doc = "Multiply two vectors element-wise, wrapping on overflow."]
242 #[inline(always)]
243 fn mul(self, rhs: Self) -> Self::Output {
244 self.simd.mul_i8x16(self, rhs)
245 }
246}
247impl<S: Simd> core::ops::MulAssign for i8x16<S> {
248 #[doc = "Multiply two vectors element-wise, wrapping on overflow."]
249 #[inline(always)]
250 fn mul_assign(&mut self, rhs: Self) {
251 *self = self.simd.mul_i8x16(*self, rhs);
252 }
253}
254impl<S: Simd> core::ops::Mul<i8> for i8x16<S> {
255 type Output = Self;
256 #[inline(always)]
257 fn mul(self, rhs: i8) -> Self::Output {
258 self.simd.mul_i8x16(self, rhs.simd_into(self.simd))
259 }
260}
261impl<S: Simd> core::ops::MulAssign<i8> for i8x16<S> {
262 #[inline(always)]
263 fn mul_assign(&mut self, rhs: i8) {
264 *self = self.simd.mul_i8x16(*self, rhs.simd_into(self.simd));
265 }
266}
267impl<S: Simd> core::ops::Mul<i8x16<S>> for i8 {
268 type Output = i8x16<S>;
269 #[inline(always)]
270 fn mul(self, rhs: i8x16<S>) -> Self::Output {
271 rhs.simd.mul_i8x16(self.simd_into(rhs.simd), rhs)
272 }
273}
274impl<S: Simd> core::ops::BitAnd for i8x16<S> {
275 type Output = Self;
276 #[doc = "Compute the bitwise AND of two vectors."]
277 #[inline(always)]
278 fn bitand(self, rhs: Self) -> Self::Output {
279 self.simd.and_i8x16(self, rhs)
280 }
281}
282impl<S: Simd> core::ops::BitAndAssign for i8x16<S> {
283 #[doc = "Compute the bitwise AND of two vectors."]
284 #[inline(always)]
285 fn bitand_assign(&mut self, rhs: Self) {
286 *self = self.simd.and_i8x16(*self, rhs);
287 }
288}
289impl<S: Simd> core::ops::BitAnd<i8> for i8x16<S> {
290 type Output = Self;
291 #[inline(always)]
292 fn bitand(self, rhs: i8) -> Self::Output {
293 self.simd.and_i8x16(self, rhs.simd_into(self.simd))
294 }
295}
296impl<S: Simd> core::ops::BitAndAssign<i8> for i8x16<S> {
297 #[inline(always)]
298 fn bitand_assign(&mut self, rhs: i8) {
299 *self = self.simd.and_i8x16(*self, rhs.simd_into(self.simd));
300 }
301}
302impl<S: Simd> core::ops::BitAnd<i8x16<S>> for i8 {
303 type Output = i8x16<S>;
304 #[inline(always)]
305 fn bitand(self, rhs: i8x16<S>) -> Self::Output {
306 rhs.simd.and_i8x16(self.simd_into(rhs.simd), rhs)
307 }
308}
309impl<S: Simd> core::ops::BitOr for i8x16<S> {
310 type Output = Self;
311 #[doc = "Compute the bitwise OR of two vectors."]
312 #[inline(always)]
313 fn bitor(self, rhs: Self) -> Self::Output {
314 self.simd.or_i8x16(self, rhs)
315 }
316}
317impl<S: Simd> core::ops::BitOrAssign for i8x16<S> {
318 #[doc = "Compute the bitwise OR of two vectors."]
319 #[inline(always)]
320 fn bitor_assign(&mut self, rhs: Self) {
321 *self = self.simd.or_i8x16(*self, rhs);
322 }
323}
324impl<S: Simd> core::ops::BitOr<i8> for i8x16<S> {
325 type Output = Self;
326 #[inline(always)]
327 fn bitor(self, rhs: i8) -> Self::Output {
328 self.simd.or_i8x16(self, rhs.simd_into(self.simd))
329 }
330}
331impl<S: Simd> core::ops::BitOrAssign<i8> for i8x16<S> {
332 #[inline(always)]
333 fn bitor_assign(&mut self, rhs: i8) {
334 *self = self.simd.or_i8x16(*self, rhs.simd_into(self.simd));
335 }
336}
337impl<S: Simd> core::ops::BitOr<i8x16<S>> for i8 {
338 type Output = i8x16<S>;
339 #[inline(always)]
340 fn bitor(self, rhs: i8x16<S>) -> Self::Output {
341 rhs.simd.or_i8x16(self.simd_into(rhs.simd), rhs)
342 }
343}
344impl<S: Simd> core::ops::BitXor for i8x16<S> {
345 type Output = Self;
346 #[doc = "Compute the bitwise XOR of two vectors."]
347 #[inline(always)]
348 fn bitxor(self, rhs: Self) -> Self::Output {
349 self.simd.xor_i8x16(self, rhs)
350 }
351}
352impl<S: Simd> core::ops::BitXorAssign for i8x16<S> {
353 #[doc = "Compute the bitwise XOR of two vectors."]
354 #[inline(always)]
355 fn bitxor_assign(&mut self, rhs: Self) {
356 *self = self.simd.xor_i8x16(*self, rhs);
357 }
358}
359impl<S: Simd> core::ops::BitXor<i8> for i8x16<S> {
360 type Output = Self;
361 #[inline(always)]
362 fn bitxor(self, rhs: i8) -> Self::Output {
363 self.simd.xor_i8x16(self, rhs.simd_into(self.simd))
364 }
365}
366impl<S: Simd> core::ops::BitXorAssign<i8> for i8x16<S> {
367 #[inline(always)]
368 fn bitxor_assign(&mut self, rhs: i8) {
369 *self = self.simd.xor_i8x16(*self, rhs.simd_into(self.simd));
370 }
371}
372impl<S: Simd> core::ops::BitXor<i8x16<S>> for i8 {
373 type Output = i8x16<S>;
374 #[inline(always)]
375 fn bitxor(self, rhs: i8x16<S>) -> Self::Output {
376 rhs.simd.xor_i8x16(self.simd_into(rhs.simd), rhs)
377 }
378}
379impl<S: Simd> core::ops::Not for i8x16<S> {
380 type Output = Self;
381 #[doc = "Compute the bitwise NOT of the vector."]
382 #[inline(always)]
383 fn not(self) -> Self::Output {
384 self.simd.not_i8x16(self)
385 }
386}
387impl<S: Simd> core::ops::Shl<u32> for i8x16<S> {
388 type Output = Self;
389 #[doc = "Shift each element left by the given number of bits.\n\nBits shifted out of the left side are discarded, and zeros are shifted in on the right.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform."]
390 #[inline(always)]
391 fn shl(self, rhs: u32) -> Self::Output {
392 self.simd.shl_i8x16(self, rhs)
393 }
394}
395impl<S: Simd> core::ops::ShlAssign<u32> for i8x16<S> {
396 #[inline(always)]
397 fn shl_assign(&mut self, rhs: u32) {
398 *self = self.simd.shl_i8x16(*self, rhs);
399 }
400}
401impl<S: Simd> core::ops::Shl for i8x16<S> {
402 type Output = Self;
403 #[doc = "Shift each element left by the given number of bits.\n\nBits shifted out of the left side are discarded, and zeros are shifted in on the right.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform.\n\n# Performance\nThis per-lane shift is slower than shifting the entire vector by a scalar. It is not vectorized at all on WebAssembly, SSE4.2, and for `u8` and `i8` elements on AVX2. Prefer shifting by a single scalar value instead of by a vector whenever possible."]
404 #[inline(always)]
405 fn shl(self, rhs: Self) -> Self::Output {
406 self.simd.shlv_i8x16(self, rhs)
407 }
408}
409impl<S: Simd> core::ops::ShlAssign for i8x16<S> {
410 #[doc = "Shift each element left by the given number of bits.\n\nBits shifted out of the left side are discarded, and zeros are shifted in on the right.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform.\n\n# Performance\nThis per-lane shift is slower than shifting the entire vector by a scalar. It is not vectorized at all on WebAssembly, SSE4.2, and for `u8` and `i8` elements on AVX2. Prefer shifting by a single scalar value instead of by a vector whenever possible."]
411 #[inline(always)]
412 fn shl_assign(&mut self, rhs: Self) {
413 *self = self.simd.shlv_i8x16(*self, rhs);
414 }
415}
416impl<S: Simd> core::ops::Shr<u32> for i8x16<S> {
417 type Output = Self;
418 #[doc = "Shift each element right by the given number of bits.\n\nFor unsigned integers, zeros are shifted in on the left. For signed integers, the sign bit is replicated.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform."]
419 #[inline(always)]
420 fn shr(self, rhs: u32) -> Self::Output {
421 self.simd.shr_i8x16(self, rhs)
422 }
423}
424impl<S: Simd> core::ops::ShrAssign<u32> for i8x16<S> {
425 #[inline(always)]
426 fn shr_assign(&mut self, rhs: u32) {
427 *self = self.simd.shr_i8x16(*self, rhs);
428 }
429}
430impl<S: Simd> core::ops::Shr for i8x16<S> {
431 type Output = Self;
432 #[doc = "Shift each element right by the corresponding element in another vector.\n\nFor unsigned integers, zeros are shifted in on the left. For signed integers, the sign bit is replicated.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform.\n\n# Performance\nThis per-lane shift is slower than shifting the entire vector by a scalar. It is not vectorized at all on WebAssembly, SSE4.2, and for `u8` and `i8` elements on AVX2. Prefer shifting by a single scalar value instead of by a vector whenever possible."]
433 #[inline(always)]
434 fn shr(self, rhs: Self) -> Self::Output {
435 self.simd.shrv_i8x16(self, rhs)
436 }
437}
438impl<S: Simd> core::ops::ShrAssign for i8x16<S> {
439 #[doc = "Shift each element right by the corresponding element in another vector.\n\nFor unsigned integers, zeros are shifted in on the left. For signed integers, the sign bit is replicated.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform.\n\n# Performance\nThis per-lane shift is slower than shifting the entire vector by a scalar. It is not vectorized at all on WebAssembly, SSE4.2, and for `u8` and `i8` elements on AVX2. Prefer shifting by a single scalar value instead of by a vector whenever possible."]
440 #[inline(always)]
441 fn shr_assign(&mut self, rhs: Self) {
442 *self = self.simd.shrv_i8x16(*self, rhs);
443 }
444}
445impl<S: Simd> core::ops::Add for u8x16<S> {
446 type Output = Self;
447 #[doc = "Add two vectors element-wise, wrapping on overflow."]
448 #[inline(always)]
449 fn add(self, rhs: Self) -> Self::Output {
450 self.simd.add_u8x16(self, rhs)
451 }
452}
453impl<S: Simd> core::ops::AddAssign for u8x16<S> {
454 #[doc = "Add two vectors element-wise, wrapping on overflow."]
455 #[inline(always)]
456 fn add_assign(&mut self, rhs: Self) {
457 *self = self.simd.add_u8x16(*self, rhs);
458 }
459}
460impl<S: Simd> core::ops::Add<u8> for u8x16<S> {
461 type Output = Self;
462 #[inline(always)]
463 fn add(self, rhs: u8) -> Self::Output {
464 self.simd.add_u8x16(self, rhs.simd_into(self.simd))
465 }
466}
467impl<S: Simd> core::ops::AddAssign<u8> for u8x16<S> {
468 #[inline(always)]
469 fn add_assign(&mut self, rhs: u8) {
470 *self = self.simd.add_u8x16(*self, rhs.simd_into(self.simd));
471 }
472}
473impl<S: Simd> core::ops::Add<u8x16<S>> for u8 {
474 type Output = u8x16<S>;
475 #[inline(always)]
476 fn add(self, rhs: u8x16<S>) -> Self::Output {
477 rhs.simd.add_u8x16(self.simd_into(rhs.simd), rhs)
478 }
479}
480impl<S: Simd> core::ops::Sub for u8x16<S> {
481 type Output = Self;
482 #[doc = "Subtract two vectors element-wise, wrapping on overflow."]
483 #[inline(always)]
484 fn sub(self, rhs: Self) -> Self::Output {
485 self.simd.sub_u8x16(self, rhs)
486 }
487}
488impl<S: Simd> core::ops::SubAssign for u8x16<S> {
489 #[doc = "Subtract two vectors element-wise, wrapping on overflow."]
490 #[inline(always)]
491 fn sub_assign(&mut self, rhs: Self) {
492 *self = self.simd.sub_u8x16(*self, rhs);
493 }
494}
495impl<S: Simd> core::ops::Sub<u8> for u8x16<S> {
496 type Output = Self;
497 #[inline(always)]
498 fn sub(self, rhs: u8) -> Self::Output {
499 self.simd.sub_u8x16(self, rhs.simd_into(self.simd))
500 }
501}
502impl<S: Simd> core::ops::SubAssign<u8> for u8x16<S> {
503 #[inline(always)]
504 fn sub_assign(&mut self, rhs: u8) {
505 *self = self.simd.sub_u8x16(*self, rhs.simd_into(self.simd));
506 }
507}
508impl<S: Simd> core::ops::Sub<u8x16<S>> for u8 {
509 type Output = u8x16<S>;
510 #[inline(always)]
511 fn sub(self, rhs: u8x16<S>) -> Self::Output {
512 rhs.simd.sub_u8x16(self.simd_into(rhs.simd), rhs)
513 }
514}
515impl<S: Simd> core::ops::Mul for u8x16<S> {
516 type Output = Self;
517 #[doc = "Multiply two vectors element-wise, wrapping on overflow."]
518 #[inline(always)]
519 fn mul(self, rhs: Self) -> Self::Output {
520 self.simd.mul_u8x16(self, rhs)
521 }
522}
523impl<S: Simd> core::ops::MulAssign for u8x16<S> {
524 #[doc = "Multiply two vectors element-wise, wrapping on overflow."]
525 #[inline(always)]
526 fn mul_assign(&mut self, rhs: Self) {
527 *self = self.simd.mul_u8x16(*self, rhs);
528 }
529}
530impl<S: Simd> core::ops::Mul<u8> for u8x16<S> {
531 type Output = Self;
532 #[inline(always)]
533 fn mul(self, rhs: u8) -> Self::Output {
534 self.simd.mul_u8x16(self, rhs.simd_into(self.simd))
535 }
536}
537impl<S: Simd> core::ops::MulAssign<u8> for u8x16<S> {
538 #[inline(always)]
539 fn mul_assign(&mut self, rhs: u8) {
540 *self = self.simd.mul_u8x16(*self, rhs.simd_into(self.simd));
541 }
542}
543impl<S: Simd> core::ops::Mul<u8x16<S>> for u8 {
544 type Output = u8x16<S>;
545 #[inline(always)]
546 fn mul(self, rhs: u8x16<S>) -> Self::Output {
547 rhs.simd.mul_u8x16(self.simd_into(rhs.simd), rhs)
548 }
549}
550impl<S: Simd> core::ops::BitAnd for u8x16<S> {
551 type Output = Self;
552 #[doc = "Compute the bitwise AND of two vectors."]
553 #[inline(always)]
554 fn bitand(self, rhs: Self) -> Self::Output {
555 self.simd.and_u8x16(self, rhs)
556 }
557}
558impl<S: Simd> core::ops::BitAndAssign for u8x16<S> {
559 #[doc = "Compute the bitwise AND of two vectors."]
560 #[inline(always)]
561 fn bitand_assign(&mut self, rhs: Self) {
562 *self = self.simd.and_u8x16(*self, rhs);
563 }
564}
565impl<S: Simd> core::ops::BitAnd<u8> for u8x16<S> {
566 type Output = Self;
567 #[inline(always)]
568 fn bitand(self, rhs: u8) -> Self::Output {
569 self.simd.and_u8x16(self, rhs.simd_into(self.simd))
570 }
571}
572impl<S: Simd> core::ops::BitAndAssign<u8> for u8x16<S> {
573 #[inline(always)]
574 fn bitand_assign(&mut self, rhs: u8) {
575 *self = self.simd.and_u8x16(*self, rhs.simd_into(self.simd));
576 }
577}
578impl<S: Simd> core::ops::BitAnd<u8x16<S>> for u8 {
579 type Output = u8x16<S>;
580 #[inline(always)]
581 fn bitand(self, rhs: u8x16<S>) -> Self::Output {
582 rhs.simd.and_u8x16(self.simd_into(rhs.simd), rhs)
583 }
584}
585impl<S: Simd> core::ops::BitOr for u8x16<S> {
586 type Output = Self;
587 #[doc = "Compute the bitwise OR of two vectors."]
588 #[inline(always)]
589 fn bitor(self, rhs: Self) -> Self::Output {
590 self.simd.or_u8x16(self, rhs)
591 }
592}
593impl<S: Simd> core::ops::BitOrAssign for u8x16<S> {
594 #[doc = "Compute the bitwise OR of two vectors."]
595 #[inline(always)]
596 fn bitor_assign(&mut self, rhs: Self) {
597 *self = self.simd.or_u8x16(*self, rhs);
598 }
599}
600impl<S: Simd> core::ops::BitOr<u8> for u8x16<S> {
601 type Output = Self;
602 #[inline(always)]
603 fn bitor(self, rhs: u8) -> Self::Output {
604 self.simd.or_u8x16(self, rhs.simd_into(self.simd))
605 }
606}
607impl<S: Simd> core::ops::BitOrAssign<u8> for u8x16<S> {
608 #[inline(always)]
609 fn bitor_assign(&mut self, rhs: u8) {
610 *self = self.simd.or_u8x16(*self, rhs.simd_into(self.simd));
611 }
612}
613impl<S: Simd> core::ops::BitOr<u8x16<S>> for u8 {
614 type Output = u8x16<S>;
615 #[inline(always)]
616 fn bitor(self, rhs: u8x16<S>) -> Self::Output {
617 rhs.simd.or_u8x16(self.simd_into(rhs.simd), rhs)
618 }
619}
620impl<S: Simd> core::ops::BitXor for u8x16<S> {
621 type Output = Self;
622 #[doc = "Compute the bitwise XOR of two vectors."]
623 #[inline(always)]
624 fn bitxor(self, rhs: Self) -> Self::Output {
625 self.simd.xor_u8x16(self, rhs)
626 }
627}
628impl<S: Simd> core::ops::BitXorAssign for u8x16<S> {
629 #[doc = "Compute the bitwise XOR of two vectors."]
630 #[inline(always)]
631 fn bitxor_assign(&mut self, rhs: Self) {
632 *self = self.simd.xor_u8x16(*self, rhs);
633 }
634}
635impl<S: Simd> core::ops::BitXor<u8> for u8x16<S> {
636 type Output = Self;
637 #[inline(always)]
638 fn bitxor(self, rhs: u8) -> Self::Output {
639 self.simd.xor_u8x16(self, rhs.simd_into(self.simd))
640 }
641}
642impl<S: Simd> core::ops::BitXorAssign<u8> for u8x16<S> {
643 #[inline(always)]
644 fn bitxor_assign(&mut self, rhs: u8) {
645 *self = self.simd.xor_u8x16(*self, rhs.simd_into(self.simd));
646 }
647}
648impl<S: Simd> core::ops::BitXor<u8x16<S>> for u8 {
649 type Output = u8x16<S>;
650 #[inline(always)]
651 fn bitxor(self, rhs: u8x16<S>) -> Self::Output {
652 rhs.simd.xor_u8x16(self.simd_into(rhs.simd), rhs)
653 }
654}
655impl<S: Simd> core::ops::Not for u8x16<S> {
656 type Output = Self;
657 #[doc = "Compute the bitwise NOT of the vector."]
658 #[inline(always)]
659 fn not(self) -> Self::Output {
660 self.simd.not_u8x16(self)
661 }
662}
663impl<S: Simd> core::ops::Shl<u32> for u8x16<S> {
664 type Output = Self;
665 #[doc = "Shift each element left by the given number of bits.\n\nBits shifted out of the left side are discarded, and zeros are shifted in on the right.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform."]
666 #[inline(always)]
667 fn shl(self, rhs: u32) -> Self::Output {
668 self.simd.shl_u8x16(self, rhs)
669 }
670}
671impl<S: Simd> core::ops::ShlAssign<u32> for u8x16<S> {
672 #[inline(always)]
673 fn shl_assign(&mut self, rhs: u32) {
674 *self = self.simd.shl_u8x16(*self, rhs);
675 }
676}
677impl<S: Simd> core::ops::Shl for u8x16<S> {
678 type Output = Self;
679 #[doc = "Shift each element left by the given number of bits.\n\nBits shifted out of the left side are discarded, and zeros are shifted in on the right.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform.\n\n# Performance\nThis per-lane shift is slower than shifting the entire vector by a scalar. It is not vectorized at all on WebAssembly, SSE4.2, and for `u8` and `i8` elements on AVX2. Prefer shifting by a single scalar value instead of by a vector whenever possible."]
680 #[inline(always)]
681 fn shl(self, rhs: Self) -> Self::Output {
682 self.simd.shlv_u8x16(self, rhs)
683 }
684}
685impl<S: Simd> core::ops::ShlAssign for u8x16<S> {
686 #[doc = "Shift each element left by the given number of bits.\n\nBits shifted out of the left side are discarded, and zeros are shifted in on the right.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform.\n\n# Performance\nThis per-lane shift is slower than shifting the entire vector by a scalar. It is not vectorized at all on WebAssembly, SSE4.2, and for `u8` and `i8` elements on AVX2. Prefer shifting by a single scalar value instead of by a vector whenever possible."]
687 #[inline(always)]
688 fn shl_assign(&mut self, rhs: Self) {
689 *self = self.simd.shlv_u8x16(*self, rhs);
690 }
691}
692impl<S: Simd> core::ops::Shr<u32> for u8x16<S> {
693 type Output = Self;
694 #[doc = "Shift each element right by the given number of bits.\n\nFor unsigned integers, zeros are shifted in on the left. For signed integers, the sign bit is replicated.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform."]
695 #[inline(always)]
696 fn shr(self, rhs: u32) -> Self::Output {
697 self.simd.shr_u8x16(self, rhs)
698 }
699}
700impl<S: Simd> core::ops::ShrAssign<u32> for u8x16<S> {
701 #[inline(always)]
702 fn shr_assign(&mut self, rhs: u32) {
703 *self = self.simd.shr_u8x16(*self, rhs);
704 }
705}
706impl<S: Simd> core::ops::Shr for u8x16<S> {
707 type Output = Self;
708 #[doc = "Shift each element right by the corresponding element in another vector.\n\nFor unsigned integers, zeros are shifted in on the left. For signed integers, the sign bit is replicated.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform.\n\n# Performance\nThis per-lane shift is slower than shifting the entire vector by a scalar. It is not vectorized at all on WebAssembly, SSE4.2, and for `u8` and `i8` elements on AVX2. Prefer shifting by a single scalar value instead of by a vector whenever possible."]
709 #[inline(always)]
710 fn shr(self, rhs: Self) -> Self::Output {
711 self.simd.shrv_u8x16(self, rhs)
712 }
713}
714impl<S: Simd> core::ops::ShrAssign for u8x16<S> {
715 #[doc = "Shift each element right by the corresponding element in another vector.\n\nFor unsigned integers, zeros are shifted in on the left. For signed integers, the sign bit is replicated.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform.\n\n# Performance\nThis per-lane shift is slower than shifting the entire vector by a scalar. It is not vectorized at all on WebAssembly, SSE4.2, and for `u8` and `i8` elements on AVX2. Prefer shifting by a single scalar value instead of by a vector whenever possible."]
716 #[inline(always)]
717 fn shr_assign(&mut self, rhs: Self) {
718 *self = self.simd.shrv_u8x16(*self, rhs);
719 }
720}
721impl<S: Simd> core::ops::BitAnd for mask8x16<S> {
722 type Output = Self;
723 #[doc = "Compute the logical AND of two masks."]
724 #[inline(always)]
725 fn bitand(self, rhs: Self) -> Self::Output {
726 self.simd.and_mask8x16(self, rhs)
727 }
728}
729impl<S: Simd> core::ops::BitAndAssign for mask8x16<S> {
730 #[doc = "Compute the logical AND of two masks."]
731 #[inline(always)]
732 fn bitand_assign(&mut self, rhs: Self) {
733 *self = self.simd.and_mask8x16(*self, rhs);
734 }
735}
736impl<S: Simd> core::ops::BitOr for mask8x16<S> {
737 type Output = Self;
738 #[doc = "Compute the logical OR of two masks."]
739 #[inline(always)]
740 fn bitor(self, rhs: Self) -> Self::Output {
741 self.simd.or_mask8x16(self, rhs)
742 }
743}
744impl<S: Simd> core::ops::BitOrAssign for mask8x16<S> {
745 #[doc = "Compute the logical OR of two masks."]
746 #[inline(always)]
747 fn bitor_assign(&mut self, rhs: Self) {
748 *self = self.simd.or_mask8x16(*self, rhs);
749 }
750}
751impl<S: Simd> core::ops::BitXor for mask8x16<S> {
752 type Output = Self;
753 #[doc = "Compute the logical XOR of two masks."]
754 #[inline(always)]
755 fn bitxor(self, rhs: Self) -> Self::Output {
756 self.simd.xor_mask8x16(self, rhs)
757 }
758}
759impl<S: Simd> core::ops::BitXorAssign for mask8x16<S> {
760 #[doc = "Compute the logical XOR of two masks."]
761 #[inline(always)]
762 fn bitxor_assign(&mut self, rhs: Self) {
763 *self = self.simd.xor_mask8x16(*self, rhs);
764 }
765}
766impl<S: Simd> core::ops::Not for mask8x16<S> {
767 type Output = Self;
768 #[doc = "Compute the logical NOT of the mask."]
769 #[inline(always)]
770 fn not(self) -> Self::Output {
771 self.simd.not_mask8x16(self)
772 }
773}
774impl<S: Simd> core::ops::Neg for i16x8<S> {
775 type Output = Self;
776 #[doc = "Negate each element of the vector, wrapping on overflow."]
777 #[inline(always)]
778 fn neg(self) -> Self::Output {
779 self.simd.neg_i16x8(self)
780 }
781}
782impl<S: Simd> core::ops::Add for i16x8<S> {
783 type Output = Self;
784 #[doc = "Add two vectors element-wise, wrapping on overflow."]
785 #[inline(always)]
786 fn add(self, rhs: Self) -> Self::Output {
787 self.simd.add_i16x8(self, rhs)
788 }
789}
790impl<S: Simd> core::ops::AddAssign for i16x8<S> {
791 #[doc = "Add two vectors element-wise, wrapping on overflow."]
792 #[inline(always)]
793 fn add_assign(&mut self, rhs: Self) {
794 *self = self.simd.add_i16x8(*self, rhs);
795 }
796}
797impl<S: Simd> core::ops::Add<i16> for i16x8<S> {
798 type Output = Self;
799 #[inline(always)]
800 fn add(self, rhs: i16) -> Self::Output {
801 self.simd.add_i16x8(self, rhs.simd_into(self.simd))
802 }
803}
804impl<S: Simd> core::ops::AddAssign<i16> for i16x8<S> {
805 #[inline(always)]
806 fn add_assign(&mut self, rhs: i16) {
807 *self = self.simd.add_i16x8(*self, rhs.simd_into(self.simd));
808 }
809}
810impl<S: Simd> core::ops::Add<i16x8<S>> for i16 {
811 type Output = i16x8<S>;
812 #[inline(always)]
813 fn add(self, rhs: i16x8<S>) -> Self::Output {
814 rhs.simd.add_i16x8(self.simd_into(rhs.simd), rhs)
815 }
816}
817impl<S: Simd> core::ops::Sub for i16x8<S> {
818 type Output = Self;
819 #[doc = "Subtract two vectors element-wise, wrapping on overflow."]
820 #[inline(always)]
821 fn sub(self, rhs: Self) -> Self::Output {
822 self.simd.sub_i16x8(self, rhs)
823 }
824}
825impl<S: Simd> core::ops::SubAssign for i16x8<S> {
826 #[doc = "Subtract two vectors element-wise, wrapping on overflow."]
827 #[inline(always)]
828 fn sub_assign(&mut self, rhs: Self) {
829 *self = self.simd.sub_i16x8(*self, rhs);
830 }
831}
832impl<S: Simd> core::ops::Sub<i16> for i16x8<S> {
833 type Output = Self;
834 #[inline(always)]
835 fn sub(self, rhs: i16) -> Self::Output {
836 self.simd.sub_i16x8(self, rhs.simd_into(self.simd))
837 }
838}
839impl<S: Simd> core::ops::SubAssign<i16> for i16x8<S> {
840 #[inline(always)]
841 fn sub_assign(&mut self, rhs: i16) {
842 *self = self.simd.sub_i16x8(*self, rhs.simd_into(self.simd));
843 }
844}
845impl<S: Simd> core::ops::Sub<i16x8<S>> for i16 {
846 type Output = i16x8<S>;
847 #[inline(always)]
848 fn sub(self, rhs: i16x8<S>) -> Self::Output {
849 rhs.simd.sub_i16x8(self.simd_into(rhs.simd), rhs)
850 }
851}
852impl<S: Simd> core::ops::Mul for i16x8<S> {
853 type Output = Self;
854 #[doc = "Multiply two vectors element-wise, wrapping on overflow."]
855 #[inline(always)]
856 fn mul(self, rhs: Self) -> Self::Output {
857 self.simd.mul_i16x8(self, rhs)
858 }
859}
860impl<S: Simd> core::ops::MulAssign for i16x8<S> {
861 #[doc = "Multiply two vectors element-wise, wrapping on overflow."]
862 #[inline(always)]
863 fn mul_assign(&mut self, rhs: Self) {
864 *self = self.simd.mul_i16x8(*self, rhs);
865 }
866}
867impl<S: Simd> core::ops::Mul<i16> for i16x8<S> {
868 type Output = Self;
869 #[inline(always)]
870 fn mul(self, rhs: i16) -> Self::Output {
871 self.simd.mul_i16x8(self, rhs.simd_into(self.simd))
872 }
873}
874impl<S: Simd> core::ops::MulAssign<i16> for i16x8<S> {
875 #[inline(always)]
876 fn mul_assign(&mut self, rhs: i16) {
877 *self = self.simd.mul_i16x8(*self, rhs.simd_into(self.simd));
878 }
879}
880impl<S: Simd> core::ops::Mul<i16x8<S>> for i16 {
881 type Output = i16x8<S>;
882 #[inline(always)]
883 fn mul(self, rhs: i16x8<S>) -> Self::Output {
884 rhs.simd.mul_i16x8(self.simd_into(rhs.simd), rhs)
885 }
886}
887impl<S: Simd> core::ops::BitAnd for i16x8<S> {
888 type Output = Self;
889 #[doc = "Compute the bitwise AND of two vectors."]
890 #[inline(always)]
891 fn bitand(self, rhs: Self) -> Self::Output {
892 self.simd.and_i16x8(self, rhs)
893 }
894}
895impl<S: Simd> core::ops::BitAndAssign for i16x8<S> {
896 #[doc = "Compute the bitwise AND of two vectors."]
897 #[inline(always)]
898 fn bitand_assign(&mut self, rhs: Self) {
899 *self = self.simd.and_i16x8(*self, rhs);
900 }
901}
902impl<S: Simd> core::ops::BitAnd<i16> for i16x8<S> {
903 type Output = Self;
904 #[inline(always)]
905 fn bitand(self, rhs: i16) -> Self::Output {
906 self.simd.and_i16x8(self, rhs.simd_into(self.simd))
907 }
908}
909impl<S: Simd> core::ops::BitAndAssign<i16> for i16x8<S> {
910 #[inline(always)]
911 fn bitand_assign(&mut self, rhs: i16) {
912 *self = self.simd.and_i16x8(*self, rhs.simd_into(self.simd));
913 }
914}
915impl<S: Simd> core::ops::BitAnd<i16x8<S>> for i16 {
916 type Output = i16x8<S>;
917 #[inline(always)]
918 fn bitand(self, rhs: i16x8<S>) -> Self::Output {
919 rhs.simd.and_i16x8(self.simd_into(rhs.simd), rhs)
920 }
921}
922impl<S: Simd> core::ops::BitOr for i16x8<S> {
923 type Output = Self;
924 #[doc = "Compute the bitwise OR of two vectors."]
925 #[inline(always)]
926 fn bitor(self, rhs: Self) -> Self::Output {
927 self.simd.or_i16x8(self, rhs)
928 }
929}
930impl<S: Simd> core::ops::BitOrAssign for i16x8<S> {
931 #[doc = "Compute the bitwise OR of two vectors."]
932 #[inline(always)]
933 fn bitor_assign(&mut self, rhs: Self) {
934 *self = self.simd.or_i16x8(*self, rhs);
935 }
936}
937impl<S: Simd> core::ops::BitOr<i16> for i16x8<S> {
938 type Output = Self;
939 #[inline(always)]
940 fn bitor(self, rhs: i16) -> Self::Output {
941 self.simd.or_i16x8(self, rhs.simd_into(self.simd))
942 }
943}
944impl<S: Simd> core::ops::BitOrAssign<i16> for i16x8<S> {
945 #[inline(always)]
946 fn bitor_assign(&mut self, rhs: i16) {
947 *self = self.simd.or_i16x8(*self, rhs.simd_into(self.simd));
948 }
949}
950impl<S: Simd> core::ops::BitOr<i16x8<S>> for i16 {
951 type Output = i16x8<S>;
952 #[inline(always)]
953 fn bitor(self, rhs: i16x8<S>) -> Self::Output {
954 rhs.simd.or_i16x8(self.simd_into(rhs.simd), rhs)
955 }
956}
957impl<S: Simd> core::ops::BitXor for i16x8<S> {
958 type Output = Self;
959 #[doc = "Compute the bitwise XOR of two vectors."]
960 #[inline(always)]
961 fn bitxor(self, rhs: Self) -> Self::Output {
962 self.simd.xor_i16x8(self, rhs)
963 }
964}
965impl<S: Simd> core::ops::BitXorAssign for i16x8<S> {
966 #[doc = "Compute the bitwise XOR of two vectors."]
967 #[inline(always)]
968 fn bitxor_assign(&mut self, rhs: Self) {
969 *self = self.simd.xor_i16x8(*self, rhs);
970 }
971}
972impl<S: Simd> core::ops::BitXor<i16> for i16x8<S> {
973 type Output = Self;
974 #[inline(always)]
975 fn bitxor(self, rhs: i16) -> Self::Output {
976 self.simd.xor_i16x8(self, rhs.simd_into(self.simd))
977 }
978}
979impl<S: Simd> core::ops::BitXorAssign<i16> for i16x8<S> {
980 #[inline(always)]
981 fn bitxor_assign(&mut self, rhs: i16) {
982 *self = self.simd.xor_i16x8(*self, rhs.simd_into(self.simd));
983 }
984}
985impl<S: Simd> core::ops::BitXor<i16x8<S>> for i16 {
986 type Output = i16x8<S>;
987 #[inline(always)]
988 fn bitxor(self, rhs: i16x8<S>) -> Self::Output {
989 rhs.simd.xor_i16x8(self.simd_into(rhs.simd), rhs)
990 }
991}
992impl<S: Simd> core::ops::Not for i16x8<S> {
993 type Output = Self;
994 #[doc = "Compute the bitwise NOT of the vector."]
995 #[inline(always)]
996 fn not(self) -> Self::Output {
997 self.simd.not_i16x8(self)
998 }
999}
1000impl<S: Simd> core::ops::Shl<u32> for i16x8<S> {
1001 type Output = Self;
1002 #[doc = "Shift each element left by the given number of bits.\n\nBits shifted out of the left side are discarded, and zeros are shifted in on the right.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform."]
1003 #[inline(always)]
1004 fn shl(self, rhs: u32) -> Self::Output {
1005 self.simd.shl_i16x8(self, rhs)
1006 }
1007}
1008impl<S: Simd> core::ops::ShlAssign<u32> for i16x8<S> {
1009 #[inline(always)]
1010 fn shl_assign(&mut self, rhs: u32) {
1011 *self = self.simd.shl_i16x8(*self, rhs);
1012 }
1013}
1014impl<S: Simd> core::ops::Shl for i16x8<S> {
1015 type Output = Self;
1016 #[doc = "Shift each element left by the given number of bits.\n\nBits shifted out of the left side are discarded, and zeros are shifted in on the right.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform.\n\n# Performance\nThis per-lane shift is slower than shifting the entire vector by a scalar. It is not vectorized at all on WebAssembly, SSE4.2, and for `u8` and `i8` elements on AVX2. Prefer shifting by a single scalar value instead of by a vector whenever possible."]
1017 #[inline(always)]
1018 fn shl(self, rhs: Self) -> Self::Output {
1019 self.simd.shlv_i16x8(self, rhs)
1020 }
1021}
1022impl<S: Simd> core::ops::ShlAssign for i16x8<S> {
1023 #[doc = "Shift each element left by the given number of bits.\n\nBits shifted out of the left side are discarded, and zeros are shifted in on the right.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform.\n\n# Performance\nThis per-lane shift is slower than shifting the entire vector by a scalar. It is not vectorized at all on WebAssembly, SSE4.2, and for `u8` and `i8` elements on AVX2. Prefer shifting by a single scalar value instead of by a vector whenever possible."]
1024 #[inline(always)]
1025 fn shl_assign(&mut self, rhs: Self) {
1026 *self = self.simd.shlv_i16x8(*self, rhs);
1027 }
1028}
1029impl<S: Simd> core::ops::Shr<u32> for i16x8<S> {
1030 type Output = Self;
1031 #[doc = "Shift each element right by the given number of bits.\n\nFor unsigned integers, zeros are shifted in on the left. For signed integers, the sign bit is replicated.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform."]
1032 #[inline(always)]
1033 fn shr(self, rhs: u32) -> Self::Output {
1034 self.simd.shr_i16x8(self, rhs)
1035 }
1036}
1037impl<S: Simd> core::ops::ShrAssign<u32> for i16x8<S> {
1038 #[inline(always)]
1039 fn shr_assign(&mut self, rhs: u32) {
1040 *self = self.simd.shr_i16x8(*self, rhs);
1041 }
1042}
1043impl<S: Simd> core::ops::Shr for i16x8<S> {
1044 type Output = Self;
1045 #[doc = "Shift each element right by the corresponding element in another vector.\n\nFor unsigned integers, zeros are shifted in on the left. For signed integers, the sign bit is replicated.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform.\n\n# Performance\nThis per-lane shift is slower than shifting the entire vector by a scalar. It is not vectorized at all on WebAssembly, SSE4.2, and for `u8` and `i8` elements on AVX2. Prefer shifting by a single scalar value instead of by a vector whenever possible."]
1046 #[inline(always)]
1047 fn shr(self, rhs: Self) -> Self::Output {
1048 self.simd.shrv_i16x8(self, rhs)
1049 }
1050}
1051impl<S: Simd> core::ops::ShrAssign for i16x8<S> {
1052 #[doc = "Shift each element right by the corresponding element in another vector.\n\nFor unsigned integers, zeros are shifted in on the left. For signed integers, the sign bit is replicated.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform.\n\n# Performance\nThis per-lane shift is slower than shifting the entire vector by a scalar. It is not vectorized at all on WebAssembly, SSE4.2, and for `u8` and `i8` elements on AVX2. Prefer shifting by a single scalar value instead of by a vector whenever possible."]
1053 #[inline(always)]
1054 fn shr_assign(&mut self, rhs: Self) {
1055 *self = self.simd.shrv_i16x8(*self, rhs);
1056 }
1057}
1058impl<S: Simd> core::ops::Add for u16x8<S> {
1059 type Output = Self;
1060 #[doc = "Add two vectors element-wise, wrapping on overflow."]
1061 #[inline(always)]
1062 fn add(self, rhs: Self) -> Self::Output {
1063 self.simd.add_u16x8(self, rhs)
1064 }
1065}
1066impl<S: Simd> core::ops::AddAssign for u16x8<S> {
1067 #[doc = "Add two vectors element-wise, wrapping on overflow."]
1068 #[inline(always)]
1069 fn add_assign(&mut self, rhs: Self) {
1070 *self = self.simd.add_u16x8(*self, rhs);
1071 }
1072}
1073impl<S: Simd> core::ops::Add<u16> for u16x8<S> {
1074 type Output = Self;
1075 #[inline(always)]
1076 fn add(self, rhs: u16) -> Self::Output {
1077 self.simd.add_u16x8(self, rhs.simd_into(self.simd))
1078 }
1079}
1080impl<S: Simd> core::ops::AddAssign<u16> for u16x8<S> {
1081 #[inline(always)]
1082 fn add_assign(&mut self, rhs: u16) {
1083 *self = self.simd.add_u16x8(*self, rhs.simd_into(self.simd));
1084 }
1085}
1086impl<S: Simd> core::ops::Add<u16x8<S>> for u16 {
1087 type Output = u16x8<S>;
1088 #[inline(always)]
1089 fn add(self, rhs: u16x8<S>) -> Self::Output {
1090 rhs.simd.add_u16x8(self.simd_into(rhs.simd), rhs)
1091 }
1092}
1093impl<S: Simd> core::ops::Sub for u16x8<S> {
1094 type Output = Self;
1095 #[doc = "Subtract two vectors element-wise, wrapping on overflow."]
1096 #[inline(always)]
1097 fn sub(self, rhs: Self) -> Self::Output {
1098 self.simd.sub_u16x8(self, rhs)
1099 }
1100}
1101impl<S: Simd> core::ops::SubAssign for u16x8<S> {
1102 #[doc = "Subtract two vectors element-wise, wrapping on overflow."]
1103 #[inline(always)]
1104 fn sub_assign(&mut self, rhs: Self) {
1105 *self = self.simd.sub_u16x8(*self, rhs);
1106 }
1107}
1108impl<S: Simd> core::ops::Sub<u16> for u16x8<S> {
1109 type Output = Self;
1110 #[inline(always)]
1111 fn sub(self, rhs: u16) -> Self::Output {
1112 self.simd.sub_u16x8(self, rhs.simd_into(self.simd))
1113 }
1114}
1115impl<S: Simd> core::ops::SubAssign<u16> for u16x8<S> {
1116 #[inline(always)]
1117 fn sub_assign(&mut self, rhs: u16) {
1118 *self = self.simd.sub_u16x8(*self, rhs.simd_into(self.simd));
1119 }
1120}
1121impl<S: Simd> core::ops::Sub<u16x8<S>> for u16 {
1122 type Output = u16x8<S>;
1123 #[inline(always)]
1124 fn sub(self, rhs: u16x8<S>) -> Self::Output {
1125 rhs.simd.sub_u16x8(self.simd_into(rhs.simd), rhs)
1126 }
1127}
1128impl<S: Simd> core::ops::Mul for u16x8<S> {
1129 type Output = Self;
1130 #[doc = "Multiply two vectors element-wise, wrapping on overflow."]
1131 #[inline(always)]
1132 fn mul(self, rhs: Self) -> Self::Output {
1133 self.simd.mul_u16x8(self, rhs)
1134 }
1135}
1136impl<S: Simd> core::ops::MulAssign for u16x8<S> {
1137 #[doc = "Multiply two vectors element-wise, wrapping on overflow."]
1138 #[inline(always)]
1139 fn mul_assign(&mut self, rhs: Self) {
1140 *self = self.simd.mul_u16x8(*self, rhs);
1141 }
1142}
1143impl<S: Simd> core::ops::Mul<u16> for u16x8<S> {
1144 type Output = Self;
1145 #[inline(always)]
1146 fn mul(self, rhs: u16) -> Self::Output {
1147 self.simd.mul_u16x8(self, rhs.simd_into(self.simd))
1148 }
1149}
1150impl<S: Simd> core::ops::MulAssign<u16> for u16x8<S> {
1151 #[inline(always)]
1152 fn mul_assign(&mut self, rhs: u16) {
1153 *self = self.simd.mul_u16x8(*self, rhs.simd_into(self.simd));
1154 }
1155}
1156impl<S: Simd> core::ops::Mul<u16x8<S>> for u16 {
1157 type Output = u16x8<S>;
1158 #[inline(always)]
1159 fn mul(self, rhs: u16x8<S>) -> Self::Output {
1160 rhs.simd.mul_u16x8(self.simd_into(rhs.simd), rhs)
1161 }
1162}
1163impl<S: Simd> core::ops::BitAnd for u16x8<S> {
1164 type Output = Self;
1165 #[doc = "Compute the bitwise AND of two vectors."]
1166 #[inline(always)]
1167 fn bitand(self, rhs: Self) -> Self::Output {
1168 self.simd.and_u16x8(self, rhs)
1169 }
1170}
1171impl<S: Simd> core::ops::BitAndAssign for u16x8<S> {
1172 #[doc = "Compute the bitwise AND of two vectors."]
1173 #[inline(always)]
1174 fn bitand_assign(&mut self, rhs: Self) {
1175 *self = self.simd.and_u16x8(*self, rhs);
1176 }
1177}
1178impl<S: Simd> core::ops::BitAnd<u16> for u16x8<S> {
1179 type Output = Self;
1180 #[inline(always)]
1181 fn bitand(self, rhs: u16) -> Self::Output {
1182 self.simd.and_u16x8(self, rhs.simd_into(self.simd))
1183 }
1184}
1185impl<S: Simd> core::ops::BitAndAssign<u16> for u16x8<S> {
1186 #[inline(always)]
1187 fn bitand_assign(&mut self, rhs: u16) {
1188 *self = self.simd.and_u16x8(*self, rhs.simd_into(self.simd));
1189 }
1190}
1191impl<S: Simd> core::ops::BitAnd<u16x8<S>> for u16 {
1192 type Output = u16x8<S>;
1193 #[inline(always)]
1194 fn bitand(self, rhs: u16x8<S>) -> Self::Output {
1195 rhs.simd.and_u16x8(self.simd_into(rhs.simd), rhs)
1196 }
1197}
1198impl<S: Simd> core::ops::BitOr for u16x8<S> {
1199 type Output = Self;
1200 #[doc = "Compute the bitwise OR of two vectors."]
1201 #[inline(always)]
1202 fn bitor(self, rhs: Self) -> Self::Output {
1203 self.simd.or_u16x8(self, rhs)
1204 }
1205}
1206impl<S: Simd> core::ops::BitOrAssign for u16x8<S> {
1207 #[doc = "Compute the bitwise OR of two vectors."]
1208 #[inline(always)]
1209 fn bitor_assign(&mut self, rhs: Self) {
1210 *self = self.simd.or_u16x8(*self, rhs);
1211 }
1212}
1213impl<S: Simd> core::ops::BitOr<u16> for u16x8<S> {
1214 type Output = Self;
1215 #[inline(always)]
1216 fn bitor(self, rhs: u16) -> Self::Output {
1217 self.simd.or_u16x8(self, rhs.simd_into(self.simd))
1218 }
1219}
1220impl<S: Simd> core::ops::BitOrAssign<u16> for u16x8<S> {
1221 #[inline(always)]
1222 fn bitor_assign(&mut self, rhs: u16) {
1223 *self = self.simd.or_u16x8(*self, rhs.simd_into(self.simd));
1224 }
1225}
1226impl<S: Simd> core::ops::BitOr<u16x8<S>> for u16 {
1227 type Output = u16x8<S>;
1228 #[inline(always)]
1229 fn bitor(self, rhs: u16x8<S>) -> Self::Output {
1230 rhs.simd.or_u16x8(self.simd_into(rhs.simd), rhs)
1231 }
1232}
1233impl<S: Simd> core::ops::BitXor for u16x8<S> {
1234 type Output = Self;
1235 #[doc = "Compute the bitwise XOR of two vectors."]
1236 #[inline(always)]
1237 fn bitxor(self, rhs: Self) -> Self::Output {
1238 self.simd.xor_u16x8(self, rhs)
1239 }
1240}
1241impl<S: Simd> core::ops::BitXorAssign for u16x8<S> {
1242 #[doc = "Compute the bitwise XOR of two vectors."]
1243 #[inline(always)]
1244 fn bitxor_assign(&mut self, rhs: Self) {
1245 *self = self.simd.xor_u16x8(*self, rhs);
1246 }
1247}
1248impl<S: Simd> core::ops::BitXor<u16> for u16x8<S> {
1249 type Output = Self;
1250 #[inline(always)]
1251 fn bitxor(self, rhs: u16) -> Self::Output {
1252 self.simd.xor_u16x8(self, rhs.simd_into(self.simd))
1253 }
1254}
1255impl<S: Simd> core::ops::BitXorAssign<u16> for u16x8<S> {
1256 #[inline(always)]
1257 fn bitxor_assign(&mut self, rhs: u16) {
1258 *self = self.simd.xor_u16x8(*self, rhs.simd_into(self.simd));
1259 }
1260}
1261impl<S: Simd> core::ops::BitXor<u16x8<S>> for u16 {
1262 type Output = u16x8<S>;
1263 #[inline(always)]
1264 fn bitxor(self, rhs: u16x8<S>) -> Self::Output {
1265 rhs.simd.xor_u16x8(self.simd_into(rhs.simd), rhs)
1266 }
1267}
1268impl<S: Simd> core::ops::Not for u16x8<S> {
1269 type Output = Self;
1270 #[doc = "Compute the bitwise NOT of the vector."]
1271 #[inline(always)]
1272 fn not(self) -> Self::Output {
1273 self.simd.not_u16x8(self)
1274 }
1275}
1276impl<S: Simd> core::ops::Shl<u32> for u16x8<S> {
1277 type Output = Self;
1278 #[doc = "Shift each element left by the given number of bits.\n\nBits shifted out of the left side are discarded, and zeros are shifted in on the right.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform."]
1279 #[inline(always)]
1280 fn shl(self, rhs: u32) -> Self::Output {
1281 self.simd.shl_u16x8(self, rhs)
1282 }
1283}
1284impl<S: Simd> core::ops::ShlAssign<u32> for u16x8<S> {
1285 #[inline(always)]
1286 fn shl_assign(&mut self, rhs: u32) {
1287 *self = self.simd.shl_u16x8(*self, rhs);
1288 }
1289}
1290impl<S: Simd> core::ops::Shl for u16x8<S> {
1291 type Output = Self;
1292 #[doc = "Shift each element left by the given number of bits.\n\nBits shifted out of the left side are discarded, and zeros are shifted in on the right.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform.\n\n# Performance\nThis per-lane shift is slower than shifting the entire vector by a scalar. It is not vectorized at all on WebAssembly, SSE4.2, and for `u8` and `i8` elements on AVX2. Prefer shifting by a single scalar value instead of by a vector whenever possible."]
1293 #[inline(always)]
1294 fn shl(self, rhs: Self) -> Self::Output {
1295 self.simd.shlv_u16x8(self, rhs)
1296 }
1297}
1298impl<S: Simd> core::ops::ShlAssign for u16x8<S> {
1299 #[doc = "Shift each element left by the given number of bits.\n\nBits shifted out of the left side are discarded, and zeros are shifted in on the right.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform.\n\n# Performance\nThis per-lane shift is slower than shifting the entire vector by a scalar. It is not vectorized at all on WebAssembly, SSE4.2, and for `u8` and `i8` elements on AVX2. Prefer shifting by a single scalar value instead of by a vector whenever possible."]
1300 #[inline(always)]
1301 fn shl_assign(&mut self, rhs: Self) {
1302 *self = self.simd.shlv_u16x8(*self, rhs);
1303 }
1304}
1305impl<S: Simd> core::ops::Shr<u32> for u16x8<S> {
1306 type Output = Self;
1307 #[doc = "Shift each element right by the given number of bits.\n\nFor unsigned integers, zeros are shifted in on the left. For signed integers, the sign bit is replicated.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform."]
1308 #[inline(always)]
1309 fn shr(self, rhs: u32) -> Self::Output {
1310 self.simd.shr_u16x8(self, rhs)
1311 }
1312}
1313impl<S: Simd> core::ops::ShrAssign<u32> for u16x8<S> {
1314 #[inline(always)]
1315 fn shr_assign(&mut self, rhs: u32) {
1316 *self = self.simd.shr_u16x8(*self, rhs);
1317 }
1318}
1319impl<S: Simd> core::ops::Shr for u16x8<S> {
1320 type Output = Self;
1321 #[doc = "Shift each element right by the corresponding element in another vector.\n\nFor unsigned integers, zeros are shifted in on the left. For signed integers, the sign bit is replicated.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform.\n\n# Performance\nThis per-lane shift is slower than shifting the entire vector by a scalar. It is not vectorized at all on WebAssembly, SSE4.2, and for `u8` and `i8` elements on AVX2. Prefer shifting by a single scalar value instead of by a vector whenever possible."]
1322 #[inline(always)]
1323 fn shr(self, rhs: Self) -> Self::Output {
1324 self.simd.shrv_u16x8(self, rhs)
1325 }
1326}
1327impl<S: Simd> core::ops::ShrAssign for u16x8<S> {
1328 #[doc = "Shift each element right by the corresponding element in another vector.\n\nFor unsigned integers, zeros are shifted in on the left. For signed integers, the sign bit is replicated.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform.\n\n# Performance\nThis per-lane shift is slower than shifting the entire vector by a scalar. It is not vectorized at all on WebAssembly, SSE4.2, and for `u8` and `i8` elements on AVX2. Prefer shifting by a single scalar value instead of by a vector whenever possible."]
1329 #[inline(always)]
1330 fn shr_assign(&mut self, rhs: Self) {
1331 *self = self.simd.shrv_u16x8(*self, rhs);
1332 }
1333}
1334impl<S: Simd> core::ops::BitAnd for mask16x8<S> {
1335 type Output = Self;
1336 #[doc = "Compute the logical AND of two masks."]
1337 #[inline(always)]
1338 fn bitand(self, rhs: Self) -> Self::Output {
1339 self.simd.and_mask16x8(self, rhs)
1340 }
1341}
1342impl<S: Simd> core::ops::BitAndAssign for mask16x8<S> {
1343 #[doc = "Compute the logical AND of two masks."]
1344 #[inline(always)]
1345 fn bitand_assign(&mut self, rhs: Self) {
1346 *self = self.simd.and_mask16x8(*self, rhs);
1347 }
1348}
1349impl<S: Simd> core::ops::BitOr for mask16x8<S> {
1350 type Output = Self;
1351 #[doc = "Compute the logical OR of two masks."]
1352 #[inline(always)]
1353 fn bitor(self, rhs: Self) -> Self::Output {
1354 self.simd.or_mask16x8(self, rhs)
1355 }
1356}
1357impl<S: Simd> core::ops::BitOrAssign for mask16x8<S> {
1358 #[doc = "Compute the logical OR of two masks."]
1359 #[inline(always)]
1360 fn bitor_assign(&mut self, rhs: Self) {
1361 *self = self.simd.or_mask16x8(*self, rhs);
1362 }
1363}
1364impl<S: Simd> core::ops::BitXor for mask16x8<S> {
1365 type Output = Self;
1366 #[doc = "Compute the logical XOR of two masks."]
1367 #[inline(always)]
1368 fn bitxor(self, rhs: Self) -> Self::Output {
1369 self.simd.xor_mask16x8(self, rhs)
1370 }
1371}
1372impl<S: Simd> core::ops::BitXorAssign for mask16x8<S> {
1373 #[doc = "Compute the logical XOR of two masks."]
1374 #[inline(always)]
1375 fn bitxor_assign(&mut self, rhs: Self) {
1376 *self = self.simd.xor_mask16x8(*self, rhs);
1377 }
1378}
1379impl<S: Simd> core::ops::Not for mask16x8<S> {
1380 type Output = Self;
1381 #[doc = "Compute the logical NOT of the mask."]
1382 #[inline(always)]
1383 fn not(self) -> Self::Output {
1384 self.simd.not_mask16x8(self)
1385 }
1386}
1387impl<S: Simd> core::ops::Neg for i32x4<S> {
1388 type Output = Self;
1389 #[doc = "Negate each element of the vector, wrapping on overflow."]
1390 #[inline(always)]
1391 fn neg(self) -> Self::Output {
1392 self.simd.neg_i32x4(self)
1393 }
1394}
1395impl<S: Simd> core::ops::Add for i32x4<S> {
1396 type Output = Self;
1397 #[doc = "Add two vectors element-wise, wrapping on overflow."]
1398 #[inline(always)]
1399 fn add(self, rhs: Self) -> Self::Output {
1400 self.simd.add_i32x4(self, rhs)
1401 }
1402}
1403impl<S: Simd> core::ops::AddAssign for i32x4<S> {
1404 #[doc = "Add two vectors element-wise, wrapping on overflow."]
1405 #[inline(always)]
1406 fn add_assign(&mut self, rhs: Self) {
1407 *self = self.simd.add_i32x4(*self, rhs);
1408 }
1409}
1410impl<S: Simd> core::ops::Add<i32> for i32x4<S> {
1411 type Output = Self;
1412 #[inline(always)]
1413 fn add(self, rhs: i32) -> Self::Output {
1414 self.simd.add_i32x4(self, rhs.simd_into(self.simd))
1415 }
1416}
1417impl<S: Simd> core::ops::AddAssign<i32> for i32x4<S> {
1418 #[inline(always)]
1419 fn add_assign(&mut self, rhs: i32) {
1420 *self = self.simd.add_i32x4(*self, rhs.simd_into(self.simd));
1421 }
1422}
1423impl<S: Simd> core::ops::Add<i32x4<S>> for i32 {
1424 type Output = i32x4<S>;
1425 #[inline(always)]
1426 fn add(self, rhs: i32x4<S>) -> Self::Output {
1427 rhs.simd.add_i32x4(self.simd_into(rhs.simd), rhs)
1428 }
1429}
1430impl<S: Simd> core::ops::Sub for i32x4<S> {
1431 type Output = Self;
1432 #[doc = "Subtract two vectors element-wise, wrapping on overflow."]
1433 #[inline(always)]
1434 fn sub(self, rhs: Self) -> Self::Output {
1435 self.simd.sub_i32x4(self, rhs)
1436 }
1437}
1438impl<S: Simd> core::ops::SubAssign for i32x4<S> {
1439 #[doc = "Subtract two vectors element-wise, wrapping on overflow."]
1440 #[inline(always)]
1441 fn sub_assign(&mut self, rhs: Self) {
1442 *self = self.simd.sub_i32x4(*self, rhs);
1443 }
1444}
1445impl<S: Simd> core::ops::Sub<i32> for i32x4<S> {
1446 type Output = Self;
1447 #[inline(always)]
1448 fn sub(self, rhs: i32) -> Self::Output {
1449 self.simd.sub_i32x4(self, rhs.simd_into(self.simd))
1450 }
1451}
1452impl<S: Simd> core::ops::SubAssign<i32> for i32x4<S> {
1453 #[inline(always)]
1454 fn sub_assign(&mut self, rhs: i32) {
1455 *self = self.simd.sub_i32x4(*self, rhs.simd_into(self.simd));
1456 }
1457}
1458impl<S: Simd> core::ops::Sub<i32x4<S>> for i32 {
1459 type Output = i32x4<S>;
1460 #[inline(always)]
1461 fn sub(self, rhs: i32x4<S>) -> Self::Output {
1462 rhs.simd.sub_i32x4(self.simd_into(rhs.simd), rhs)
1463 }
1464}
1465impl<S: Simd> core::ops::Mul for i32x4<S> {
1466 type Output = Self;
1467 #[doc = "Multiply two vectors element-wise, wrapping on overflow."]
1468 #[inline(always)]
1469 fn mul(self, rhs: Self) -> Self::Output {
1470 self.simd.mul_i32x4(self, rhs)
1471 }
1472}
1473impl<S: Simd> core::ops::MulAssign for i32x4<S> {
1474 #[doc = "Multiply two vectors element-wise, wrapping on overflow."]
1475 #[inline(always)]
1476 fn mul_assign(&mut self, rhs: Self) {
1477 *self = self.simd.mul_i32x4(*self, rhs);
1478 }
1479}
1480impl<S: Simd> core::ops::Mul<i32> for i32x4<S> {
1481 type Output = Self;
1482 #[inline(always)]
1483 fn mul(self, rhs: i32) -> Self::Output {
1484 self.simd.mul_i32x4(self, rhs.simd_into(self.simd))
1485 }
1486}
1487impl<S: Simd> core::ops::MulAssign<i32> for i32x4<S> {
1488 #[inline(always)]
1489 fn mul_assign(&mut self, rhs: i32) {
1490 *self = self.simd.mul_i32x4(*self, rhs.simd_into(self.simd));
1491 }
1492}
1493impl<S: Simd> core::ops::Mul<i32x4<S>> for i32 {
1494 type Output = i32x4<S>;
1495 #[inline(always)]
1496 fn mul(self, rhs: i32x4<S>) -> Self::Output {
1497 rhs.simd.mul_i32x4(self.simd_into(rhs.simd), rhs)
1498 }
1499}
1500impl<S: Simd> core::ops::BitAnd for i32x4<S> {
1501 type Output = Self;
1502 #[doc = "Compute the bitwise AND of two vectors."]
1503 #[inline(always)]
1504 fn bitand(self, rhs: Self) -> Self::Output {
1505 self.simd.and_i32x4(self, rhs)
1506 }
1507}
1508impl<S: Simd> core::ops::BitAndAssign for i32x4<S> {
1509 #[doc = "Compute the bitwise AND of two vectors."]
1510 #[inline(always)]
1511 fn bitand_assign(&mut self, rhs: Self) {
1512 *self = self.simd.and_i32x4(*self, rhs);
1513 }
1514}
1515impl<S: Simd> core::ops::BitAnd<i32> for i32x4<S> {
1516 type Output = Self;
1517 #[inline(always)]
1518 fn bitand(self, rhs: i32) -> Self::Output {
1519 self.simd.and_i32x4(self, rhs.simd_into(self.simd))
1520 }
1521}
1522impl<S: Simd> core::ops::BitAndAssign<i32> for i32x4<S> {
1523 #[inline(always)]
1524 fn bitand_assign(&mut self, rhs: i32) {
1525 *self = self.simd.and_i32x4(*self, rhs.simd_into(self.simd));
1526 }
1527}
1528impl<S: Simd> core::ops::BitAnd<i32x4<S>> for i32 {
1529 type Output = i32x4<S>;
1530 #[inline(always)]
1531 fn bitand(self, rhs: i32x4<S>) -> Self::Output {
1532 rhs.simd.and_i32x4(self.simd_into(rhs.simd), rhs)
1533 }
1534}
1535impl<S: Simd> core::ops::BitOr for i32x4<S> {
1536 type Output = Self;
1537 #[doc = "Compute the bitwise OR of two vectors."]
1538 #[inline(always)]
1539 fn bitor(self, rhs: Self) -> Self::Output {
1540 self.simd.or_i32x4(self, rhs)
1541 }
1542}
1543impl<S: Simd> core::ops::BitOrAssign for i32x4<S> {
1544 #[doc = "Compute the bitwise OR of two vectors."]
1545 #[inline(always)]
1546 fn bitor_assign(&mut self, rhs: Self) {
1547 *self = self.simd.or_i32x4(*self, rhs);
1548 }
1549}
1550impl<S: Simd> core::ops::BitOr<i32> for i32x4<S> {
1551 type Output = Self;
1552 #[inline(always)]
1553 fn bitor(self, rhs: i32) -> Self::Output {
1554 self.simd.or_i32x4(self, rhs.simd_into(self.simd))
1555 }
1556}
1557impl<S: Simd> core::ops::BitOrAssign<i32> for i32x4<S> {
1558 #[inline(always)]
1559 fn bitor_assign(&mut self, rhs: i32) {
1560 *self = self.simd.or_i32x4(*self, rhs.simd_into(self.simd));
1561 }
1562}
1563impl<S: Simd> core::ops::BitOr<i32x4<S>> for i32 {
1564 type Output = i32x4<S>;
1565 #[inline(always)]
1566 fn bitor(self, rhs: i32x4<S>) -> Self::Output {
1567 rhs.simd.or_i32x4(self.simd_into(rhs.simd), rhs)
1568 }
1569}
1570impl<S: Simd> core::ops::BitXor for i32x4<S> {
1571 type Output = Self;
1572 #[doc = "Compute the bitwise XOR of two vectors."]
1573 #[inline(always)]
1574 fn bitxor(self, rhs: Self) -> Self::Output {
1575 self.simd.xor_i32x4(self, rhs)
1576 }
1577}
1578impl<S: Simd> core::ops::BitXorAssign for i32x4<S> {
1579 #[doc = "Compute the bitwise XOR of two vectors."]
1580 #[inline(always)]
1581 fn bitxor_assign(&mut self, rhs: Self) {
1582 *self = self.simd.xor_i32x4(*self, rhs);
1583 }
1584}
1585impl<S: Simd> core::ops::BitXor<i32> for i32x4<S> {
1586 type Output = Self;
1587 #[inline(always)]
1588 fn bitxor(self, rhs: i32) -> Self::Output {
1589 self.simd.xor_i32x4(self, rhs.simd_into(self.simd))
1590 }
1591}
1592impl<S: Simd> core::ops::BitXorAssign<i32> for i32x4<S> {
1593 #[inline(always)]
1594 fn bitxor_assign(&mut self, rhs: i32) {
1595 *self = self.simd.xor_i32x4(*self, rhs.simd_into(self.simd));
1596 }
1597}
1598impl<S: Simd> core::ops::BitXor<i32x4<S>> for i32 {
1599 type Output = i32x4<S>;
1600 #[inline(always)]
1601 fn bitxor(self, rhs: i32x4<S>) -> Self::Output {
1602 rhs.simd.xor_i32x4(self.simd_into(rhs.simd), rhs)
1603 }
1604}
1605impl<S: Simd> core::ops::Not for i32x4<S> {
1606 type Output = Self;
1607 #[doc = "Compute the bitwise NOT of the vector."]
1608 #[inline(always)]
1609 fn not(self) -> Self::Output {
1610 self.simd.not_i32x4(self)
1611 }
1612}
1613impl<S: Simd> core::ops::Shl<u32> for i32x4<S> {
1614 type Output = Self;
1615 #[doc = "Shift each element left by the given number of bits.\n\nBits shifted out of the left side are discarded, and zeros are shifted in on the right.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform."]
1616 #[inline(always)]
1617 fn shl(self, rhs: u32) -> Self::Output {
1618 self.simd.shl_i32x4(self, rhs)
1619 }
1620}
1621impl<S: Simd> core::ops::ShlAssign<u32> for i32x4<S> {
1622 #[inline(always)]
1623 fn shl_assign(&mut self, rhs: u32) {
1624 *self = self.simd.shl_i32x4(*self, rhs);
1625 }
1626}
1627impl<S: Simd> core::ops::Shl for i32x4<S> {
1628 type Output = Self;
1629 #[doc = "Shift each element left by the given number of bits.\n\nBits shifted out of the left side are discarded, and zeros are shifted in on the right.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform.\n\n# Performance\nThis per-lane shift is slower than shifting the entire vector by a scalar. It is not vectorized at all on WebAssembly, SSE4.2, and for `u8` and `i8` elements on AVX2. Prefer shifting by a single scalar value instead of by a vector whenever possible."]
1630 #[inline(always)]
1631 fn shl(self, rhs: Self) -> Self::Output {
1632 self.simd.shlv_i32x4(self, rhs)
1633 }
1634}
1635impl<S: Simd> core::ops::ShlAssign for i32x4<S> {
1636 #[doc = "Shift each element left by the given number of bits.\n\nBits shifted out of the left side are discarded, and zeros are shifted in on the right.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform.\n\n# Performance\nThis per-lane shift is slower than shifting the entire vector by a scalar. It is not vectorized at all on WebAssembly, SSE4.2, and for `u8` and `i8` elements on AVX2. Prefer shifting by a single scalar value instead of by a vector whenever possible."]
1637 #[inline(always)]
1638 fn shl_assign(&mut self, rhs: Self) {
1639 *self = self.simd.shlv_i32x4(*self, rhs);
1640 }
1641}
1642impl<S: Simd> core::ops::Shr<u32> for i32x4<S> {
1643 type Output = Self;
1644 #[doc = "Shift each element right by the given number of bits.\n\nFor unsigned integers, zeros are shifted in on the left. For signed integers, the sign bit is replicated.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform."]
1645 #[inline(always)]
1646 fn shr(self, rhs: u32) -> Self::Output {
1647 self.simd.shr_i32x4(self, rhs)
1648 }
1649}
1650impl<S: Simd> core::ops::ShrAssign<u32> for i32x4<S> {
1651 #[inline(always)]
1652 fn shr_assign(&mut self, rhs: u32) {
1653 *self = self.simd.shr_i32x4(*self, rhs);
1654 }
1655}
1656impl<S: Simd> core::ops::Shr for i32x4<S> {
1657 type Output = Self;
1658 #[doc = "Shift each element right by the corresponding element in another vector.\n\nFor unsigned integers, zeros are shifted in on the left. For signed integers, the sign bit is replicated.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform.\n\n# Performance\nThis per-lane shift is slower than shifting the entire vector by a scalar. It is not vectorized at all on WebAssembly, SSE4.2, and for `u8` and `i8` elements on AVX2. Prefer shifting by a single scalar value instead of by a vector whenever possible."]
1659 #[inline(always)]
1660 fn shr(self, rhs: Self) -> Self::Output {
1661 self.simd.shrv_i32x4(self, rhs)
1662 }
1663}
1664impl<S: Simd> core::ops::ShrAssign for i32x4<S> {
1665 #[doc = "Shift each element right by the corresponding element in another vector.\n\nFor unsigned integers, zeros are shifted in on the left. For signed integers, the sign bit is replicated.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform.\n\n# Performance\nThis per-lane shift is slower than shifting the entire vector by a scalar. It is not vectorized at all on WebAssembly, SSE4.2, and for `u8` and `i8` elements on AVX2. Prefer shifting by a single scalar value instead of by a vector whenever possible."]
1666 #[inline(always)]
1667 fn shr_assign(&mut self, rhs: Self) {
1668 *self = self.simd.shrv_i32x4(*self, rhs);
1669 }
1670}
1671impl<S: Simd> core::ops::Add for u32x4<S> {
1672 type Output = Self;
1673 #[doc = "Add two vectors element-wise, wrapping on overflow."]
1674 #[inline(always)]
1675 fn add(self, rhs: Self) -> Self::Output {
1676 self.simd.add_u32x4(self, rhs)
1677 }
1678}
1679impl<S: Simd> core::ops::AddAssign for u32x4<S> {
1680 #[doc = "Add two vectors element-wise, wrapping on overflow."]
1681 #[inline(always)]
1682 fn add_assign(&mut self, rhs: Self) {
1683 *self = self.simd.add_u32x4(*self, rhs);
1684 }
1685}
1686impl<S: Simd> core::ops::Add<u32> for u32x4<S> {
1687 type Output = Self;
1688 #[inline(always)]
1689 fn add(self, rhs: u32) -> Self::Output {
1690 self.simd.add_u32x4(self, rhs.simd_into(self.simd))
1691 }
1692}
1693impl<S: Simd> core::ops::AddAssign<u32> for u32x4<S> {
1694 #[inline(always)]
1695 fn add_assign(&mut self, rhs: u32) {
1696 *self = self.simd.add_u32x4(*self, rhs.simd_into(self.simd));
1697 }
1698}
1699impl<S: Simd> core::ops::Add<u32x4<S>> for u32 {
1700 type Output = u32x4<S>;
1701 #[inline(always)]
1702 fn add(self, rhs: u32x4<S>) -> Self::Output {
1703 rhs.simd.add_u32x4(self.simd_into(rhs.simd), rhs)
1704 }
1705}
1706impl<S: Simd> core::ops::Sub for u32x4<S> {
1707 type Output = Self;
1708 #[doc = "Subtract two vectors element-wise, wrapping on overflow."]
1709 #[inline(always)]
1710 fn sub(self, rhs: Self) -> Self::Output {
1711 self.simd.sub_u32x4(self, rhs)
1712 }
1713}
1714impl<S: Simd> core::ops::SubAssign for u32x4<S> {
1715 #[doc = "Subtract two vectors element-wise, wrapping on overflow."]
1716 #[inline(always)]
1717 fn sub_assign(&mut self, rhs: Self) {
1718 *self = self.simd.sub_u32x4(*self, rhs);
1719 }
1720}
1721impl<S: Simd> core::ops::Sub<u32> for u32x4<S> {
1722 type Output = Self;
1723 #[inline(always)]
1724 fn sub(self, rhs: u32) -> Self::Output {
1725 self.simd.sub_u32x4(self, rhs.simd_into(self.simd))
1726 }
1727}
1728impl<S: Simd> core::ops::SubAssign<u32> for u32x4<S> {
1729 #[inline(always)]
1730 fn sub_assign(&mut self, rhs: u32) {
1731 *self = self.simd.sub_u32x4(*self, rhs.simd_into(self.simd));
1732 }
1733}
1734impl<S: Simd> core::ops::Sub<u32x4<S>> for u32 {
1735 type Output = u32x4<S>;
1736 #[inline(always)]
1737 fn sub(self, rhs: u32x4<S>) -> Self::Output {
1738 rhs.simd.sub_u32x4(self.simd_into(rhs.simd), rhs)
1739 }
1740}
1741impl<S: Simd> core::ops::Mul for u32x4<S> {
1742 type Output = Self;
1743 #[doc = "Multiply two vectors element-wise, wrapping on overflow."]
1744 #[inline(always)]
1745 fn mul(self, rhs: Self) -> Self::Output {
1746 self.simd.mul_u32x4(self, rhs)
1747 }
1748}
1749impl<S: Simd> core::ops::MulAssign for u32x4<S> {
1750 #[doc = "Multiply two vectors element-wise, wrapping on overflow."]
1751 #[inline(always)]
1752 fn mul_assign(&mut self, rhs: Self) {
1753 *self = self.simd.mul_u32x4(*self, rhs);
1754 }
1755}
1756impl<S: Simd> core::ops::Mul<u32> for u32x4<S> {
1757 type Output = Self;
1758 #[inline(always)]
1759 fn mul(self, rhs: u32) -> Self::Output {
1760 self.simd.mul_u32x4(self, rhs.simd_into(self.simd))
1761 }
1762}
1763impl<S: Simd> core::ops::MulAssign<u32> for u32x4<S> {
1764 #[inline(always)]
1765 fn mul_assign(&mut self, rhs: u32) {
1766 *self = self.simd.mul_u32x4(*self, rhs.simd_into(self.simd));
1767 }
1768}
1769impl<S: Simd> core::ops::Mul<u32x4<S>> for u32 {
1770 type Output = u32x4<S>;
1771 #[inline(always)]
1772 fn mul(self, rhs: u32x4<S>) -> Self::Output {
1773 rhs.simd.mul_u32x4(self.simd_into(rhs.simd), rhs)
1774 }
1775}
1776impl<S: Simd> core::ops::BitAnd for u32x4<S> {
1777 type Output = Self;
1778 #[doc = "Compute the bitwise AND of two vectors."]
1779 #[inline(always)]
1780 fn bitand(self, rhs: Self) -> Self::Output {
1781 self.simd.and_u32x4(self, rhs)
1782 }
1783}
1784impl<S: Simd> core::ops::BitAndAssign for u32x4<S> {
1785 #[doc = "Compute the bitwise AND of two vectors."]
1786 #[inline(always)]
1787 fn bitand_assign(&mut self, rhs: Self) {
1788 *self = self.simd.and_u32x4(*self, rhs);
1789 }
1790}
1791impl<S: Simd> core::ops::BitAnd<u32> for u32x4<S> {
1792 type Output = Self;
1793 #[inline(always)]
1794 fn bitand(self, rhs: u32) -> Self::Output {
1795 self.simd.and_u32x4(self, rhs.simd_into(self.simd))
1796 }
1797}
1798impl<S: Simd> core::ops::BitAndAssign<u32> for u32x4<S> {
1799 #[inline(always)]
1800 fn bitand_assign(&mut self, rhs: u32) {
1801 *self = self.simd.and_u32x4(*self, rhs.simd_into(self.simd));
1802 }
1803}
1804impl<S: Simd> core::ops::BitAnd<u32x4<S>> for u32 {
1805 type Output = u32x4<S>;
1806 #[inline(always)]
1807 fn bitand(self, rhs: u32x4<S>) -> Self::Output {
1808 rhs.simd.and_u32x4(self.simd_into(rhs.simd), rhs)
1809 }
1810}
1811impl<S: Simd> core::ops::BitOr for u32x4<S> {
1812 type Output = Self;
1813 #[doc = "Compute the bitwise OR of two vectors."]
1814 #[inline(always)]
1815 fn bitor(self, rhs: Self) -> Self::Output {
1816 self.simd.or_u32x4(self, rhs)
1817 }
1818}
1819impl<S: Simd> core::ops::BitOrAssign for u32x4<S> {
1820 #[doc = "Compute the bitwise OR of two vectors."]
1821 #[inline(always)]
1822 fn bitor_assign(&mut self, rhs: Self) {
1823 *self = self.simd.or_u32x4(*self, rhs);
1824 }
1825}
1826impl<S: Simd> core::ops::BitOr<u32> for u32x4<S> {
1827 type Output = Self;
1828 #[inline(always)]
1829 fn bitor(self, rhs: u32) -> Self::Output {
1830 self.simd.or_u32x4(self, rhs.simd_into(self.simd))
1831 }
1832}
1833impl<S: Simd> core::ops::BitOrAssign<u32> for u32x4<S> {
1834 #[inline(always)]
1835 fn bitor_assign(&mut self, rhs: u32) {
1836 *self = self.simd.or_u32x4(*self, rhs.simd_into(self.simd));
1837 }
1838}
1839impl<S: Simd> core::ops::BitOr<u32x4<S>> for u32 {
1840 type Output = u32x4<S>;
1841 #[inline(always)]
1842 fn bitor(self, rhs: u32x4<S>) -> Self::Output {
1843 rhs.simd.or_u32x4(self.simd_into(rhs.simd), rhs)
1844 }
1845}
1846impl<S: Simd> core::ops::BitXor for u32x4<S> {
1847 type Output = Self;
1848 #[doc = "Compute the bitwise XOR of two vectors."]
1849 #[inline(always)]
1850 fn bitxor(self, rhs: Self) -> Self::Output {
1851 self.simd.xor_u32x4(self, rhs)
1852 }
1853}
1854impl<S: Simd> core::ops::BitXorAssign for u32x4<S> {
1855 #[doc = "Compute the bitwise XOR of two vectors."]
1856 #[inline(always)]
1857 fn bitxor_assign(&mut self, rhs: Self) {
1858 *self = self.simd.xor_u32x4(*self, rhs);
1859 }
1860}
1861impl<S: Simd> core::ops::BitXor<u32> for u32x4<S> {
1862 type Output = Self;
1863 #[inline(always)]
1864 fn bitxor(self, rhs: u32) -> Self::Output {
1865 self.simd.xor_u32x4(self, rhs.simd_into(self.simd))
1866 }
1867}
1868impl<S: Simd> core::ops::BitXorAssign<u32> for u32x4<S> {
1869 #[inline(always)]
1870 fn bitxor_assign(&mut self, rhs: u32) {
1871 *self = self.simd.xor_u32x4(*self, rhs.simd_into(self.simd));
1872 }
1873}
1874impl<S: Simd> core::ops::BitXor<u32x4<S>> for u32 {
1875 type Output = u32x4<S>;
1876 #[inline(always)]
1877 fn bitxor(self, rhs: u32x4<S>) -> Self::Output {
1878 rhs.simd.xor_u32x4(self.simd_into(rhs.simd), rhs)
1879 }
1880}
1881impl<S: Simd> core::ops::Not for u32x4<S> {
1882 type Output = Self;
1883 #[doc = "Compute the bitwise NOT of the vector."]
1884 #[inline(always)]
1885 fn not(self) -> Self::Output {
1886 self.simd.not_u32x4(self)
1887 }
1888}
1889impl<S: Simd> core::ops::Shl<u32> for u32x4<S> {
1890 type Output = Self;
1891 #[doc = "Shift each element left by the given number of bits.\n\nBits shifted out of the left side are discarded, and zeros are shifted in on the right.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform."]
1892 #[inline(always)]
1893 fn shl(self, rhs: u32) -> Self::Output {
1894 self.simd.shl_u32x4(self, rhs)
1895 }
1896}
1897impl<S: Simd> core::ops::ShlAssign<u32> for u32x4<S> {
1898 #[inline(always)]
1899 fn shl_assign(&mut self, rhs: u32) {
1900 *self = self.simd.shl_u32x4(*self, rhs);
1901 }
1902}
1903impl<S: Simd> core::ops::Shl for u32x4<S> {
1904 type Output = Self;
1905 #[doc = "Shift each element left by the given number of bits.\n\nBits shifted out of the left side are discarded, and zeros are shifted in on the right.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform.\n\n# Performance\nThis per-lane shift is slower than shifting the entire vector by a scalar. It is not vectorized at all on WebAssembly, SSE4.2, and for `u8` and `i8` elements on AVX2. Prefer shifting by a single scalar value instead of by a vector whenever possible."]
1906 #[inline(always)]
1907 fn shl(self, rhs: Self) -> Self::Output {
1908 self.simd.shlv_u32x4(self, rhs)
1909 }
1910}
1911impl<S: Simd> core::ops::ShlAssign for u32x4<S> {
1912 #[doc = "Shift each element left by the given number of bits.\n\nBits shifted out of the left side are discarded, and zeros are shifted in on the right.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform.\n\n# Performance\nThis per-lane shift is slower than shifting the entire vector by a scalar. It is not vectorized at all on WebAssembly, SSE4.2, and for `u8` and `i8` elements on AVX2. Prefer shifting by a single scalar value instead of by a vector whenever possible."]
1913 #[inline(always)]
1914 fn shl_assign(&mut self, rhs: Self) {
1915 *self = self.simd.shlv_u32x4(*self, rhs);
1916 }
1917}
1918impl<S: Simd> core::ops::Shr<u32> for u32x4<S> {
1919 type Output = Self;
1920 #[doc = "Shift each element right by the given number of bits.\n\nFor unsigned integers, zeros are shifted in on the left. For signed integers, the sign bit is replicated.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform."]
1921 #[inline(always)]
1922 fn shr(self, rhs: u32) -> Self::Output {
1923 self.simd.shr_u32x4(self, rhs)
1924 }
1925}
1926impl<S: Simd> core::ops::ShrAssign<u32> for u32x4<S> {
1927 #[inline(always)]
1928 fn shr_assign(&mut self, rhs: u32) {
1929 *self = self.simd.shr_u32x4(*self, rhs);
1930 }
1931}
1932impl<S: Simd> core::ops::Shr for u32x4<S> {
1933 type Output = Self;
1934 #[doc = "Shift each element right by the corresponding element in another vector.\n\nFor unsigned integers, zeros are shifted in on the left. For signed integers, the sign bit is replicated.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform.\n\n# Performance\nThis per-lane shift is slower than shifting the entire vector by a scalar. It is not vectorized at all on WebAssembly, SSE4.2, and for `u8` and `i8` elements on AVX2. Prefer shifting by a single scalar value instead of by a vector whenever possible."]
1935 #[inline(always)]
1936 fn shr(self, rhs: Self) -> Self::Output {
1937 self.simd.shrv_u32x4(self, rhs)
1938 }
1939}
1940impl<S: Simd> core::ops::ShrAssign for u32x4<S> {
1941 #[doc = "Shift each element right by the corresponding element in another vector.\n\nFor unsigned integers, zeros are shifted in on the left. For signed integers, the sign bit is replicated.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform.\n\n# Performance\nThis per-lane shift is slower than shifting the entire vector by a scalar. It is not vectorized at all on WebAssembly, SSE4.2, and for `u8` and `i8` elements on AVX2. Prefer shifting by a single scalar value instead of by a vector whenever possible."]
1942 #[inline(always)]
1943 fn shr_assign(&mut self, rhs: Self) {
1944 *self = self.simd.shrv_u32x4(*self, rhs);
1945 }
1946}
1947impl<S: Simd> core::ops::BitAnd for mask32x4<S> {
1948 type Output = Self;
1949 #[doc = "Compute the logical AND of two masks."]
1950 #[inline(always)]
1951 fn bitand(self, rhs: Self) -> Self::Output {
1952 self.simd.and_mask32x4(self, rhs)
1953 }
1954}
1955impl<S: Simd> core::ops::BitAndAssign for mask32x4<S> {
1956 #[doc = "Compute the logical AND of two masks."]
1957 #[inline(always)]
1958 fn bitand_assign(&mut self, rhs: Self) {
1959 *self = self.simd.and_mask32x4(*self, rhs);
1960 }
1961}
1962impl<S: Simd> core::ops::BitOr for mask32x4<S> {
1963 type Output = Self;
1964 #[doc = "Compute the logical OR of two masks."]
1965 #[inline(always)]
1966 fn bitor(self, rhs: Self) -> Self::Output {
1967 self.simd.or_mask32x4(self, rhs)
1968 }
1969}
1970impl<S: Simd> core::ops::BitOrAssign for mask32x4<S> {
1971 #[doc = "Compute the logical OR of two masks."]
1972 #[inline(always)]
1973 fn bitor_assign(&mut self, rhs: Self) {
1974 *self = self.simd.or_mask32x4(*self, rhs);
1975 }
1976}
1977impl<S: Simd> core::ops::BitXor for mask32x4<S> {
1978 type Output = Self;
1979 #[doc = "Compute the logical XOR of two masks."]
1980 #[inline(always)]
1981 fn bitxor(self, rhs: Self) -> Self::Output {
1982 self.simd.xor_mask32x4(self, rhs)
1983 }
1984}
1985impl<S: Simd> core::ops::BitXorAssign for mask32x4<S> {
1986 #[doc = "Compute the logical XOR of two masks."]
1987 #[inline(always)]
1988 fn bitxor_assign(&mut self, rhs: Self) {
1989 *self = self.simd.xor_mask32x4(*self, rhs);
1990 }
1991}
1992impl<S: Simd> core::ops::Not for mask32x4<S> {
1993 type Output = Self;
1994 #[doc = "Compute the logical NOT of the mask."]
1995 #[inline(always)]
1996 fn not(self) -> Self::Output {
1997 self.simd.not_mask32x4(self)
1998 }
1999}
2000impl<S: Simd> core::ops::Neg for f64x2<S> {
2001 type Output = Self;
2002 #[doc = "Negate each element of the vector."]
2003 #[inline(always)]
2004 fn neg(self) -> Self::Output {
2005 self.simd.neg_f64x2(self)
2006 }
2007}
2008impl<S: Simd> core::ops::Add for f64x2<S> {
2009 type Output = Self;
2010 #[doc = "Add two vectors element-wise."]
2011 #[inline(always)]
2012 fn add(self, rhs: Self) -> Self::Output {
2013 self.simd.add_f64x2(self, rhs)
2014 }
2015}
2016impl<S: Simd> core::ops::AddAssign for f64x2<S> {
2017 #[doc = "Add two vectors element-wise."]
2018 #[inline(always)]
2019 fn add_assign(&mut self, rhs: Self) {
2020 *self = self.simd.add_f64x2(*self, rhs);
2021 }
2022}
2023impl<S: Simd> core::ops::Add<f64> for f64x2<S> {
2024 type Output = Self;
2025 #[inline(always)]
2026 fn add(self, rhs: f64) -> Self::Output {
2027 self.simd.add_f64x2(self, rhs.simd_into(self.simd))
2028 }
2029}
2030impl<S: Simd> core::ops::AddAssign<f64> for f64x2<S> {
2031 #[inline(always)]
2032 fn add_assign(&mut self, rhs: f64) {
2033 *self = self.simd.add_f64x2(*self, rhs.simd_into(self.simd));
2034 }
2035}
2036impl<S: Simd> core::ops::Add<f64x2<S>> for f64 {
2037 type Output = f64x2<S>;
2038 #[inline(always)]
2039 fn add(self, rhs: f64x2<S>) -> Self::Output {
2040 rhs.simd.add_f64x2(self.simd_into(rhs.simd), rhs)
2041 }
2042}
2043impl<S: Simd> core::ops::Sub for f64x2<S> {
2044 type Output = Self;
2045 #[doc = "Subtract two vectors element-wise."]
2046 #[inline(always)]
2047 fn sub(self, rhs: Self) -> Self::Output {
2048 self.simd.sub_f64x2(self, rhs)
2049 }
2050}
2051impl<S: Simd> core::ops::SubAssign for f64x2<S> {
2052 #[doc = "Subtract two vectors element-wise."]
2053 #[inline(always)]
2054 fn sub_assign(&mut self, rhs: Self) {
2055 *self = self.simd.sub_f64x2(*self, rhs);
2056 }
2057}
2058impl<S: Simd> core::ops::Sub<f64> for f64x2<S> {
2059 type Output = Self;
2060 #[inline(always)]
2061 fn sub(self, rhs: f64) -> Self::Output {
2062 self.simd.sub_f64x2(self, rhs.simd_into(self.simd))
2063 }
2064}
2065impl<S: Simd> core::ops::SubAssign<f64> for f64x2<S> {
2066 #[inline(always)]
2067 fn sub_assign(&mut self, rhs: f64) {
2068 *self = self.simd.sub_f64x2(*self, rhs.simd_into(self.simd));
2069 }
2070}
2071impl<S: Simd> core::ops::Sub<f64x2<S>> for f64 {
2072 type Output = f64x2<S>;
2073 #[inline(always)]
2074 fn sub(self, rhs: f64x2<S>) -> Self::Output {
2075 rhs.simd.sub_f64x2(self.simd_into(rhs.simd), rhs)
2076 }
2077}
2078impl<S: Simd> core::ops::Mul for f64x2<S> {
2079 type Output = Self;
2080 #[doc = "Multiply two vectors element-wise."]
2081 #[inline(always)]
2082 fn mul(self, rhs: Self) -> Self::Output {
2083 self.simd.mul_f64x2(self, rhs)
2084 }
2085}
2086impl<S: Simd> core::ops::MulAssign for f64x2<S> {
2087 #[doc = "Multiply two vectors element-wise."]
2088 #[inline(always)]
2089 fn mul_assign(&mut self, rhs: Self) {
2090 *self = self.simd.mul_f64x2(*self, rhs);
2091 }
2092}
2093impl<S: Simd> core::ops::Mul<f64> for f64x2<S> {
2094 type Output = Self;
2095 #[inline(always)]
2096 fn mul(self, rhs: f64) -> Self::Output {
2097 self.simd.mul_f64x2(self, rhs.simd_into(self.simd))
2098 }
2099}
2100impl<S: Simd> core::ops::MulAssign<f64> for f64x2<S> {
2101 #[inline(always)]
2102 fn mul_assign(&mut self, rhs: f64) {
2103 *self = self.simd.mul_f64x2(*self, rhs.simd_into(self.simd));
2104 }
2105}
2106impl<S: Simd> core::ops::Mul<f64x2<S>> for f64 {
2107 type Output = f64x2<S>;
2108 #[inline(always)]
2109 fn mul(self, rhs: f64x2<S>) -> Self::Output {
2110 rhs.simd.mul_f64x2(self.simd_into(rhs.simd), rhs)
2111 }
2112}
2113impl<S: Simd> core::ops::Div for f64x2<S> {
2114 type Output = Self;
2115 #[doc = "Divide two vectors element-wise."]
2116 #[inline(always)]
2117 fn div(self, rhs: Self) -> Self::Output {
2118 self.simd.div_f64x2(self, rhs)
2119 }
2120}
2121impl<S: Simd> core::ops::DivAssign for f64x2<S> {
2122 #[doc = "Divide two vectors element-wise."]
2123 #[inline(always)]
2124 fn div_assign(&mut self, rhs: Self) {
2125 *self = self.simd.div_f64x2(*self, rhs);
2126 }
2127}
2128impl<S: Simd> core::ops::Div<f64> for f64x2<S> {
2129 type Output = Self;
2130 #[inline(always)]
2131 fn div(self, rhs: f64) -> Self::Output {
2132 self.simd.div_f64x2(self, rhs.simd_into(self.simd))
2133 }
2134}
2135impl<S: Simd> core::ops::DivAssign<f64> for f64x2<S> {
2136 #[inline(always)]
2137 fn div_assign(&mut self, rhs: f64) {
2138 *self = self.simd.div_f64x2(*self, rhs.simd_into(self.simd));
2139 }
2140}
2141impl<S: Simd> core::ops::Div<f64x2<S>> for f64 {
2142 type Output = f64x2<S>;
2143 #[inline(always)]
2144 fn div(self, rhs: f64x2<S>) -> Self::Output {
2145 rhs.simd.div_f64x2(self.simd_into(rhs.simd), rhs)
2146 }
2147}
2148impl<S: Simd> core::ops::Neg for i64x2<S> {
2149 type Output = Self;
2150 #[doc = "Negate each element of the vector, wrapping on overflow."]
2151 #[inline(always)]
2152 fn neg(self) -> Self::Output {
2153 self.simd.neg_i64x2(self)
2154 }
2155}
2156impl<S: Simd> core::ops::Add for i64x2<S> {
2157 type Output = Self;
2158 #[doc = "Add two vectors element-wise, wrapping on overflow."]
2159 #[inline(always)]
2160 fn add(self, rhs: Self) -> Self::Output {
2161 self.simd.add_i64x2(self, rhs)
2162 }
2163}
2164impl<S: Simd> core::ops::AddAssign for i64x2<S> {
2165 #[doc = "Add two vectors element-wise, wrapping on overflow."]
2166 #[inline(always)]
2167 fn add_assign(&mut self, rhs: Self) {
2168 *self = self.simd.add_i64x2(*self, rhs);
2169 }
2170}
2171impl<S: Simd> core::ops::Add<i64> for i64x2<S> {
2172 type Output = Self;
2173 #[inline(always)]
2174 fn add(self, rhs: i64) -> Self::Output {
2175 self.simd.add_i64x2(self, rhs.simd_into(self.simd))
2176 }
2177}
2178impl<S: Simd> core::ops::AddAssign<i64> for i64x2<S> {
2179 #[inline(always)]
2180 fn add_assign(&mut self, rhs: i64) {
2181 *self = self.simd.add_i64x2(*self, rhs.simd_into(self.simd));
2182 }
2183}
2184impl<S: Simd> core::ops::Add<i64x2<S>> for i64 {
2185 type Output = i64x2<S>;
2186 #[inline(always)]
2187 fn add(self, rhs: i64x2<S>) -> Self::Output {
2188 rhs.simd.add_i64x2(self.simd_into(rhs.simd), rhs)
2189 }
2190}
2191impl<S: Simd> core::ops::Sub for i64x2<S> {
2192 type Output = Self;
2193 #[doc = "Subtract two vectors element-wise, wrapping on overflow."]
2194 #[inline(always)]
2195 fn sub(self, rhs: Self) -> Self::Output {
2196 self.simd.sub_i64x2(self, rhs)
2197 }
2198}
2199impl<S: Simd> core::ops::SubAssign for i64x2<S> {
2200 #[doc = "Subtract two vectors element-wise, wrapping on overflow."]
2201 #[inline(always)]
2202 fn sub_assign(&mut self, rhs: Self) {
2203 *self = self.simd.sub_i64x2(*self, rhs);
2204 }
2205}
2206impl<S: Simd> core::ops::Sub<i64> for i64x2<S> {
2207 type Output = Self;
2208 #[inline(always)]
2209 fn sub(self, rhs: i64) -> Self::Output {
2210 self.simd.sub_i64x2(self, rhs.simd_into(self.simd))
2211 }
2212}
2213impl<S: Simd> core::ops::SubAssign<i64> for i64x2<S> {
2214 #[inline(always)]
2215 fn sub_assign(&mut self, rhs: i64) {
2216 *self = self.simd.sub_i64x2(*self, rhs.simd_into(self.simd));
2217 }
2218}
2219impl<S: Simd> core::ops::Sub<i64x2<S>> for i64 {
2220 type Output = i64x2<S>;
2221 #[inline(always)]
2222 fn sub(self, rhs: i64x2<S>) -> Self::Output {
2223 rhs.simd.sub_i64x2(self.simd_into(rhs.simd), rhs)
2224 }
2225}
2226impl<S: Simd> core::ops::Mul for i64x2<S> {
2227 type Output = Self;
2228 #[doc = "Multiply two vectors element-wise, wrapping on overflow."]
2229 #[inline(always)]
2230 fn mul(self, rhs: Self) -> Self::Output {
2231 self.simd.mul_i64x2(self, rhs)
2232 }
2233}
2234impl<S: Simd> core::ops::MulAssign for i64x2<S> {
2235 #[doc = "Multiply two vectors element-wise, wrapping on overflow."]
2236 #[inline(always)]
2237 fn mul_assign(&mut self, rhs: Self) {
2238 *self = self.simd.mul_i64x2(*self, rhs);
2239 }
2240}
2241impl<S: Simd> core::ops::Mul<i64> for i64x2<S> {
2242 type Output = Self;
2243 #[inline(always)]
2244 fn mul(self, rhs: i64) -> Self::Output {
2245 self.simd.mul_i64x2(self, rhs.simd_into(self.simd))
2246 }
2247}
2248impl<S: Simd> core::ops::MulAssign<i64> for i64x2<S> {
2249 #[inline(always)]
2250 fn mul_assign(&mut self, rhs: i64) {
2251 *self = self.simd.mul_i64x2(*self, rhs.simd_into(self.simd));
2252 }
2253}
2254impl<S: Simd> core::ops::Mul<i64x2<S>> for i64 {
2255 type Output = i64x2<S>;
2256 #[inline(always)]
2257 fn mul(self, rhs: i64x2<S>) -> Self::Output {
2258 rhs.simd.mul_i64x2(self.simd_into(rhs.simd), rhs)
2259 }
2260}
2261impl<S: Simd> core::ops::BitAnd for i64x2<S> {
2262 type Output = Self;
2263 #[doc = "Compute the bitwise AND of two vectors."]
2264 #[inline(always)]
2265 fn bitand(self, rhs: Self) -> Self::Output {
2266 self.simd.and_i64x2(self, rhs)
2267 }
2268}
2269impl<S: Simd> core::ops::BitAndAssign for i64x2<S> {
2270 #[doc = "Compute the bitwise AND of two vectors."]
2271 #[inline(always)]
2272 fn bitand_assign(&mut self, rhs: Self) {
2273 *self = self.simd.and_i64x2(*self, rhs);
2274 }
2275}
2276impl<S: Simd> core::ops::BitAnd<i64> for i64x2<S> {
2277 type Output = Self;
2278 #[inline(always)]
2279 fn bitand(self, rhs: i64) -> Self::Output {
2280 self.simd.and_i64x2(self, rhs.simd_into(self.simd))
2281 }
2282}
2283impl<S: Simd> core::ops::BitAndAssign<i64> for i64x2<S> {
2284 #[inline(always)]
2285 fn bitand_assign(&mut self, rhs: i64) {
2286 *self = self.simd.and_i64x2(*self, rhs.simd_into(self.simd));
2287 }
2288}
2289impl<S: Simd> core::ops::BitAnd<i64x2<S>> for i64 {
2290 type Output = i64x2<S>;
2291 #[inline(always)]
2292 fn bitand(self, rhs: i64x2<S>) -> Self::Output {
2293 rhs.simd.and_i64x2(self.simd_into(rhs.simd), rhs)
2294 }
2295}
2296impl<S: Simd> core::ops::BitOr for i64x2<S> {
2297 type Output = Self;
2298 #[doc = "Compute the bitwise OR of two vectors."]
2299 #[inline(always)]
2300 fn bitor(self, rhs: Self) -> Self::Output {
2301 self.simd.or_i64x2(self, rhs)
2302 }
2303}
2304impl<S: Simd> core::ops::BitOrAssign for i64x2<S> {
2305 #[doc = "Compute the bitwise OR of two vectors."]
2306 #[inline(always)]
2307 fn bitor_assign(&mut self, rhs: Self) {
2308 *self = self.simd.or_i64x2(*self, rhs);
2309 }
2310}
2311impl<S: Simd> core::ops::BitOr<i64> for i64x2<S> {
2312 type Output = Self;
2313 #[inline(always)]
2314 fn bitor(self, rhs: i64) -> Self::Output {
2315 self.simd.or_i64x2(self, rhs.simd_into(self.simd))
2316 }
2317}
2318impl<S: Simd> core::ops::BitOrAssign<i64> for i64x2<S> {
2319 #[inline(always)]
2320 fn bitor_assign(&mut self, rhs: i64) {
2321 *self = self.simd.or_i64x2(*self, rhs.simd_into(self.simd));
2322 }
2323}
2324impl<S: Simd> core::ops::BitOr<i64x2<S>> for i64 {
2325 type Output = i64x2<S>;
2326 #[inline(always)]
2327 fn bitor(self, rhs: i64x2<S>) -> Self::Output {
2328 rhs.simd.or_i64x2(self.simd_into(rhs.simd), rhs)
2329 }
2330}
2331impl<S: Simd> core::ops::BitXor for i64x2<S> {
2332 type Output = Self;
2333 #[doc = "Compute the bitwise XOR of two vectors."]
2334 #[inline(always)]
2335 fn bitxor(self, rhs: Self) -> Self::Output {
2336 self.simd.xor_i64x2(self, rhs)
2337 }
2338}
2339impl<S: Simd> core::ops::BitXorAssign for i64x2<S> {
2340 #[doc = "Compute the bitwise XOR of two vectors."]
2341 #[inline(always)]
2342 fn bitxor_assign(&mut self, rhs: Self) {
2343 *self = self.simd.xor_i64x2(*self, rhs);
2344 }
2345}
2346impl<S: Simd> core::ops::BitXor<i64> for i64x2<S> {
2347 type Output = Self;
2348 #[inline(always)]
2349 fn bitxor(self, rhs: i64) -> Self::Output {
2350 self.simd.xor_i64x2(self, rhs.simd_into(self.simd))
2351 }
2352}
2353impl<S: Simd> core::ops::BitXorAssign<i64> for i64x2<S> {
2354 #[inline(always)]
2355 fn bitxor_assign(&mut self, rhs: i64) {
2356 *self = self.simd.xor_i64x2(*self, rhs.simd_into(self.simd));
2357 }
2358}
2359impl<S: Simd> core::ops::BitXor<i64x2<S>> for i64 {
2360 type Output = i64x2<S>;
2361 #[inline(always)]
2362 fn bitxor(self, rhs: i64x2<S>) -> Self::Output {
2363 rhs.simd.xor_i64x2(self.simd_into(rhs.simd), rhs)
2364 }
2365}
2366impl<S: Simd> core::ops::Not for i64x2<S> {
2367 type Output = Self;
2368 #[doc = "Compute the bitwise NOT of the vector."]
2369 #[inline(always)]
2370 fn not(self) -> Self::Output {
2371 self.simd.not_i64x2(self)
2372 }
2373}
2374impl<S: Simd> core::ops::Shl<u32> for i64x2<S> {
2375 type Output = Self;
2376 #[doc = "Shift each element left by the given number of bits.\n\nBits shifted out of the left side are discarded, and zeros are shifted in on the right.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform."]
2377 #[inline(always)]
2378 fn shl(self, rhs: u32) -> Self::Output {
2379 self.simd.shl_i64x2(self, rhs)
2380 }
2381}
2382impl<S: Simd> core::ops::ShlAssign<u32> for i64x2<S> {
2383 #[inline(always)]
2384 fn shl_assign(&mut self, rhs: u32) {
2385 *self = self.simd.shl_i64x2(*self, rhs);
2386 }
2387}
2388impl<S: Simd> core::ops::Shl for i64x2<S> {
2389 type Output = Self;
2390 #[doc = "Shift each element left by the given number of bits.\n\nBits shifted out of the left side are discarded, and zeros are shifted in on the right.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform.\n\n# Performance\nThis per-lane shift is slower than shifting the entire vector by a scalar. It is not vectorized at all on WebAssembly, SSE4.2, and for `u8` and `i8` elements on AVX2. Prefer shifting by a single scalar value instead of by a vector whenever possible."]
2391 #[inline(always)]
2392 fn shl(self, rhs: Self) -> Self::Output {
2393 self.simd.shlv_i64x2(self, rhs)
2394 }
2395}
2396impl<S: Simd> core::ops::ShlAssign for i64x2<S> {
2397 #[doc = "Shift each element left by the given number of bits.\n\nBits shifted out of the left side are discarded, and zeros are shifted in on the right.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform.\n\n# Performance\nThis per-lane shift is slower than shifting the entire vector by a scalar. It is not vectorized at all on WebAssembly, SSE4.2, and for `u8` and `i8` elements on AVX2. Prefer shifting by a single scalar value instead of by a vector whenever possible."]
2398 #[inline(always)]
2399 fn shl_assign(&mut self, rhs: Self) {
2400 *self = self.simd.shlv_i64x2(*self, rhs);
2401 }
2402}
2403impl<S: Simd> core::ops::Shr<u32> for i64x2<S> {
2404 type Output = Self;
2405 #[doc = "Shift each element right by the given number of bits.\n\nFor unsigned integers, zeros are shifted in on the left. For signed integers, the sign bit is replicated.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform."]
2406 #[inline(always)]
2407 fn shr(self, rhs: u32) -> Self::Output {
2408 self.simd.shr_i64x2(self, rhs)
2409 }
2410}
2411impl<S: Simd> core::ops::ShrAssign<u32> for i64x2<S> {
2412 #[inline(always)]
2413 fn shr_assign(&mut self, rhs: u32) {
2414 *self = self.simd.shr_i64x2(*self, rhs);
2415 }
2416}
2417impl<S: Simd> core::ops::Shr for i64x2<S> {
2418 type Output = Self;
2419 #[doc = "Shift each element right by the corresponding element in another vector.\n\nFor unsigned integers, zeros are shifted in on the left. For signed integers, the sign bit is replicated.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform.\n\n# Performance\nThis per-lane shift is slower than shifting the entire vector by a scalar. It is not vectorized at all on WebAssembly, SSE4.2, and for `u8` and `i8` elements on AVX2. Prefer shifting by a single scalar value instead of by a vector whenever possible."]
2420 #[inline(always)]
2421 fn shr(self, rhs: Self) -> Self::Output {
2422 self.simd.shrv_i64x2(self, rhs)
2423 }
2424}
2425impl<S: Simd> core::ops::ShrAssign for i64x2<S> {
2426 #[doc = "Shift each element right by the corresponding element in another vector.\n\nFor unsigned integers, zeros are shifted in on the left. For signed integers, the sign bit is replicated.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform.\n\n# Performance\nThis per-lane shift is slower than shifting the entire vector by a scalar. It is not vectorized at all on WebAssembly, SSE4.2, and for `u8` and `i8` elements on AVX2. Prefer shifting by a single scalar value instead of by a vector whenever possible."]
2427 #[inline(always)]
2428 fn shr_assign(&mut self, rhs: Self) {
2429 *self = self.simd.shrv_i64x2(*self, rhs);
2430 }
2431}
2432impl<S: Simd> core::ops::Add for u64x2<S> {
2433 type Output = Self;
2434 #[doc = "Add two vectors element-wise, wrapping on overflow."]
2435 #[inline(always)]
2436 fn add(self, rhs: Self) -> Self::Output {
2437 self.simd.add_u64x2(self, rhs)
2438 }
2439}
2440impl<S: Simd> core::ops::AddAssign for u64x2<S> {
2441 #[doc = "Add two vectors element-wise, wrapping on overflow."]
2442 #[inline(always)]
2443 fn add_assign(&mut self, rhs: Self) {
2444 *self = self.simd.add_u64x2(*self, rhs);
2445 }
2446}
2447impl<S: Simd> core::ops::Add<u64> for u64x2<S> {
2448 type Output = Self;
2449 #[inline(always)]
2450 fn add(self, rhs: u64) -> Self::Output {
2451 self.simd.add_u64x2(self, rhs.simd_into(self.simd))
2452 }
2453}
2454impl<S: Simd> core::ops::AddAssign<u64> for u64x2<S> {
2455 #[inline(always)]
2456 fn add_assign(&mut self, rhs: u64) {
2457 *self = self.simd.add_u64x2(*self, rhs.simd_into(self.simd));
2458 }
2459}
2460impl<S: Simd> core::ops::Add<u64x2<S>> for u64 {
2461 type Output = u64x2<S>;
2462 #[inline(always)]
2463 fn add(self, rhs: u64x2<S>) -> Self::Output {
2464 rhs.simd.add_u64x2(self.simd_into(rhs.simd), rhs)
2465 }
2466}
2467impl<S: Simd> core::ops::Sub for u64x2<S> {
2468 type Output = Self;
2469 #[doc = "Subtract two vectors element-wise, wrapping on overflow."]
2470 #[inline(always)]
2471 fn sub(self, rhs: Self) -> Self::Output {
2472 self.simd.sub_u64x2(self, rhs)
2473 }
2474}
2475impl<S: Simd> core::ops::SubAssign for u64x2<S> {
2476 #[doc = "Subtract two vectors element-wise, wrapping on overflow."]
2477 #[inline(always)]
2478 fn sub_assign(&mut self, rhs: Self) {
2479 *self = self.simd.sub_u64x2(*self, rhs);
2480 }
2481}
2482impl<S: Simd> core::ops::Sub<u64> for u64x2<S> {
2483 type Output = Self;
2484 #[inline(always)]
2485 fn sub(self, rhs: u64) -> Self::Output {
2486 self.simd.sub_u64x2(self, rhs.simd_into(self.simd))
2487 }
2488}
2489impl<S: Simd> core::ops::SubAssign<u64> for u64x2<S> {
2490 #[inline(always)]
2491 fn sub_assign(&mut self, rhs: u64) {
2492 *self = self.simd.sub_u64x2(*self, rhs.simd_into(self.simd));
2493 }
2494}
2495impl<S: Simd> core::ops::Sub<u64x2<S>> for u64 {
2496 type Output = u64x2<S>;
2497 #[inline(always)]
2498 fn sub(self, rhs: u64x2<S>) -> Self::Output {
2499 rhs.simd.sub_u64x2(self.simd_into(rhs.simd), rhs)
2500 }
2501}
2502impl<S: Simd> core::ops::Mul for u64x2<S> {
2503 type Output = Self;
2504 #[doc = "Multiply two vectors element-wise, wrapping on overflow."]
2505 #[inline(always)]
2506 fn mul(self, rhs: Self) -> Self::Output {
2507 self.simd.mul_u64x2(self, rhs)
2508 }
2509}
2510impl<S: Simd> core::ops::MulAssign for u64x2<S> {
2511 #[doc = "Multiply two vectors element-wise, wrapping on overflow."]
2512 #[inline(always)]
2513 fn mul_assign(&mut self, rhs: Self) {
2514 *self = self.simd.mul_u64x2(*self, rhs);
2515 }
2516}
2517impl<S: Simd> core::ops::Mul<u64> for u64x2<S> {
2518 type Output = Self;
2519 #[inline(always)]
2520 fn mul(self, rhs: u64) -> Self::Output {
2521 self.simd.mul_u64x2(self, rhs.simd_into(self.simd))
2522 }
2523}
2524impl<S: Simd> core::ops::MulAssign<u64> for u64x2<S> {
2525 #[inline(always)]
2526 fn mul_assign(&mut self, rhs: u64) {
2527 *self = self.simd.mul_u64x2(*self, rhs.simd_into(self.simd));
2528 }
2529}
2530impl<S: Simd> core::ops::Mul<u64x2<S>> for u64 {
2531 type Output = u64x2<S>;
2532 #[inline(always)]
2533 fn mul(self, rhs: u64x2<S>) -> Self::Output {
2534 rhs.simd.mul_u64x2(self.simd_into(rhs.simd), rhs)
2535 }
2536}
2537impl<S: Simd> core::ops::BitAnd for u64x2<S> {
2538 type Output = Self;
2539 #[doc = "Compute the bitwise AND of two vectors."]
2540 #[inline(always)]
2541 fn bitand(self, rhs: Self) -> Self::Output {
2542 self.simd.and_u64x2(self, rhs)
2543 }
2544}
2545impl<S: Simd> core::ops::BitAndAssign for u64x2<S> {
2546 #[doc = "Compute the bitwise AND of two vectors."]
2547 #[inline(always)]
2548 fn bitand_assign(&mut self, rhs: Self) {
2549 *self = self.simd.and_u64x2(*self, rhs);
2550 }
2551}
2552impl<S: Simd> core::ops::BitAnd<u64> for u64x2<S> {
2553 type Output = Self;
2554 #[inline(always)]
2555 fn bitand(self, rhs: u64) -> Self::Output {
2556 self.simd.and_u64x2(self, rhs.simd_into(self.simd))
2557 }
2558}
2559impl<S: Simd> core::ops::BitAndAssign<u64> for u64x2<S> {
2560 #[inline(always)]
2561 fn bitand_assign(&mut self, rhs: u64) {
2562 *self = self.simd.and_u64x2(*self, rhs.simd_into(self.simd));
2563 }
2564}
2565impl<S: Simd> core::ops::BitAnd<u64x2<S>> for u64 {
2566 type Output = u64x2<S>;
2567 #[inline(always)]
2568 fn bitand(self, rhs: u64x2<S>) -> Self::Output {
2569 rhs.simd.and_u64x2(self.simd_into(rhs.simd), rhs)
2570 }
2571}
2572impl<S: Simd> core::ops::BitOr for u64x2<S> {
2573 type Output = Self;
2574 #[doc = "Compute the bitwise OR of two vectors."]
2575 #[inline(always)]
2576 fn bitor(self, rhs: Self) -> Self::Output {
2577 self.simd.or_u64x2(self, rhs)
2578 }
2579}
2580impl<S: Simd> core::ops::BitOrAssign for u64x2<S> {
2581 #[doc = "Compute the bitwise OR of two vectors."]
2582 #[inline(always)]
2583 fn bitor_assign(&mut self, rhs: Self) {
2584 *self = self.simd.or_u64x2(*self, rhs);
2585 }
2586}
2587impl<S: Simd> core::ops::BitOr<u64> for u64x2<S> {
2588 type Output = Self;
2589 #[inline(always)]
2590 fn bitor(self, rhs: u64) -> Self::Output {
2591 self.simd.or_u64x2(self, rhs.simd_into(self.simd))
2592 }
2593}
2594impl<S: Simd> core::ops::BitOrAssign<u64> for u64x2<S> {
2595 #[inline(always)]
2596 fn bitor_assign(&mut self, rhs: u64) {
2597 *self = self.simd.or_u64x2(*self, rhs.simd_into(self.simd));
2598 }
2599}
2600impl<S: Simd> core::ops::BitOr<u64x2<S>> for u64 {
2601 type Output = u64x2<S>;
2602 #[inline(always)]
2603 fn bitor(self, rhs: u64x2<S>) -> Self::Output {
2604 rhs.simd.or_u64x2(self.simd_into(rhs.simd), rhs)
2605 }
2606}
2607impl<S: Simd> core::ops::BitXor for u64x2<S> {
2608 type Output = Self;
2609 #[doc = "Compute the bitwise XOR of two vectors."]
2610 #[inline(always)]
2611 fn bitxor(self, rhs: Self) -> Self::Output {
2612 self.simd.xor_u64x2(self, rhs)
2613 }
2614}
2615impl<S: Simd> core::ops::BitXorAssign for u64x2<S> {
2616 #[doc = "Compute the bitwise XOR of two vectors."]
2617 #[inline(always)]
2618 fn bitxor_assign(&mut self, rhs: Self) {
2619 *self = self.simd.xor_u64x2(*self, rhs);
2620 }
2621}
2622impl<S: Simd> core::ops::BitXor<u64> for u64x2<S> {
2623 type Output = Self;
2624 #[inline(always)]
2625 fn bitxor(self, rhs: u64) -> Self::Output {
2626 self.simd.xor_u64x2(self, rhs.simd_into(self.simd))
2627 }
2628}
2629impl<S: Simd> core::ops::BitXorAssign<u64> for u64x2<S> {
2630 #[inline(always)]
2631 fn bitxor_assign(&mut self, rhs: u64) {
2632 *self = self.simd.xor_u64x2(*self, rhs.simd_into(self.simd));
2633 }
2634}
2635impl<S: Simd> core::ops::BitXor<u64x2<S>> for u64 {
2636 type Output = u64x2<S>;
2637 #[inline(always)]
2638 fn bitxor(self, rhs: u64x2<S>) -> Self::Output {
2639 rhs.simd.xor_u64x2(self.simd_into(rhs.simd), rhs)
2640 }
2641}
2642impl<S: Simd> core::ops::Not for u64x2<S> {
2643 type Output = Self;
2644 #[doc = "Compute the bitwise NOT of the vector."]
2645 #[inline(always)]
2646 fn not(self) -> Self::Output {
2647 self.simd.not_u64x2(self)
2648 }
2649}
2650impl<S: Simd> core::ops::Shl<u32> for u64x2<S> {
2651 type Output = Self;
2652 #[doc = "Shift each element left by the given number of bits.\n\nBits shifted out of the left side are discarded, and zeros are shifted in on the right.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform."]
2653 #[inline(always)]
2654 fn shl(self, rhs: u32) -> Self::Output {
2655 self.simd.shl_u64x2(self, rhs)
2656 }
2657}
2658impl<S: Simd> core::ops::ShlAssign<u32> for u64x2<S> {
2659 #[inline(always)]
2660 fn shl_assign(&mut self, rhs: u32) {
2661 *self = self.simd.shl_u64x2(*self, rhs);
2662 }
2663}
2664impl<S: Simd> core::ops::Shl for u64x2<S> {
2665 type Output = Self;
2666 #[doc = "Shift each element left by the given number of bits.\n\nBits shifted out of the left side are discarded, and zeros are shifted in on the right.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform.\n\n# Performance\nThis per-lane shift is slower than shifting the entire vector by a scalar. It is not vectorized at all on WebAssembly, SSE4.2, and for `u8` and `i8` elements on AVX2. Prefer shifting by a single scalar value instead of by a vector whenever possible."]
2667 #[inline(always)]
2668 fn shl(self, rhs: Self) -> Self::Output {
2669 self.simd.shlv_u64x2(self, rhs)
2670 }
2671}
2672impl<S: Simd> core::ops::ShlAssign for u64x2<S> {
2673 #[doc = "Shift each element left by the given number of bits.\n\nBits shifted out of the left side are discarded, and zeros are shifted in on the right.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform.\n\n# Performance\nThis per-lane shift is slower than shifting the entire vector by a scalar. It is not vectorized at all on WebAssembly, SSE4.2, and for `u8` and `i8` elements on AVX2. Prefer shifting by a single scalar value instead of by a vector whenever possible."]
2674 #[inline(always)]
2675 fn shl_assign(&mut self, rhs: Self) {
2676 *self = self.simd.shlv_u64x2(*self, rhs);
2677 }
2678}
2679impl<S: Simd> core::ops::Shr<u32> for u64x2<S> {
2680 type Output = Self;
2681 #[doc = "Shift each element right by the given number of bits.\n\nFor unsigned integers, zeros are shifted in on the left. For signed integers, the sign bit is replicated.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform."]
2682 #[inline(always)]
2683 fn shr(self, rhs: u32) -> Self::Output {
2684 self.simd.shr_u64x2(self, rhs)
2685 }
2686}
2687impl<S: Simd> core::ops::ShrAssign<u32> for u64x2<S> {
2688 #[inline(always)]
2689 fn shr_assign(&mut self, rhs: u32) {
2690 *self = self.simd.shr_u64x2(*self, rhs);
2691 }
2692}
2693impl<S: Simd> core::ops::Shr for u64x2<S> {
2694 type Output = Self;
2695 #[doc = "Shift each element right by the corresponding element in another vector.\n\nFor unsigned integers, zeros are shifted in on the left. For signed integers, the sign bit is replicated.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform.\n\n# Performance\nThis per-lane shift is slower than shifting the entire vector by a scalar. It is not vectorized at all on WebAssembly, SSE4.2, and for `u8` and `i8` elements on AVX2. Prefer shifting by a single scalar value instead of by a vector whenever possible."]
2696 #[inline(always)]
2697 fn shr(self, rhs: Self) -> Self::Output {
2698 self.simd.shrv_u64x2(self, rhs)
2699 }
2700}
2701impl<S: Simd> core::ops::ShrAssign for u64x2<S> {
2702 #[doc = "Shift each element right by the corresponding element in another vector.\n\nFor unsigned integers, zeros are shifted in on the left. For signed integers, the sign bit is replicated.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform.\n\n# Performance\nThis per-lane shift is slower than shifting the entire vector by a scalar. It is not vectorized at all on WebAssembly, SSE4.2, and for `u8` and `i8` elements on AVX2. Prefer shifting by a single scalar value instead of by a vector whenever possible."]
2703 #[inline(always)]
2704 fn shr_assign(&mut self, rhs: Self) {
2705 *self = self.simd.shrv_u64x2(*self, rhs);
2706 }
2707}
2708impl<S: Simd> core::ops::BitAnd for mask64x2<S> {
2709 type Output = Self;
2710 #[doc = "Compute the logical AND of two masks."]
2711 #[inline(always)]
2712 fn bitand(self, rhs: Self) -> Self::Output {
2713 self.simd.and_mask64x2(self, rhs)
2714 }
2715}
2716impl<S: Simd> core::ops::BitAndAssign for mask64x2<S> {
2717 #[doc = "Compute the logical AND of two masks."]
2718 #[inline(always)]
2719 fn bitand_assign(&mut self, rhs: Self) {
2720 *self = self.simd.and_mask64x2(*self, rhs);
2721 }
2722}
2723impl<S: Simd> core::ops::BitOr for mask64x2<S> {
2724 type Output = Self;
2725 #[doc = "Compute the logical OR of two masks."]
2726 #[inline(always)]
2727 fn bitor(self, rhs: Self) -> Self::Output {
2728 self.simd.or_mask64x2(self, rhs)
2729 }
2730}
2731impl<S: Simd> core::ops::BitOrAssign for mask64x2<S> {
2732 #[doc = "Compute the logical OR of two masks."]
2733 #[inline(always)]
2734 fn bitor_assign(&mut self, rhs: Self) {
2735 *self = self.simd.or_mask64x2(*self, rhs);
2736 }
2737}
2738impl<S: Simd> core::ops::BitXor for mask64x2<S> {
2739 type Output = Self;
2740 #[doc = "Compute the logical XOR of two masks."]
2741 #[inline(always)]
2742 fn bitxor(self, rhs: Self) -> Self::Output {
2743 self.simd.xor_mask64x2(self, rhs)
2744 }
2745}
2746impl<S: Simd> core::ops::BitXorAssign for mask64x2<S> {
2747 #[doc = "Compute the logical XOR of two masks."]
2748 #[inline(always)]
2749 fn bitxor_assign(&mut self, rhs: Self) {
2750 *self = self.simd.xor_mask64x2(*self, rhs);
2751 }
2752}
2753impl<S: Simd> core::ops::Not for mask64x2<S> {
2754 type Output = Self;
2755 #[doc = "Compute the logical NOT of the mask."]
2756 #[inline(always)]
2757 fn not(self) -> Self::Output {
2758 self.simd.not_mask64x2(self)
2759 }
2760}
2761impl<S: Simd> core::ops::Neg for f32x8<S> {
2762 type Output = Self;
2763 #[doc = "Negate each element of the vector."]
2764 #[inline(always)]
2765 fn neg(self) -> Self::Output {
2766 self.simd.neg_f32x8(self)
2767 }
2768}
2769impl<S: Simd> core::ops::Add for f32x8<S> {
2770 type Output = Self;
2771 #[doc = "Add two vectors element-wise."]
2772 #[inline(always)]
2773 fn add(self, rhs: Self) -> Self::Output {
2774 self.simd.add_f32x8(self, rhs)
2775 }
2776}
2777impl<S: Simd> core::ops::AddAssign for f32x8<S> {
2778 #[doc = "Add two vectors element-wise."]
2779 #[inline(always)]
2780 fn add_assign(&mut self, rhs: Self) {
2781 *self = self.simd.add_f32x8(*self, rhs);
2782 }
2783}
2784impl<S: Simd> core::ops::Add<f32> for f32x8<S> {
2785 type Output = Self;
2786 #[inline(always)]
2787 fn add(self, rhs: f32) -> Self::Output {
2788 self.simd.add_f32x8(self, rhs.simd_into(self.simd))
2789 }
2790}
2791impl<S: Simd> core::ops::AddAssign<f32> for f32x8<S> {
2792 #[inline(always)]
2793 fn add_assign(&mut self, rhs: f32) {
2794 *self = self.simd.add_f32x8(*self, rhs.simd_into(self.simd));
2795 }
2796}
2797impl<S: Simd> core::ops::Add<f32x8<S>> for f32 {
2798 type Output = f32x8<S>;
2799 #[inline(always)]
2800 fn add(self, rhs: f32x8<S>) -> Self::Output {
2801 rhs.simd.add_f32x8(self.simd_into(rhs.simd), rhs)
2802 }
2803}
2804impl<S: Simd> core::ops::Sub for f32x8<S> {
2805 type Output = Self;
2806 #[doc = "Subtract two vectors element-wise."]
2807 #[inline(always)]
2808 fn sub(self, rhs: Self) -> Self::Output {
2809 self.simd.sub_f32x8(self, rhs)
2810 }
2811}
2812impl<S: Simd> core::ops::SubAssign for f32x8<S> {
2813 #[doc = "Subtract two vectors element-wise."]
2814 #[inline(always)]
2815 fn sub_assign(&mut self, rhs: Self) {
2816 *self = self.simd.sub_f32x8(*self, rhs);
2817 }
2818}
2819impl<S: Simd> core::ops::Sub<f32> for f32x8<S> {
2820 type Output = Self;
2821 #[inline(always)]
2822 fn sub(self, rhs: f32) -> Self::Output {
2823 self.simd.sub_f32x8(self, rhs.simd_into(self.simd))
2824 }
2825}
2826impl<S: Simd> core::ops::SubAssign<f32> for f32x8<S> {
2827 #[inline(always)]
2828 fn sub_assign(&mut self, rhs: f32) {
2829 *self = self.simd.sub_f32x8(*self, rhs.simd_into(self.simd));
2830 }
2831}
2832impl<S: Simd> core::ops::Sub<f32x8<S>> for f32 {
2833 type Output = f32x8<S>;
2834 #[inline(always)]
2835 fn sub(self, rhs: f32x8<S>) -> Self::Output {
2836 rhs.simd.sub_f32x8(self.simd_into(rhs.simd), rhs)
2837 }
2838}
2839impl<S: Simd> core::ops::Mul for f32x8<S> {
2840 type Output = Self;
2841 #[doc = "Multiply two vectors element-wise."]
2842 #[inline(always)]
2843 fn mul(self, rhs: Self) -> Self::Output {
2844 self.simd.mul_f32x8(self, rhs)
2845 }
2846}
2847impl<S: Simd> core::ops::MulAssign for f32x8<S> {
2848 #[doc = "Multiply two vectors element-wise."]
2849 #[inline(always)]
2850 fn mul_assign(&mut self, rhs: Self) {
2851 *self = self.simd.mul_f32x8(*self, rhs);
2852 }
2853}
2854impl<S: Simd> core::ops::Mul<f32> for f32x8<S> {
2855 type Output = Self;
2856 #[inline(always)]
2857 fn mul(self, rhs: f32) -> Self::Output {
2858 self.simd.mul_f32x8(self, rhs.simd_into(self.simd))
2859 }
2860}
2861impl<S: Simd> core::ops::MulAssign<f32> for f32x8<S> {
2862 #[inline(always)]
2863 fn mul_assign(&mut self, rhs: f32) {
2864 *self = self.simd.mul_f32x8(*self, rhs.simd_into(self.simd));
2865 }
2866}
2867impl<S: Simd> core::ops::Mul<f32x8<S>> for f32 {
2868 type Output = f32x8<S>;
2869 #[inline(always)]
2870 fn mul(self, rhs: f32x8<S>) -> Self::Output {
2871 rhs.simd.mul_f32x8(self.simd_into(rhs.simd), rhs)
2872 }
2873}
2874impl<S: Simd> core::ops::Div for f32x8<S> {
2875 type Output = Self;
2876 #[doc = "Divide two vectors element-wise."]
2877 #[inline(always)]
2878 fn div(self, rhs: Self) -> Self::Output {
2879 self.simd.div_f32x8(self, rhs)
2880 }
2881}
2882impl<S: Simd> core::ops::DivAssign for f32x8<S> {
2883 #[doc = "Divide two vectors element-wise."]
2884 #[inline(always)]
2885 fn div_assign(&mut self, rhs: Self) {
2886 *self = self.simd.div_f32x8(*self, rhs);
2887 }
2888}
2889impl<S: Simd> core::ops::Div<f32> for f32x8<S> {
2890 type Output = Self;
2891 #[inline(always)]
2892 fn div(self, rhs: f32) -> Self::Output {
2893 self.simd.div_f32x8(self, rhs.simd_into(self.simd))
2894 }
2895}
2896impl<S: Simd> core::ops::DivAssign<f32> for f32x8<S> {
2897 #[inline(always)]
2898 fn div_assign(&mut self, rhs: f32) {
2899 *self = self.simd.div_f32x8(*self, rhs.simd_into(self.simd));
2900 }
2901}
2902impl<S: Simd> core::ops::Div<f32x8<S>> for f32 {
2903 type Output = f32x8<S>;
2904 #[inline(always)]
2905 fn div(self, rhs: f32x8<S>) -> Self::Output {
2906 rhs.simd.div_f32x8(self.simd_into(rhs.simd), rhs)
2907 }
2908}
2909impl<S: Simd> core::ops::Neg for i8x32<S> {
2910 type Output = Self;
2911 #[doc = "Negate each element of the vector, wrapping on overflow."]
2912 #[inline(always)]
2913 fn neg(self) -> Self::Output {
2914 self.simd.neg_i8x32(self)
2915 }
2916}
2917impl<S: Simd> core::ops::Add for i8x32<S> {
2918 type Output = Self;
2919 #[doc = "Add two vectors element-wise, wrapping on overflow."]
2920 #[inline(always)]
2921 fn add(self, rhs: Self) -> Self::Output {
2922 self.simd.add_i8x32(self, rhs)
2923 }
2924}
2925impl<S: Simd> core::ops::AddAssign for i8x32<S> {
2926 #[doc = "Add two vectors element-wise, wrapping on overflow."]
2927 #[inline(always)]
2928 fn add_assign(&mut self, rhs: Self) {
2929 *self = self.simd.add_i8x32(*self, rhs);
2930 }
2931}
2932impl<S: Simd> core::ops::Add<i8> for i8x32<S> {
2933 type Output = Self;
2934 #[inline(always)]
2935 fn add(self, rhs: i8) -> Self::Output {
2936 self.simd.add_i8x32(self, rhs.simd_into(self.simd))
2937 }
2938}
2939impl<S: Simd> core::ops::AddAssign<i8> for i8x32<S> {
2940 #[inline(always)]
2941 fn add_assign(&mut self, rhs: i8) {
2942 *self = self.simd.add_i8x32(*self, rhs.simd_into(self.simd));
2943 }
2944}
2945impl<S: Simd> core::ops::Add<i8x32<S>> for i8 {
2946 type Output = i8x32<S>;
2947 #[inline(always)]
2948 fn add(self, rhs: i8x32<S>) -> Self::Output {
2949 rhs.simd.add_i8x32(self.simd_into(rhs.simd), rhs)
2950 }
2951}
2952impl<S: Simd> core::ops::Sub for i8x32<S> {
2953 type Output = Self;
2954 #[doc = "Subtract two vectors element-wise, wrapping on overflow."]
2955 #[inline(always)]
2956 fn sub(self, rhs: Self) -> Self::Output {
2957 self.simd.sub_i8x32(self, rhs)
2958 }
2959}
2960impl<S: Simd> core::ops::SubAssign for i8x32<S> {
2961 #[doc = "Subtract two vectors element-wise, wrapping on overflow."]
2962 #[inline(always)]
2963 fn sub_assign(&mut self, rhs: Self) {
2964 *self = self.simd.sub_i8x32(*self, rhs);
2965 }
2966}
2967impl<S: Simd> core::ops::Sub<i8> for i8x32<S> {
2968 type Output = Self;
2969 #[inline(always)]
2970 fn sub(self, rhs: i8) -> Self::Output {
2971 self.simd.sub_i8x32(self, rhs.simd_into(self.simd))
2972 }
2973}
2974impl<S: Simd> core::ops::SubAssign<i8> for i8x32<S> {
2975 #[inline(always)]
2976 fn sub_assign(&mut self, rhs: i8) {
2977 *self = self.simd.sub_i8x32(*self, rhs.simd_into(self.simd));
2978 }
2979}
2980impl<S: Simd> core::ops::Sub<i8x32<S>> for i8 {
2981 type Output = i8x32<S>;
2982 #[inline(always)]
2983 fn sub(self, rhs: i8x32<S>) -> Self::Output {
2984 rhs.simd.sub_i8x32(self.simd_into(rhs.simd), rhs)
2985 }
2986}
2987impl<S: Simd> core::ops::Mul for i8x32<S> {
2988 type Output = Self;
2989 #[doc = "Multiply two vectors element-wise, wrapping on overflow."]
2990 #[inline(always)]
2991 fn mul(self, rhs: Self) -> Self::Output {
2992 self.simd.mul_i8x32(self, rhs)
2993 }
2994}
2995impl<S: Simd> core::ops::MulAssign for i8x32<S> {
2996 #[doc = "Multiply two vectors element-wise, wrapping on overflow."]
2997 #[inline(always)]
2998 fn mul_assign(&mut self, rhs: Self) {
2999 *self = self.simd.mul_i8x32(*self, rhs);
3000 }
3001}
3002impl<S: Simd> core::ops::Mul<i8> for i8x32<S> {
3003 type Output = Self;
3004 #[inline(always)]
3005 fn mul(self, rhs: i8) -> Self::Output {
3006 self.simd.mul_i8x32(self, rhs.simd_into(self.simd))
3007 }
3008}
3009impl<S: Simd> core::ops::MulAssign<i8> for i8x32<S> {
3010 #[inline(always)]
3011 fn mul_assign(&mut self, rhs: i8) {
3012 *self = self.simd.mul_i8x32(*self, rhs.simd_into(self.simd));
3013 }
3014}
3015impl<S: Simd> core::ops::Mul<i8x32<S>> for i8 {
3016 type Output = i8x32<S>;
3017 #[inline(always)]
3018 fn mul(self, rhs: i8x32<S>) -> Self::Output {
3019 rhs.simd.mul_i8x32(self.simd_into(rhs.simd), rhs)
3020 }
3021}
3022impl<S: Simd> core::ops::BitAnd for i8x32<S> {
3023 type Output = Self;
3024 #[doc = "Compute the bitwise AND of two vectors."]
3025 #[inline(always)]
3026 fn bitand(self, rhs: Self) -> Self::Output {
3027 self.simd.and_i8x32(self, rhs)
3028 }
3029}
3030impl<S: Simd> core::ops::BitAndAssign for i8x32<S> {
3031 #[doc = "Compute the bitwise AND of two vectors."]
3032 #[inline(always)]
3033 fn bitand_assign(&mut self, rhs: Self) {
3034 *self = self.simd.and_i8x32(*self, rhs);
3035 }
3036}
3037impl<S: Simd> core::ops::BitAnd<i8> for i8x32<S> {
3038 type Output = Self;
3039 #[inline(always)]
3040 fn bitand(self, rhs: i8) -> Self::Output {
3041 self.simd.and_i8x32(self, rhs.simd_into(self.simd))
3042 }
3043}
3044impl<S: Simd> core::ops::BitAndAssign<i8> for i8x32<S> {
3045 #[inline(always)]
3046 fn bitand_assign(&mut self, rhs: i8) {
3047 *self = self.simd.and_i8x32(*self, rhs.simd_into(self.simd));
3048 }
3049}
3050impl<S: Simd> core::ops::BitAnd<i8x32<S>> for i8 {
3051 type Output = i8x32<S>;
3052 #[inline(always)]
3053 fn bitand(self, rhs: i8x32<S>) -> Self::Output {
3054 rhs.simd.and_i8x32(self.simd_into(rhs.simd), rhs)
3055 }
3056}
3057impl<S: Simd> core::ops::BitOr for i8x32<S> {
3058 type Output = Self;
3059 #[doc = "Compute the bitwise OR of two vectors."]
3060 #[inline(always)]
3061 fn bitor(self, rhs: Self) -> Self::Output {
3062 self.simd.or_i8x32(self, rhs)
3063 }
3064}
3065impl<S: Simd> core::ops::BitOrAssign for i8x32<S> {
3066 #[doc = "Compute the bitwise OR of two vectors."]
3067 #[inline(always)]
3068 fn bitor_assign(&mut self, rhs: Self) {
3069 *self = self.simd.or_i8x32(*self, rhs);
3070 }
3071}
3072impl<S: Simd> core::ops::BitOr<i8> for i8x32<S> {
3073 type Output = Self;
3074 #[inline(always)]
3075 fn bitor(self, rhs: i8) -> Self::Output {
3076 self.simd.or_i8x32(self, rhs.simd_into(self.simd))
3077 }
3078}
3079impl<S: Simd> core::ops::BitOrAssign<i8> for i8x32<S> {
3080 #[inline(always)]
3081 fn bitor_assign(&mut self, rhs: i8) {
3082 *self = self.simd.or_i8x32(*self, rhs.simd_into(self.simd));
3083 }
3084}
3085impl<S: Simd> core::ops::BitOr<i8x32<S>> for i8 {
3086 type Output = i8x32<S>;
3087 #[inline(always)]
3088 fn bitor(self, rhs: i8x32<S>) -> Self::Output {
3089 rhs.simd.or_i8x32(self.simd_into(rhs.simd), rhs)
3090 }
3091}
3092impl<S: Simd> core::ops::BitXor for i8x32<S> {
3093 type Output = Self;
3094 #[doc = "Compute the bitwise XOR of two vectors."]
3095 #[inline(always)]
3096 fn bitxor(self, rhs: Self) -> Self::Output {
3097 self.simd.xor_i8x32(self, rhs)
3098 }
3099}
3100impl<S: Simd> core::ops::BitXorAssign for i8x32<S> {
3101 #[doc = "Compute the bitwise XOR of two vectors."]
3102 #[inline(always)]
3103 fn bitxor_assign(&mut self, rhs: Self) {
3104 *self = self.simd.xor_i8x32(*self, rhs);
3105 }
3106}
3107impl<S: Simd> core::ops::BitXor<i8> for i8x32<S> {
3108 type Output = Self;
3109 #[inline(always)]
3110 fn bitxor(self, rhs: i8) -> Self::Output {
3111 self.simd.xor_i8x32(self, rhs.simd_into(self.simd))
3112 }
3113}
3114impl<S: Simd> core::ops::BitXorAssign<i8> for i8x32<S> {
3115 #[inline(always)]
3116 fn bitxor_assign(&mut self, rhs: i8) {
3117 *self = self.simd.xor_i8x32(*self, rhs.simd_into(self.simd));
3118 }
3119}
3120impl<S: Simd> core::ops::BitXor<i8x32<S>> for i8 {
3121 type Output = i8x32<S>;
3122 #[inline(always)]
3123 fn bitxor(self, rhs: i8x32<S>) -> Self::Output {
3124 rhs.simd.xor_i8x32(self.simd_into(rhs.simd), rhs)
3125 }
3126}
3127impl<S: Simd> core::ops::Not for i8x32<S> {
3128 type Output = Self;
3129 #[doc = "Compute the bitwise NOT of the vector."]
3130 #[inline(always)]
3131 fn not(self) -> Self::Output {
3132 self.simd.not_i8x32(self)
3133 }
3134}
3135impl<S: Simd> core::ops::Shl<u32> for i8x32<S> {
3136 type Output = Self;
3137 #[doc = "Shift each element left by the given number of bits.\n\nBits shifted out of the left side are discarded, and zeros are shifted in on the right.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform."]
3138 #[inline(always)]
3139 fn shl(self, rhs: u32) -> Self::Output {
3140 self.simd.shl_i8x32(self, rhs)
3141 }
3142}
3143impl<S: Simd> core::ops::ShlAssign<u32> for i8x32<S> {
3144 #[inline(always)]
3145 fn shl_assign(&mut self, rhs: u32) {
3146 *self = self.simd.shl_i8x32(*self, rhs);
3147 }
3148}
3149impl<S: Simd> core::ops::Shl for i8x32<S> {
3150 type Output = Self;
3151 #[doc = "Shift each element left by the given number of bits.\n\nBits shifted out of the left side are discarded, and zeros are shifted in on the right.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform.\n\n# Performance\nThis per-lane shift is slower than shifting the entire vector by a scalar. It is not vectorized at all on WebAssembly, SSE4.2, and for `u8` and `i8` elements on AVX2. Prefer shifting by a single scalar value instead of by a vector whenever possible."]
3152 #[inline(always)]
3153 fn shl(self, rhs: Self) -> Self::Output {
3154 self.simd.shlv_i8x32(self, rhs)
3155 }
3156}
3157impl<S: Simd> core::ops::ShlAssign for i8x32<S> {
3158 #[doc = "Shift each element left by the given number of bits.\n\nBits shifted out of the left side are discarded, and zeros are shifted in on the right.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform.\n\n# Performance\nThis per-lane shift is slower than shifting the entire vector by a scalar. It is not vectorized at all on WebAssembly, SSE4.2, and for `u8` and `i8` elements on AVX2. Prefer shifting by a single scalar value instead of by a vector whenever possible."]
3159 #[inline(always)]
3160 fn shl_assign(&mut self, rhs: Self) {
3161 *self = self.simd.shlv_i8x32(*self, rhs);
3162 }
3163}
3164impl<S: Simd> core::ops::Shr<u32> for i8x32<S> {
3165 type Output = Self;
3166 #[doc = "Shift each element right by the given number of bits.\n\nFor unsigned integers, zeros are shifted in on the left. For signed integers, the sign bit is replicated.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform."]
3167 #[inline(always)]
3168 fn shr(self, rhs: u32) -> Self::Output {
3169 self.simd.shr_i8x32(self, rhs)
3170 }
3171}
3172impl<S: Simd> core::ops::ShrAssign<u32> for i8x32<S> {
3173 #[inline(always)]
3174 fn shr_assign(&mut self, rhs: u32) {
3175 *self = self.simd.shr_i8x32(*self, rhs);
3176 }
3177}
3178impl<S: Simd> core::ops::Shr for i8x32<S> {
3179 type Output = Self;
3180 #[doc = "Shift each element right by the corresponding element in another vector.\n\nFor unsigned integers, zeros are shifted in on the left. For signed integers, the sign bit is replicated.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform.\n\n# Performance\nThis per-lane shift is slower than shifting the entire vector by a scalar. It is not vectorized at all on WebAssembly, SSE4.2, and for `u8` and `i8` elements on AVX2. Prefer shifting by a single scalar value instead of by a vector whenever possible."]
3181 #[inline(always)]
3182 fn shr(self, rhs: Self) -> Self::Output {
3183 self.simd.shrv_i8x32(self, rhs)
3184 }
3185}
3186impl<S: Simd> core::ops::ShrAssign for i8x32<S> {
3187 #[doc = "Shift each element right by the corresponding element in another vector.\n\nFor unsigned integers, zeros are shifted in on the left. For signed integers, the sign bit is replicated.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform.\n\n# Performance\nThis per-lane shift is slower than shifting the entire vector by a scalar. It is not vectorized at all on WebAssembly, SSE4.2, and for `u8` and `i8` elements on AVX2. Prefer shifting by a single scalar value instead of by a vector whenever possible."]
3188 #[inline(always)]
3189 fn shr_assign(&mut self, rhs: Self) {
3190 *self = self.simd.shrv_i8x32(*self, rhs);
3191 }
3192}
3193impl<S: Simd> core::ops::Add for u8x32<S> {
3194 type Output = Self;
3195 #[doc = "Add two vectors element-wise, wrapping on overflow."]
3196 #[inline(always)]
3197 fn add(self, rhs: Self) -> Self::Output {
3198 self.simd.add_u8x32(self, rhs)
3199 }
3200}
3201impl<S: Simd> core::ops::AddAssign for u8x32<S> {
3202 #[doc = "Add two vectors element-wise, wrapping on overflow."]
3203 #[inline(always)]
3204 fn add_assign(&mut self, rhs: Self) {
3205 *self = self.simd.add_u8x32(*self, rhs);
3206 }
3207}
3208impl<S: Simd> core::ops::Add<u8> for u8x32<S> {
3209 type Output = Self;
3210 #[inline(always)]
3211 fn add(self, rhs: u8) -> Self::Output {
3212 self.simd.add_u8x32(self, rhs.simd_into(self.simd))
3213 }
3214}
3215impl<S: Simd> core::ops::AddAssign<u8> for u8x32<S> {
3216 #[inline(always)]
3217 fn add_assign(&mut self, rhs: u8) {
3218 *self = self.simd.add_u8x32(*self, rhs.simd_into(self.simd));
3219 }
3220}
3221impl<S: Simd> core::ops::Add<u8x32<S>> for u8 {
3222 type Output = u8x32<S>;
3223 #[inline(always)]
3224 fn add(self, rhs: u8x32<S>) -> Self::Output {
3225 rhs.simd.add_u8x32(self.simd_into(rhs.simd), rhs)
3226 }
3227}
3228impl<S: Simd> core::ops::Sub for u8x32<S> {
3229 type Output = Self;
3230 #[doc = "Subtract two vectors element-wise, wrapping on overflow."]
3231 #[inline(always)]
3232 fn sub(self, rhs: Self) -> Self::Output {
3233 self.simd.sub_u8x32(self, rhs)
3234 }
3235}
3236impl<S: Simd> core::ops::SubAssign for u8x32<S> {
3237 #[doc = "Subtract two vectors element-wise, wrapping on overflow."]
3238 #[inline(always)]
3239 fn sub_assign(&mut self, rhs: Self) {
3240 *self = self.simd.sub_u8x32(*self, rhs);
3241 }
3242}
3243impl<S: Simd> core::ops::Sub<u8> for u8x32<S> {
3244 type Output = Self;
3245 #[inline(always)]
3246 fn sub(self, rhs: u8) -> Self::Output {
3247 self.simd.sub_u8x32(self, rhs.simd_into(self.simd))
3248 }
3249}
3250impl<S: Simd> core::ops::SubAssign<u8> for u8x32<S> {
3251 #[inline(always)]
3252 fn sub_assign(&mut self, rhs: u8) {
3253 *self = self.simd.sub_u8x32(*self, rhs.simd_into(self.simd));
3254 }
3255}
3256impl<S: Simd> core::ops::Sub<u8x32<S>> for u8 {
3257 type Output = u8x32<S>;
3258 #[inline(always)]
3259 fn sub(self, rhs: u8x32<S>) -> Self::Output {
3260 rhs.simd.sub_u8x32(self.simd_into(rhs.simd), rhs)
3261 }
3262}
3263impl<S: Simd> core::ops::Mul for u8x32<S> {
3264 type Output = Self;
3265 #[doc = "Multiply two vectors element-wise, wrapping on overflow."]
3266 #[inline(always)]
3267 fn mul(self, rhs: Self) -> Self::Output {
3268 self.simd.mul_u8x32(self, rhs)
3269 }
3270}
3271impl<S: Simd> core::ops::MulAssign for u8x32<S> {
3272 #[doc = "Multiply two vectors element-wise, wrapping on overflow."]
3273 #[inline(always)]
3274 fn mul_assign(&mut self, rhs: Self) {
3275 *self = self.simd.mul_u8x32(*self, rhs);
3276 }
3277}
3278impl<S: Simd> core::ops::Mul<u8> for u8x32<S> {
3279 type Output = Self;
3280 #[inline(always)]
3281 fn mul(self, rhs: u8) -> Self::Output {
3282 self.simd.mul_u8x32(self, rhs.simd_into(self.simd))
3283 }
3284}
3285impl<S: Simd> core::ops::MulAssign<u8> for u8x32<S> {
3286 #[inline(always)]
3287 fn mul_assign(&mut self, rhs: u8) {
3288 *self = self.simd.mul_u8x32(*self, rhs.simd_into(self.simd));
3289 }
3290}
3291impl<S: Simd> core::ops::Mul<u8x32<S>> for u8 {
3292 type Output = u8x32<S>;
3293 #[inline(always)]
3294 fn mul(self, rhs: u8x32<S>) -> Self::Output {
3295 rhs.simd.mul_u8x32(self.simd_into(rhs.simd), rhs)
3296 }
3297}
3298impl<S: Simd> core::ops::BitAnd for u8x32<S> {
3299 type Output = Self;
3300 #[doc = "Compute the bitwise AND of two vectors."]
3301 #[inline(always)]
3302 fn bitand(self, rhs: Self) -> Self::Output {
3303 self.simd.and_u8x32(self, rhs)
3304 }
3305}
3306impl<S: Simd> core::ops::BitAndAssign for u8x32<S> {
3307 #[doc = "Compute the bitwise AND of two vectors."]
3308 #[inline(always)]
3309 fn bitand_assign(&mut self, rhs: Self) {
3310 *self = self.simd.and_u8x32(*self, rhs);
3311 }
3312}
3313impl<S: Simd> core::ops::BitAnd<u8> for u8x32<S> {
3314 type Output = Self;
3315 #[inline(always)]
3316 fn bitand(self, rhs: u8) -> Self::Output {
3317 self.simd.and_u8x32(self, rhs.simd_into(self.simd))
3318 }
3319}
3320impl<S: Simd> core::ops::BitAndAssign<u8> for u8x32<S> {
3321 #[inline(always)]
3322 fn bitand_assign(&mut self, rhs: u8) {
3323 *self = self.simd.and_u8x32(*self, rhs.simd_into(self.simd));
3324 }
3325}
3326impl<S: Simd> core::ops::BitAnd<u8x32<S>> for u8 {
3327 type Output = u8x32<S>;
3328 #[inline(always)]
3329 fn bitand(self, rhs: u8x32<S>) -> Self::Output {
3330 rhs.simd.and_u8x32(self.simd_into(rhs.simd), rhs)
3331 }
3332}
3333impl<S: Simd> core::ops::BitOr for u8x32<S> {
3334 type Output = Self;
3335 #[doc = "Compute the bitwise OR of two vectors."]
3336 #[inline(always)]
3337 fn bitor(self, rhs: Self) -> Self::Output {
3338 self.simd.or_u8x32(self, rhs)
3339 }
3340}
3341impl<S: Simd> core::ops::BitOrAssign for u8x32<S> {
3342 #[doc = "Compute the bitwise OR of two vectors."]
3343 #[inline(always)]
3344 fn bitor_assign(&mut self, rhs: Self) {
3345 *self = self.simd.or_u8x32(*self, rhs);
3346 }
3347}
3348impl<S: Simd> core::ops::BitOr<u8> for u8x32<S> {
3349 type Output = Self;
3350 #[inline(always)]
3351 fn bitor(self, rhs: u8) -> Self::Output {
3352 self.simd.or_u8x32(self, rhs.simd_into(self.simd))
3353 }
3354}
3355impl<S: Simd> core::ops::BitOrAssign<u8> for u8x32<S> {
3356 #[inline(always)]
3357 fn bitor_assign(&mut self, rhs: u8) {
3358 *self = self.simd.or_u8x32(*self, rhs.simd_into(self.simd));
3359 }
3360}
3361impl<S: Simd> core::ops::BitOr<u8x32<S>> for u8 {
3362 type Output = u8x32<S>;
3363 #[inline(always)]
3364 fn bitor(self, rhs: u8x32<S>) -> Self::Output {
3365 rhs.simd.or_u8x32(self.simd_into(rhs.simd), rhs)
3366 }
3367}
3368impl<S: Simd> core::ops::BitXor for u8x32<S> {
3369 type Output = Self;
3370 #[doc = "Compute the bitwise XOR of two vectors."]
3371 #[inline(always)]
3372 fn bitxor(self, rhs: Self) -> Self::Output {
3373 self.simd.xor_u8x32(self, rhs)
3374 }
3375}
3376impl<S: Simd> core::ops::BitXorAssign for u8x32<S> {
3377 #[doc = "Compute the bitwise XOR of two vectors."]
3378 #[inline(always)]
3379 fn bitxor_assign(&mut self, rhs: Self) {
3380 *self = self.simd.xor_u8x32(*self, rhs);
3381 }
3382}
3383impl<S: Simd> core::ops::BitXor<u8> for u8x32<S> {
3384 type Output = Self;
3385 #[inline(always)]
3386 fn bitxor(self, rhs: u8) -> Self::Output {
3387 self.simd.xor_u8x32(self, rhs.simd_into(self.simd))
3388 }
3389}
3390impl<S: Simd> core::ops::BitXorAssign<u8> for u8x32<S> {
3391 #[inline(always)]
3392 fn bitxor_assign(&mut self, rhs: u8) {
3393 *self = self.simd.xor_u8x32(*self, rhs.simd_into(self.simd));
3394 }
3395}
3396impl<S: Simd> core::ops::BitXor<u8x32<S>> for u8 {
3397 type Output = u8x32<S>;
3398 #[inline(always)]
3399 fn bitxor(self, rhs: u8x32<S>) -> Self::Output {
3400 rhs.simd.xor_u8x32(self.simd_into(rhs.simd), rhs)
3401 }
3402}
3403impl<S: Simd> core::ops::Not for u8x32<S> {
3404 type Output = Self;
3405 #[doc = "Compute the bitwise NOT of the vector."]
3406 #[inline(always)]
3407 fn not(self) -> Self::Output {
3408 self.simd.not_u8x32(self)
3409 }
3410}
3411impl<S: Simd> core::ops::Shl<u32> for u8x32<S> {
3412 type Output = Self;
3413 #[doc = "Shift each element left by the given number of bits.\n\nBits shifted out of the left side are discarded, and zeros are shifted in on the right.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform."]
3414 #[inline(always)]
3415 fn shl(self, rhs: u32) -> Self::Output {
3416 self.simd.shl_u8x32(self, rhs)
3417 }
3418}
3419impl<S: Simd> core::ops::ShlAssign<u32> for u8x32<S> {
3420 #[inline(always)]
3421 fn shl_assign(&mut self, rhs: u32) {
3422 *self = self.simd.shl_u8x32(*self, rhs);
3423 }
3424}
3425impl<S: Simd> core::ops::Shl for u8x32<S> {
3426 type Output = Self;
3427 #[doc = "Shift each element left by the given number of bits.\n\nBits shifted out of the left side are discarded, and zeros are shifted in on the right.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform.\n\n# Performance\nThis per-lane shift is slower than shifting the entire vector by a scalar. It is not vectorized at all on WebAssembly, SSE4.2, and for `u8` and `i8` elements on AVX2. Prefer shifting by a single scalar value instead of by a vector whenever possible."]
3428 #[inline(always)]
3429 fn shl(self, rhs: Self) -> Self::Output {
3430 self.simd.shlv_u8x32(self, rhs)
3431 }
3432}
3433impl<S: Simd> core::ops::ShlAssign for u8x32<S> {
3434 #[doc = "Shift each element left by the given number of bits.\n\nBits shifted out of the left side are discarded, and zeros are shifted in on the right.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform.\n\n# Performance\nThis per-lane shift is slower than shifting the entire vector by a scalar. It is not vectorized at all on WebAssembly, SSE4.2, and for `u8` and `i8` elements on AVX2. Prefer shifting by a single scalar value instead of by a vector whenever possible."]
3435 #[inline(always)]
3436 fn shl_assign(&mut self, rhs: Self) {
3437 *self = self.simd.shlv_u8x32(*self, rhs);
3438 }
3439}
3440impl<S: Simd> core::ops::Shr<u32> for u8x32<S> {
3441 type Output = Self;
3442 #[doc = "Shift each element right by the given number of bits.\n\nFor unsigned integers, zeros are shifted in on the left. For signed integers, the sign bit is replicated.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform."]
3443 #[inline(always)]
3444 fn shr(self, rhs: u32) -> Self::Output {
3445 self.simd.shr_u8x32(self, rhs)
3446 }
3447}
3448impl<S: Simd> core::ops::ShrAssign<u32> for u8x32<S> {
3449 #[inline(always)]
3450 fn shr_assign(&mut self, rhs: u32) {
3451 *self = self.simd.shr_u8x32(*self, rhs);
3452 }
3453}
3454impl<S: Simd> core::ops::Shr for u8x32<S> {
3455 type Output = Self;
3456 #[doc = "Shift each element right by the corresponding element in another vector.\n\nFor unsigned integers, zeros are shifted in on the left. For signed integers, the sign bit is replicated.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform.\n\n# Performance\nThis per-lane shift is slower than shifting the entire vector by a scalar. It is not vectorized at all on WebAssembly, SSE4.2, and for `u8` and `i8` elements on AVX2. Prefer shifting by a single scalar value instead of by a vector whenever possible."]
3457 #[inline(always)]
3458 fn shr(self, rhs: Self) -> Self::Output {
3459 self.simd.shrv_u8x32(self, rhs)
3460 }
3461}
3462impl<S: Simd> core::ops::ShrAssign for u8x32<S> {
3463 #[doc = "Shift each element right by the corresponding element in another vector.\n\nFor unsigned integers, zeros are shifted in on the left. For signed integers, the sign bit is replicated.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform.\n\n# Performance\nThis per-lane shift is slower than shifting the entire vector by a scalar. It is not vectorized at all on WebAssembly, SSE4.2, and for `u8` and `i8` elements on AVX2. Prefer shifting by a single scalar value instead of by a vector whenever possible."]
3464 #[inline(always)]
3465 fn shr_assign(&mut self, rhs: Self) {
3466 *self = self.simd.shrv_u8x32(*self, rhs);
3467 }
3468}
3469impl<S: Simd> core::ops::BitAnd for mask8x32<S> {
3470 type Output = Self;
3471 #[doc = "Compute the logical AND of two masks."]
3472 #[inline(always)]
3473 fn bitand(self, rhs: Self) -> Self::Output {
3474 self.simd.and_mask8x32(self, rhs)
3475 }
3476}
3477impl<S: Simd> core::ops::BitAndAssign for mask8x32<S> {
3478 #[doc = "Compute the logical AND of two masks."]
3479 #[inline(always)]
3480 fn bitand_assign(&mut self, rhs: Self) {
3481 *self = self.simd.and_mask8x32(*self, rhs);
3482 }
3483}
3484impl<S: Simd> core::ops::BitOr for mask8x32<S> {
3485 type Output = Self;
3486 #[doc = "Compute the logical OR of two masks."]
3487 #[inline(always)]
3488 fn bitor(self, rhs: Self) -> Self::Output {
3489 self.simd.or_mask8x32(self, rhs)
3490 }
3491}
3492impl<S: Simd> core::ops::BitOrAssign for mask8x32<S> {
3493 #[doc = "Compute the logical OR of two masks."]
3494 #[inline(always)]
3495 fn bitor_assign(&mut self, rhs: Self) {
3496 *self = self.simd.or_mask8x32(*self, rhs);
3497 }
3498}
3499impl<S: Simd> core::ops::BitXor for mask8x32<S> {
3500 type Output = Self;
3501 #[doc = "Compute the logical XOR of two masks."]
3502 #[inline(always)]
3503 fn bitxor(self, rhs: Self) -> Self::Output {
3504 self.simd.xor_mask8x32(self, rhs)
3505 }
3506}
3507impl<S: Simd> core::ops::BitXorAssign for mask8x32<S> {
3508 #[doc = "Compute the logical XOR of two masks."]
3509 #[inline(always)]
3510 fn bitxor_assign(&mut self, rhs: Self) {
3511 *self = self.simd.xor_mask8x32(*self, rhs);
3512 }
3513}
3514impl<S: Simd> core::ops::Not for mask8x32<S> {
3515 type Output = Self;
3516 #[doc = "Compute the logical NOT of the mask."]
3517 #[inline(always)]
3518 fn not(self) -> Self::Output {
3519 self.simd.not_mask8x32(self)
3520 }
3521}
3522impl<S: Simd> core::ops::Neg for i16x16<S> {
3523 type Output = Self;
3524 #[doc = "Negate each element of the vector, wrapping on overflow."]
3525 #[inline(always)]
3526 fn neg(self) -> Self::Output {
3527 self.simd.neg_i16x16(self)
3528 }
3529}
3530impl<S: Simd> core::ops::Add for i16x16<S> {
3531 type Output = Self;
3532 #[doc = "Add two vectors element-wise, wrapping on overflow."]
3533 #[inline(always)]
3534 fn add(self, rhs: Self) -> Self::Output {
3535 self.simd.add_i16x16(self, rhs)
3536 }
3537}
3538impl<S: Simd> core::ops::AddAssign for i16x16<S> {
3539 #[doc = "Add two vectors element-wise, wrapping on overflow."]
3540 #[inline(always)]
3541 fn add_assign(&mut self, rhs: Self) {
3542 *self = self.simd.add_i16x16(*self, rhs);
3543 }
3544}
3545impl<S: Simd> core::ops::Add<i16> for i16x16<S> {
3546 type Output = Self;
3547 #[inline(always)]
3548 fn add(self, rhs: i16) -> Self::Output {
3549 self.simd.add_i16x16(self, rhs.simd_into(self.simd))
3550 }
3551}
3552impl<S: Simd> core::ops::AddAssign<i16> for i16x16<S> {
3553 #[inline(always)]
3554 fn add_assign(&mut self, rhs: i16) {
3555 *self = self.simd.add_i16x16(*self, rhs.simd_into(self.simd));
3556 }
3557}
3558impl<S: Simd> core::ops::Add<i16x16<S>> for i16 {
3559 type Output = i16x16<S>;
3560 #[inline(always)]
3561 fn add(self, rhs: i16x16<S>) -> Self::Output {
3562 rhs.simd.add_i16x16(self.simd_into(rhs.simd), rhs)
3563 }
3564}
3565impl<S: Simd> core::ops::Sub for i16x16<S> {
3566 type Output = Self;
3567 #[doc = "Subtract two vectors element-wise, wrapping on overflow."]
3568 #[inline(always)]
3569 fn sub(self, rhs: Self) -> Self::Output {
3570 self.simd.sub_i16x16(self, rhs)
3571 }
3572}
3573impl<S: Simd> core::ops::SubAssign for i16x16<S> {
3574 #[doc = "Subtract two vectors element-wise, wrapping on overflow."]
3575 #[inline(always)]
3576 fn sub_assign(&mut self, rhs: Self) {
3577 *self = self.simd.sub_i16x16(*self, rhs);
3578 }
3579}
3580impl<S: Simd> core::ops::Sub<i16> for i16x16<S> {
3581 type Output = Self;
3582 #[inline(always)]
3583 fn sub(self, rhs: i16) -> Self::Output {
3584 self.simd.sub_i16x16(self, rhs.simd_into(self.simd))
3585 }
3586}
3587impl<S: Simd> core::ops::SubAssign<i16> for i16x16<S> {
3588 #[inline(always)]
3589 fn sub_assign(&mut self, rhs: i16) {
3590 *self = self.simd.sub_i16x16(*self, rhs.simd_into(self.simd));
3591 }
3592}
3593impl<S: Simd> core::ops::Sub<i16x16<S>> for i16 {
3594 type Output = i16x16<S>;
3595 #[inline(always)]
3596 fn sub(self, rhs: i16x16<S>) -> Self::Output {
3597 rhs.simd.sub_i16x16(self.simd_into(rhs.simd), rhs)
3598 }
3599}
3600impl<S: Simd> core::ops::Mul for i16x16<S> {
3601 type Output = Self;
3602 #[doc = "Multiply two vectors element-wise, wrapping on overflow."]
3603 #[inline(always)]
3604 fn mul(self, rhs: Self) -> Self::Output {
3605 self.simd.mul_i16x16(self, rhs)
3606 }
3607}
3608impl<S: Simd> core::ops::MulAssign for i16x16<S> {
3609 #[doc = "Multiply two vectors element-wise, wrapping on overflow."]
3610 #[inline(always)]
3611 fn mul_assign(&mut self, rhs: Self) {
3612 *self = self.simd.mul_i16x16(*self, rhs);
3613 }
3614}
3615impl<S: Simd> core::ops::Mul<i16> for i16x16<S> {
3616 type Output = Self;
3617 #[inline(always)]
3618 fn mul(self, rhs: i16) -> Self::Output {
3619 self.simd.mul_i16x16(self, rhs.simd_into(self.simd))
3620 }
3621}
3622impl<S: Simd> core::ops::MulAssign<i16> for i16x16<S> {
3623 #[inline(always)]
3624 fn mul_assign(&mut self, rhs: i16) {
3625 *self = self.simd.mul_i16x16(*self, rhs.simd_into(self.simd));
3626 }
3627}
3628impl<S: Simd> core::ops::Mul<i16x16<S>> for i16 {
3629 type Output = i16x16<S>;
3630 #[inline(always)]
3631 fn mul(self, rhs: i16x16<S>) -> Self::Output {
3632 rhs.simd.mul_i16x16(self.simd_into(rhs.simd), rhs)
3633 }
3634}
3635impl<S: Simd> core::ops::BitAnd for i16x16<S> {
3636 type Output = Self;
3637 #[doc = "Compute the bitwise AND of two vectors."]
3638 #[inline(always)]
3639 fn bitand(self, rhs: Self) -> Self::Output {
3640 self.simd.and_i16x16(self, rhs)
3641 }
3642}
3643impl<S: Simd> core::ops::BitAndAssign for i16x16<S> {
3644 #[doc = "Compute the bitwise AND of two vectors."]
3645 #[inline(always)]
3646 fn bitand_assign(&mut self, rhs: Self) {
3647 *self = self.simd.and_i16x16(*self, rhs);
3648 }
3649}
3650impl<S: Simd> core::ops::BitAnd<i16> for i16x16<S> {
3651 type Output = Self;
3652 #[inline(always)]
3653 fn bitand(self, rhs: i16) -> Self::Output {
3654 self.simd.and_i16x16(self, rhs.simd_into(self.simd))
3655 }
3656}
3657impl<S: Simd> core::ops::BitAndAssign<i16> for i16x16<S> {
3658 #[inline(always)]
3659 fn bitand_assign(&mut self, rhs: i16) {
3660 *self = self.simd.and_i16x16(*self, rhs.simd_into(self.simd));
3661 }
3662}
3663impl<S: Simd> core::ops::BitAnd<i16x16<S>> for i16 {
3664 type Output = i16x16<S>;
3665 #[inline(always)]
3666 fn bitand(self, rhs: i16x16<S>) -> Self::Output {
3667 rhs.simd.and_i16x16(self.simd_into(rhs.simd), rhs)
3668 }
3669}
3670impl<S: Simd> core::ops::BitOr for i16x16<S> {
3671 type Output = Self;
3672 #[doc = "Compute the bitwise OR of two vectors."]
3673 #[inline(always)]
3674 fn bitor(self, rhs: Self) -> Self::Output {
3675 self.simd.or_i16x16(self, rhs)
3676 }
3677}
3678impl<S: Simd> core::ops::BitOrAssign for i16x16<S> {
3679 #[doc = "Compute the bitwise OR of two vectors."]
3680 #[inline(always)]
3681 fn bitor_assign(&mut self, rhs: Self) {
3682 *self = self.simd.or_i16x16(*self, rhs);
3683 }
3684}
3685impl<S: Simd> core::ops::BitOr<i16> for i16x16<S> {
3686 type Output = Self;
3687 #[inline(always)]
3688 fn bitor(self, rhs: i16) -> Self::Output {
3689 self.simd.or_i16x16(self, rhs.simd_into(self.simd))
3690 }
3691}
3692impl<S: Simd> core::ops::BitOrAssign<i16> for i16x16<S> {
3693 #[inline(always)]
3694 fn bitor_assign(&mut self, rhs: i16) {
3695 *self = self.simd.or_i16x16(*self, rhs.simd_into(self.simd));
3696 }
3697}
3698impl<S: Simd> core::ops::BitOr<i16x16<S>> for i16 {
3699 type Output = i16x16<S>;
3700 #[inline(always)]
3701 fn bitor(self, rhs: i16x16<S>) -> Self::Output {
3702 rhs.simd.or_i16x16(self.simd_into(rhs.simd), rhs)
3703 }
3704}
3705impl<S: Simd> core::ops::BitXor for i16x16<S> {
3706 type Output = Self;
3707 #[doc = "Compute the bitwise XOR of two vectors."]
3708 #[inline(always)]
3709 fn bitxor(self, rhs: Self) -> Self::Output {
3710 self.simd.xor_i16x16(self, rhs)
3711 }
3712}
3713impl<S: Simd> core::ops::BitXorAssign for i16x16<S> {
3714 #[doc = "Compute the bitwise XOR of two vectors."]
3715 #[inline(always)]
3716 fn bitxor_assign(&mut self, rhs: Self) {
3717 *self = self.simd.xor_i16x16(*self, rhs);
3718 }
3719}
3720impl<S: Simd> core::ops::BitXor<i16> for i16x16<S> {
3721 type Output = Self;
3722 #[inline(always)]
3723 fn bitxor(self, rhs: i16) -> Self::Output {
3724 self.simd.xor_i16x16(self, rhs.simd_into(self.simd))
3725 }
3726}
3727impl<S: Simd> core::ops::BitXorAssign<i16> for i16x16<S> {
3728 #[inline(always)]
3729 fn bitxor_assign(&mut self, rhs: i16) {
3730 *self = self.simd.xor_i16x16(*self, rhs.simd_into(self.simd));
3731 }
3732}
3733impl<S: Simd> core::ops::BitXor<i16x16<S>> for i16 {
3734 type Output = i16x16<S>;
3735 #[inline(always)]
3736 fn bitxor(self, rhs: i16x16<S>) -> Self::Output {
3737 rhs.simd.xor_i16x16(self.simd_into(rhs.simd), rhs)
3738 }
3739}
3740impl<S: Simd> core::ops::Not for i16x16<S> {
3741 type Output = Self;
3742 #[doc = "Compute the bitwise NOT of the vector."]
3743 #[inline(always)]
3744 fn not(self) -> Self::Output {
3745 self.simd.not_i16x16(self)
3746 }
3747}
3748impl<S: Simd> core::ops::Shl<u32> for i16x16<S> {
3749 type Output = Self;
3750 #[doc = "Shift each element left by the given number of bits.\n\nBits shifted out of the left side are discarded, and zeros are shifted in on the right.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform."]
3751 #[inline(always)]
3752 fn shl(self, rhs: u32) -> Self::Output {
3753 self.simd.shl_i16x16(self, rhs)
3754 }
3755}
3756impl<S: Simd> core::ops::ShlAssign<u32> for i16x16<S> {
3757 #[inline(always)]
3758 fn shl_assign(&mut self, rhs: u32) {
3759 *self = self.simd.shl_i16x16(*self, rhs);
3760 }
3761}
3762impl<S: Simd> core::ops::Shl for i16x16<S> {
3763 type Output = Self;
3764 #[doc = "Shift each element left by the given number of bits.\n\nBits shifted out of the left side are discarded, and zeros are shifted in on the right.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform.\n\n# Performance\nThis per-lane shift is slower than shifting the entire vector by a scalar. It is not vectorized at all on WebAssembly, SSE4.2, and for `u8` and `i8` elements on AVX2. Prefer shifting by a single scalar value instead of by a vector whenever possible."]
3765 #[inline(always)]
3766 fn shl(self, rhs: Self) -> Self::Output {
3767 self.simd.shlv_i16x16(self, rhs)
3768 }
3769}
3770impl<S: Simd> core::ops::ShlAssign for i16x16<S> {
3771 #[doc = "Shift each element left by the given number of bits.\n\nBits shifted out of the left side are discarded, and zeros are shifted in on the right.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform.\n\n# Performance\nThis per-lane shift is slower than shifting the entire vector by a scalar. It is not vectorized at all on WebAssembly, SSE4.2, and for `u8` and `i8` elements on AVX2. Prefer shifting by a single scalar value instead of by a vector whenever possible."]
3772 #[inline(always)]
3773 fn shl_assign(&mut self, rhs: Self) {
3774 *self = self.simd.shlv_i16x16(*self, rhs);
3775 }
3776}
3777impl<S: Simd> core::ops::Shr<u32> for i16x16<S> {
3778 type Output = Self;
3779 #[doc = "Shift each element right by the given number of bits.\n\nFor unsigned integers, zeros are shifted in on the left. For signed integers, the sign bit is replicated.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform."]
3780 #[inline(always)]
3781 fn shr(self, rhs: u32) -> Self::Output {
3782 self.simd.shr_i16x16(self, rhs)
3783 }
3784}
3785impl<S: Simd> core::ops::ShrAssign<u32> for i16x16<S> {
3786 #[inline(always)]
3787 fn shr_assign(&mut self, rhs: u32) {
3788 *self = self.simd.shr_i16x16(*self, rhs);
3789 }
3790}
3791impl<S: Simd> core::ops::Shr for i16x16<S> {
3792 type Output = Self;
3793 #[doc = "Shift each element right by the corresponding element in another vector.\n\nFor unsigned integers, zeros are shifted in on the left. For signed integers, the sign bit is replicated.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform.\n\n# Performance\nThis per-lane shift is slower than shifting the entire vector by a scalar. It is not vectorized at all on WebAssembly, SSE4.2, and for `u8` and `i8` elements on AVX2. Prefer shifting by a single scalar value instead of by a vector whenever possible."]
3794 #[inline(always)]
3795 fn shr(self, rhs: Self) -> Self::Output {
3796 self.simd.shrv_i16x16(self, rhs)
3797 }
3798}
3799impl<S: Simd> core::ops::ShrAssign for i16x16<S> {
3800 #[doc = "Shift each element right by the corresponding element in another vector.\n\nFor unsigned integers, zeros are shifted in on the left. For signed integers, the sign bit is replicated.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform.\n\n# Performance\nThis per-lane shift is slower than shifting the entire vector by a scalar. It is not vectorized at all on WebAssembly, SSE4.2, and for `u8` and `i8` elements on AVX2. Prefer shifting by a single scalar value instead of by a vector whenever possible."]
3801 #[inline(always)]
3802 fn shr_assign(&mut self, rhs: Self) {
3803 *self = self.simd.shrv_i16x16(*self, rhs);
3804 }
3805}
3806impl<S: Simd> core::ops::Add for u16x16<S> {
3807 type Output = Self;
3808 #[doc = "Add two vectors element-wise, wrapping on overflow."]
3809 #[inline(always)]
3810 fn add(self, rhs: Self) -> Self::Output {
3811 self.simd.add_u16x16(self, rhs)
3812 }
3813}
3814impl<S: Simd> core::ops::AddAssign for u16x16<S> {
3815 #[doc = "Add two vectors element-wise, wrapping on overflow."]
3816 #[inline(always)]
3817 fn add_assign(&mut self, rhs: Self) {
3818 *self = self.simd.add_u16x16(*self, rhs);
3819 }
3820}
3821impl<S: Simd> core::ops::Add<u16> for u16x16<S> {
3822 type Output = Self;
3823 #[inline(always)]
3824 fn add(self, rhs: u16) -> Self::Output {
3825 self.simd.add_u16x16(self, rhs.simd_into(self.simd))
3826 }
3827}
3828impl<S: Simd> core::ops::AddAssign<u16> for u16x16<S> {
3829 #[inline(always)]
3830 fn add_assign(&mut self, rhs: u16) {
3831 *self = self.simd.add_u16x16(*self, rhs.simd_into(self.simd));
3832 }
3833}
3834impl<S: Simd> core::ops::Add<u16x16<S>> for u16 {
3835 type Output = u16x16<S>;
3836 #[inline(always)]
3837 fn add(self, rhs: u16x16<S>) -> Self::Output {
3838 rhs.simd.add_u16x16(self.simd_into(rhs.simd), rhs)
3839 }
3840}
3841impl<S: Simd> core::ops::Sub for u16x16<S> {
3842 type Output = Self;
3843 #[doc = "Subtract two vectors element-wise, wrapping on overflow."]
3844 #[inline(always)]
3845 fn sub(self, rhs: Self) -> Self::Output {
3846 self.simd.sub_u16x16(self, rhs)
3847 }
3848}
3849impl<S: Simd> core::ops::SubAssign for u16x16<S> {
3850 #[doc = "Subtract two vectors element-wise, wrapping on overflow."]
3851 #[inline(always)]
3852 fn sub_assign(&mut self, rhs: Self) {
3853 *self = self.simd.sub_u16x16(*self, rhs);
3854 }
3855}
3856impl<S: Simd> core::ops::Sub<u16> for u16x16<S> {
3857 type Output = Self;
3858 #[inline(always)]
3859 fn sub(self, rhs: u16) -> Self::Output {
3860 self.simd.sub_u16x16(self, rhs.simd_into(self.simd))
3861 }
3862}
3863impl<S: Simd> core::ops::SubAssign<u16> for u16x16<S> {
3864 #[inline(always)]
3865 fn sub_assign(&mut self, rhs: u16) {
3866 *self = self.simd.sub_u16x16(*self, rhs.simd_into(self.simd));
3867 }
3868}
3869impl<S: Simd> core::ops::Sub<u16x16<S>> for u16 {
3870 type Output = u16x16<S>;
3871 #[inline(always)]
3872 fn sub(self, rhs: u16x16<S>) -> Self::Output {
3873 rhs.simd.sub_u16x16(self.simd_into(rhs.simd), rhs)
3874 }
3875}
3876impl<S: Simd> core::ops::Mul for u16x16<S> {
3877 type Output = Self;
3878 #[doc = "Multiply two vectors element-wise, wrapping on overflow."]
3879 #[inline(always)]
3880 fn mul(self, rhs: Self) -> Self::Output {
3881 self.simd.mul_u16x16(self, rhs)
3882 }
3883}
3884impl<S: Simd> core::ops::MulAssign for u16x16<S> {
3885 #[doc = "Multiply two vectors element-wise, wrapping on overflow."]
3886 #[inline(always)]
3887 fn mul_assign(&mut self, rhs: Self) {
3888 *self = self.simd.mul_u16x16(*self, rhs);
3889 }
3890}
3891impl<S: Simd> core::ops::Mul<u16> for u16x16<S> {
3892 type Output = Self;
3893 #[inline(always)]
3894 fn mul(self, rhs: u16) -> Self::Output {
3895 self.simd.mul_u16x16(self, rhs.simd_into(self.simd))
3896 }
3897}
3898impl<S: Simd> core::ops::MulAssign<u16> for u16x16<S> {
3899 #[inline(always)]
3900 fn mul_assign(&mut self, rhs: u16) {
3901 *self = self.simd.mul_u16x16(*self, rhs.simd_into(self.simd));
3902 }
3903}
3904impl<S: Simd> core::ops::Mul<u16x16<S>> for u16 {
3905 type Output = u16x16<S>;
3906 #[inline(always)]
3907 fn mul(self, rhs: u16x16<S>) -> Self::Output {
3908 rhs.simd.mul_u16x16(self.simd_into(rhs.simd), rhs)
3909 }
3910}
3911impl<S: Simd> core::ops::BitAnd for u16x16<S> {
3912 type Output = Self;
3913 #[doc = "Compute the bitwise AND of two vectors."]
3914 #[inline(always)]
3915 fn bitand(self, rhs: Self) -> Self::Output {
3916 self.simd.and_u16x16(self, rhs)
3917 }
3918}
3919impl<S: Simd> core::ops::BitAndAssign for u16x16<S> {
3920 #[doc = "Compute the bitwise AND of two vectors."]
3921 #[inline(always)]
3922 fn bitand_assign(&mut self, rhs: Self) {
3923 *self = self.simd.and_u16x16(*self, rhs);
3924 }
3925}
3926impl<S: Simd> core::ops::BitAnd<u16> for u16x16<S> {
3927 type Output = Self;
3928 #[inline(always)]
3929 fn bitand(self, rhs: u16) -> Self::Output {
3930 self.simd.and_u16x16(self, rhs.simd_into(self.simd))
3931 }
3932}
3933impl<S: Simd> core::ops::BitAndAssign<u16> for u16x16<S> {
3934 #[inline(always)]
3935 fn bitand_assign(&mut self, rhs: u16) {
3936 *self = self.simd.and_u16x16(*self, rhs.simd_into(self.simd));
3937 }
3938}
3939impl<S: Simd> core::ops::BitAnd<u16x16<S>> for u16 {
3940 type Output = u16x16<S>;
3941 #[inline(always)]
3942 fn bitand(self, rhs: u16x16<S>) -> Self::Output {
3943 rhs.simd.and_u16x16(self.simd_into(rhs.simd), rhs)
3944 }
3945}
3946impl<S: Simd> core::ops::BitOr for u16x16<S> {
3947 type Output = Self;
3948 #[doc = "Compute the bitwise OR of two vectors."]
3949 #[inline(always)]
3950 fn bitor(self, rhs: Self) -> Self::Output {
3951 self.simd.or_u16x16(self, rhs)
3952 }
3953}
3954impl<S: Simd> core::ops::BitOrAssign for u16x16<S> {
3955 #[doc = "Compute the bitwise OR of two vectors."]
3956 #[inline(always)]
3957 fn bitor_assign(&mut self, rhs: Self) {
3958 *self = self.simd.or_u16x16(*self, rhs);
3959 }
3960}
3961impl<S: Simd> core::ops::BitOr<u16> for u16x16<S> {
3962 type Output = Self;
3963 #[inline(always)]
3964 fn bitor(self, rhs: u16) -> Self::Output {
3965 self.simd.or_u16x16(self, rhs.simd_into(self.simd))
3966 }
3967}
3968impl<S: Simd> core::ops::BitOrAssign<u16> for u16x16<S> {
3969 #[inline(always)]
3970 fn bitor_assign(&mut self, rhs: u16) {
3971 *self = self.simd.or_u16x16(*self, rhs.simd_into(self.simd));
3972 }
3973}
3974impl<S: Simd> core::ops::BitOr<u16x16<S>> for u16 {
3975 type Output = u16x16<S>;
3976 #[inline(always)]
3977 fn bitor(self, rhs: u16x16<S>) -> Self::Output {
3978 rhs.simd.or_u16x16(self.simd_into(rhs.simd), rhs)
3979 }
3980}
3981impl<S: Simd> core::ops::BitXor for u16x16<S> {
3982 type Output = Self;
3983 #[doc = "Compute the bitwise XOR of two vectors."]
3984 #[inline(always)]
3985 fn bitxor(self, rhs: Self) -> Self::Output {
3986 self.simd.xor_u16x16(self, rhs)
3987 }
3988}
3989impl<S: Simd> core::ops::BitXorAssign for u16x16<S> {
3990 #[doc = "Compute the bitwise XOR of two vectors."]
3991 #[inline(always)]
3992 fn bitxor_assign(&mut self, rhs: Self) {
3993 *self = self.simd.xor_u16x16(*self, rhs);
3994 }
3995}
3996impl<S: Simd> core::ops::BitXor<u16> for u16x16<S> {
3997 type Output = Self;
3998 #[inline(always)]
3999 fn bitxor(self, rhs: u16) -> Self::Output {
4000 self.simd.xor_u16x16(self, rhs.simd_into(self.simd))
4001 }
4002}
4003impl<S: Simd> core::ops::BitXorAssign<u16> for u16x16<S> {
4004 #[inline(always)]
4005 fn bitxor_assign(&mut self, rhs: u16) {
4006 *self = self.simd.xor_u16x16(*self, rhs.simd_into(self.simd));
4007 }
4008}
4009impl<S: Simd> core::ops::BitXor<u16x16<S>> for u16 {
4010 type Output = u16x16<S>;
4011 #[inline(always)]
4012 fn bitxor(self, rhs: u16x16<S>) -> Self::Output {
4013 rhs.simd.xor_u16x16(self.simd_into(rhs.simd), rhs)
4014 }
4015}
4016impl<S: Simd> core::ops::Not for u16x16<S> {
4017 type Output = Self;
4018 #[doc = "Compute the bitwise NOT of the vector."]
4019 #[inline(always)]
4020 fn not(self) -> Self::Output {
4021 self.simd.not_u16x16(self)
4022 }
4023}
4024impl<S: Simd> core::ops::Shl<u32> for u16x16<S> {
4025 type Output = Self;
4026 #[doc = "Shift each element left by the given number of bits.\n\nBits shifted out of the left side are discarded, and zeros are shifted in on the right.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform."]
4027 #[inline(always)]
4028 fn shl(self, rhs: u32) -> Self::Output {
4029 self.simd.shl_u16x16(self, rhs)
4030 }
4031}
4032impl<S: Simd> core::ops::ShlAssign<u32> for u16x16<S> {
4033 #[inline(always)]
4034 fn shl_assign(&mut self, rhs: u32) {
4035 *self = self.simd.shl_u16x16(*self, rhs);
4036 }
4037}
4038impl<S: Simd> core::ops::Shl for u16x16<S> {
4039 type Output = Self;
4040 #[doc = "Shift each element left by the given number of bits.\n\nBits shifted out of the left side are discarded, and zeros are shifted in on the right.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform.\n\n# Performance\nThis per-lane shift is slower than shifting the entire vector by a scalar. It is not vectorized at all on WebAssembly, SSE4.2, and for `u8` and `i8` elements on AVX2. Prefer shifting by a single scalar value instead of by a vector whenever possible."]
4041 #[inline(always)]
4042 fn shl(self, rhs: Self) -> Self::Output {
4043 self.simd.shlv_u16x16(self, rhs)
4044 }
4045}
4046impl<S: Simd> core::ops::ShlAssign for u16x16<S> {
4047 #[doc = "Shift each element left by the given number of bits.\n\nBits shifted out of the left side are discarded, and zeros are shifted in on the right.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform.\n\n# Performance\nThis per-lane shift is slower than shifting the entire vector by a scalar. It is not vectorized at all on WebAssembly, SSE4.2, and for `u8` and `i8` elements on AVX2. Prefer shifting by a single scalar value instead of by a vector whenever possible."]
4048 #[inline(always)]
4049 fn shl_assign(&mut self, rhs: Self) {
4050 *self = self.simd.shlv_u16x16(*self, rhs);
4051 }
4052}
4053impl<S: Simd> core::ops::Shr<u32> for u16x16<S> {
4054 type Output = Self;
4055 #[doc = "Shift each element right by the given number of bits.\n\nFor unsigned integers, zeros are shifted in on the left. For signed integers, the sign bit is replicated.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform."]
4056 #[inline(always)]
4057 fn shr(self, rhs: u32) -> Self::Output {
4058 self.simd.shr_u16x16(self, rhs)
4059 }
4060}
4061impl<S: Simd> core::ops::ShrAssign<u32> for u16x16<S> {
4062 #[inline(always)]
4063 fn shr_assign(&mut self, rhs: u32) {
4064 *self = self.simd.shr_u16x16(*self, rhs);
4065 }
4066}
4067impl<S: Simd> core::ops::Shr for u16x16<S> {
4068 type Output = Self;
4069 #[doc = "Shift each element right by the corresponding element in another vector.\n\nFor unsigned integers, zeros are shifted in on the left. For signed integers, the sign bit is replicated.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform.\n\n# Performance\nThis per-lane shift is slower than shifting the entire vector by a scalar. It is not vectorized at all on WebAssembly, SSE4.2, and for `u8` and `i8` elements on AVX2. Prefer shifting by a single scalar value instead of by a vector whenever possible."]
4070 #[inline(always)]
4071 fn shr(self, rhs: Self) -> Self::Output {
4072 self.simd.shrv_u16x16(self, rhs)
4073 }
4074}
4075impl<S: Simd> core::ops::ShrAssign for u16x16<S> {
4076 #[doc = "Shift each element right by the corresponding element in another vector.\n\nFor unsigned integers, zeros are shifted in on the left. For signed integers, the sign bit is replicated.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform.\n\n# Performance\nThis per-lane shift is slower than shifting the entire vector by a scalar. It is not vectorized at all on WebAssembly, SSE4.2, and for `u8` and `i8` elements on AVX2. Prefer shifting by a single scalar value instead of by a vector whenever possible."]
4077 #[inline(always)]
4078 fn shr_assign(&mut self, rhs: Self) {
4079 *self = self.simd.shrv_u16x16(*self, rhs);
4080 }
4081}
4082impl<S: Simd> core::ops::BitAnd for mask16x16<S> {
4083 type Output = Self;
4084 #[doc = "Compute the logical AND of two masks."]
4085 #[inline(always)]
4086 fn bitand(self, rhs: Self) -> Self::Output {
4087 self.simd.and_mask16x16(self, rhs)
4088 }
4089}
4090impl<S: Simd> core::ops::BitAndAssign for mask16x16<S> {
4091 #[doc = "Compute the logical AND of two masks."]
4092 #[inline(always)]
4093 fn bitand_assign(&mut self, rhs: Self) {
4094 *self = self.simd.and_mask16x16(*self, rhs);
4095 }
4096}
4097impl<S: Simd> core::ops::BitOr for mask16x16<S> {
4098 type Output = Self;
4099 #[doc = "Compute the logical OR of two masks."]
4100 #[inline(always)]
4101 fn bitor(self, rhs: Self) -> Self::Output {
4102 self.simd.or_mask16x16(self, rhs)
4103 }
4104}
4105impl<S: Simd> core::ops::BitOrAssign for mask16x16<S> {
4106 #[doc = "Compute the logical OR of two masks."]
4107 #[inline(always)]
4108 fn bitor_assign(&mut self, rhs: Self) {
4109 *self = self.simd.or_mask16x16(*self, rhs);
4110 }
4111}
4112impl<S: Simd> core::ops::BitXor for mask16x16<S> {
4113 type Output = Self;
4114 #[doc = "Compute the logical XOR of two masks."]
4115 #[inline(always)]
4116 fn bitxor(self, rhs: Self) -> Self::Output {
4117 self.simd.xor_mask16x16(self, rhs)
4118 }
4119}
4120impl<S: Simd> core::ops::BitXorAssign for mask16x16<S> {
4121 #[doc = "Compute the logical XOR of two masks."]
4122 #[inline(always)]
4123 fn bitxor_assign(&mut self, rhs: Self) {
4124 *self = self.simd.xor_mask16x16(*self, rhs);
4125 }
4126}
4127impl<S: Simd> core::ops::Not for mask16x16<S> {
4128 type Output = Self;
4129 #[doc = "Compute the logical NOT of the mask."]
4130 #[inline(always)]
4131 fn not(self) -> Self::Output {
4132 self.simd.not_mask16x16(self)
4133 }
4134}
4135impl<S: Simd> core::ops::Neg for i32x8<S> {
4136 type Output = Self;
4137 #[doc = "Negate each element of the vector, wrapping on overflow."]
4138 #[inline(always)]
4139 fn neg(self) -> Self::Output {
4140 self.simd.neg_i32x8(self)
4141 }
4142}
4143impl<S: Simd> core::ops::Add for i32x8<S> {
4144 type Output = Self;
4145 #[doc = "Add two vectors element-wise, wrapping on overflow."]
4146 #[inline(always)]
4147 fn add(self, rhs: Self) -> Self::Output {
4148 self.simd.add_i32x8(self, rhs)
4149 }
4150}
4151impl<S: Simd> core::ops::AddAssign for i32x8<S> {
4152 #[doc = "Add two vectors element-wise, wrapping on overflow."]
4153 #[inline(always)]
4154 fn add_assign(&mut self, rhs: Self) {
4155 *self = self.simd.add_i32x8(*self, rhs);
4156 }
4157}
4158impl<S: Simd> core::ops::Add<i32> for i32x8<S> {
4159 type Output = Self;
4160 #[inline(always)]
4161 fn add(self, rhs: i32) -> Self::Output {
4162 self.simd.add_i32x8(self, rhs.simd_into(self.simd))
4163 }
4164}
4165impl<S: Simd> core::ops::AddAssign<i32> for i32x8<S> {
4166 #[inline(always)]
4167 fn add_assign(&mut self, rhs: i32) {
4168 *self = self.simd.add_i32x8(*self, rhs.simd_into(self.simd));
4169 }
4170}
4171impl<S: Simd> core::ops::Add<i32x8<S>> for i32 {
4172 type Output = i32x8<S>;
4173 #[inline(always)]
4174 fn add(self, rhs: i32x8<S>) -> Self::Output {
4175 rhs.simd.add_i32x8(self.simd_into(rhs.simd), rhs)
4176 }
4177}
4178impl<S: Simd> core::ops::Sub for i32x8<S> {
4179 type Output = Self;
4180 #[doc = "Subtract two vectors element-wise, wrapping on overflow."]
4181 #[inline(always)]
4182 fn sub(self, rhs: Self) -> Self::Output {
4183 self.simd.sub_i32x8(self, rhs)
4184 }
4185}
4186impl<S: Simd> core::ops::SubAssign for i32x8<S> {
4187 #[doc = "Subtract two vectors element-wise, wrapping on overflow."]
4188 #[inline(always)]
4189 fn sub_assign(&mut self, rhs: Self) {
4190 *self = self.simd.sub_i32x8(*self, rhs);
4191 }
4192}
4193impl<S: Simd> core::ops::Sub<i32> for i32x8<S> {
4194 type Output = Self;
4195 #[inline(always)]
4196 fn sub(self, rhs: i32) -> Self::Output {
4197 self.simd.sub_i32x8(self, rhs.simd_into(self.simd))
4198 }
4199}
4200impl<S: Simd> core::ops::SubAssign<i32> for i32x8<S> {
4201 #[inline(always)]
4202 fn sub_assign(&mut self, rhs: i32) {
4203 *self = self.simd.sub_i32x8(*self, rhs.simd_into(self.simd));
4204 }
4205}
4206impl<S: Simd> core::ops::Sub<i32x8<S>> for i32 {
4207 type Output = i32x8<S>;
4208 #[inline(always)]
4209 fn sub(self, rhs: i32x8<S>) -> Self::Output {
4210 rhs.simd.sub_i32x8(self.simd_into(rhs.simd), rhs)
4211 }
4212}
4213impl<S: Simd> core::ops::Mul for i32x8<S> {
4214 type Output = Self;
4215 #[doc = "Multiply two vectors element-wise, wrapping on overflow."]
4216 #[inline(always)]
4217 fn mul(self, rhs: Self) -> Self::Output {
4218 self.simd.mul_i32x8(self, rhs)
4219 }
4220}
4221impl<S: Simd> core::ops::MulAssign for i32x8<S> {
4222 #[doc = "Multiply two vectors element-wise, wrapping on overflow."]
4223 #[inline(always)]
4224 fn mul_assign(&mut self, rhs: Self) {
4225 *self = self.simd.mul_i32x8(*self, rhs);
4226 }
4227}
4228impl<S: Simd> core::ops::Mul<i32> for i32x8<S> {
4229 type Output = Self;
4230 #[inline(always)]
4231 fn mul(self, rhs: i32) -> Self::Output {
4232 self.simd.mul_i32x8(self, rhs.simd_into(self.simd))
4233 }
4234}
4235impl<S: Simd> core::ops::MulAssign<i32> for i32x8<S> {
4236 #[inline(always)]
4237 fn mul_assign(&mut self, rhs: i32) {
4238 *self = self.simd.mul_i32x8(*self, rhs.simd_into(self.simd));
4239 }
4240}
4241impl<S: Simd> core::ops::Mul<i32x8<S>> for i32 {
4242 type Output = i32x8<S>;
4243 #[inline(always)]
4244 fn mul(self, rhs: i32x8<S>) -> Self::Output {
4245 rhs.simd.mul_i32x8(self.simd_into(rhs.simd), rhs)
4246 }
4247}
4248impl<S: Simd> core::ops::BitAnd for i32x8<S> {
4249 type Output = Self;
4250 #[doc = "Compute the bitwise AND of two vectors."]
4251 #[inline(always)]
4252 fn bitand(self, rhs: Self) -> Self::Output {
4253 self.simd.and_i32x8(self, rhs)
4254 }
4255}
4256impl<S: Simd> core::ops::BitAndAssign for i32x8<S> {
4257 #[doc = "Compute the bitwise AND of two vectors."]
4258 #[inline(always)]
4259 fn bitand_assign(&mut self, rhs: Self) {
4260 *self = self.simd.and_i32x8(*self, rhs);
4261 }
4262}
4263impl<S: Simd> core::ops::BitAnd<i32> for i32x8<S> {
4264 type Output = Self;
4265 #[inline(always)]
4266 fn bitand(self, rhs: i32) -> Self::Output {
4267 self.simd.and_i32x8(self, rhs.simd_into(self.simd))
4268 }
4269}
4270impl<S: Simd> core::ops::BitAndAssign<i32> for i32x8<S> {
4271 #[inline(always)]
4272 fn bitand_assign(&mut self, rhs: i32) {
4273 *self = self.simd.and_i32x8(*self, rhs.simd_into(self.simd));
4274 }
4275}
4276impl<S: Simd> core::ops::BitAnd<i32x8<S>> for i32 {
4277 type Output = i32x8<S>;
4278 #[inline(always)]
4279 fn bitand(self, rhs: i32x8<S>) -> Self::Output {
4280 rhs.simd.and_i32x8(self.simd_into(rhs.simd), rhs)
4281 }
4282}
4283impl<S: Simd> core::ops::BitOr for i32x8<S> {
4284 type Output = Self;
4285 #[doc = "Compute the bitwise OR of two vectors."]
4286 #[inline(always)]
4287 fn bitor(self, rhs: Self) -> Self::Output {
4288 self.simd.or_i32x8(self, rhs)
4289 }
4290}
4291impl<S: Simd> core::ops::BitOrAssign for i32x8<S> {
4292 #[doc = "Compute the bitwise OR of two vectors."]
4293 #[inline(always)]
4294 fn bitor_assign(&mut self, rhs: Self) {
4295 *self = self.simd.or_i32x8(*self, rhs);
4296 }
4297}
4298impl<S: Simd> core::ops::BitOr<i32> for i32x8<S> {
4299 type Output = Self;
4300 #[inline(always)]
4301 fn bitor(self, rhs: i32) -> Self::Output {
4302 self.simd.or_i32x8(self, rhs.simd_into(self.simd))
4303 }
4304}
4305impl<S: Simd> core::ops::BitOrAssign<i32> for i32x8<S> {
4306 #[inline(always)]
4307 fn bitor_assign(&mut self, rhs: i32) {
4308 *self = self.simd.or_i32x8(*self, rhs.simd_into(self.simd));
4309 }
4310}
4311impl<S: Simd> core::ops::BitOr<i32x8<S>> for i32 {
4312 type Output = i32x8<S>;
4313 #[inline(always)]
4314 fn bitor(self, rhs: i32x8<S>) -> Self::Output {
4315 rhs.simd.or_i32x8(self.simd_into(rhs.simd), rhs)
4316 }
4317}
4318impl<S: Simd> core::ops::BitXor for i32x8<S> {
4319 type Output = Self;
4320 #[doc = "Compute the bitwise XOR of two vectors."]
4321 #[inline(always)]
4322 fn bitxor(self, rhs: Self) -> Self::Output {
4323 self.simd.xor_i32x8(self, rhs)
4324 }
4325}
4326impl<S: Simd> core::ops::BitXorAssign for i32x8<S> {
4327 #[doc = "Compute the bitwise XOR of two vectors."]
4328 #[inline(always)]
4329 fn bitxor_assign(&mut self, rhs: Self) {
4330 *self = self.simd.xor_i32x8(*self, rhs);
4331 }
4332}
4333impl<S: Simd> core::ops::BitXor<i32> for i32x8<S> {
4334 type Output = Self;
4335 #[inline(always)]
4336 fn bitxor(self, rhs: i32) -> Self::Output {
4337 self.simd.xor_i32x8(self, rhs.simd_into(self.simd))
4338 }
4339}
4340impl<S: Simd> core::ops::BitXorAssign<i32> for i32x8<S> {
4341 #[inline(always)]
4342 fn bitxor_assign(&mut self, rhs: i32) {
4343 *self = self.simd.xor_i32x8(*self, rhs.simd_into(self.simd));
4344 }
4345}
4346impl<S: Simd> core::ops::BitXor<i32x8<S>> for i32 {
4347 type Output = i32x8<S>;
4348 #[inline(always)]
4349 fn bitxor(self, rhs: i32x8<S>) -> Self::Output {
4350 rhs.simd.xor_i32x8(self.simd_into(rhs.simd), rhs)
4351 }
4352}
4353impl<S: Simd> core::ops::Not for i32x8<S> {
4354 type Output = Self;
4355 #[doc = "Compute the bitwise NOT of the vector."]
4356 #[inline(always)]
4357 fn not(self) -> Self::Output {
4358 self.simd.not_i32x8(self)
4359 }
4360}
4361impl<S: Simd> core::ops::Shl<u32> for i32x8<S> {
4362 type Output = Self;
4363 #[doc = "Shift each element left by the given number of bits.\n\nBits shifted out of the left side are discarded, and zeros are shifted in on the right.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform."]
4364 #[inline(always)]
4365 fn shl(self, rhs: u32) -> Self::Output {
4366 self.simd.shl_i32x8(self, rhs)
4367 }
4368}
4369impl<S: Simd> core::ops::ShlAssign<u32> for i32x8<S> {
4370 #[inline(always)]
4371 fn shl_assign(&mut self, rhs: u32) {
4372 *self = self.simd.shl_i32x8(*self, rhs);
4373 }
4374}
4375impl<S: Simd> core::ops::Shl for i32x8<S> {
4376 type Output = Self;
4377 #[doc = "Shift each element left by the given number of bits.\n\nBits shifted out of the left side are discarded, and zeros are shifted in on the right.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform.\n\n# Performance\nThis per-lane shift is slower than shifting the entire vector by a scalar. It is not vectorized at all on WebAssembly, SSE4.2, and for `u8` and `i8` elements on AVX2. Prefer shifting by a single scalar value instead of by a vector whenever possible."]
4378 #[inline(always)]
4379 fn shl(self, rhs: Self) -> Self::Output {
4380 self.simd.shlv_i32x8(self, rhs)
4381 }
4382}
4383impl<S: Simd> core::ops::ShlAssign for i32x8<S> {
4384 #[doc = "Shift each element left by the given number of bits.\n\nBits shifted out of the left side are discarded, and zeros are shifted in on the right.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform.\n\n# Performance\nThis per-lane shift is slower than shifting the entire vector by a scalar. It is not vectorized at all on WebAssembly, SSE4.2, and for `u8` and `i8` elements on AVX2. Prefer shifting by a single scalar value instead of by a vector whenever possible."]
4385 #[inline(always)]
4386 fn shl_assign(&mut self, rhs: Self) {
4387 *self = self.simd.shlv_i32x8(*self, rhs);
4388 }
4389}
4390impl<S: Simd> core::ops::Shr<u32> for i32x8<S> {
4391 type Output = Self;
4392 #[doc = "Shift each element right by the given number of bits.\n\nFor unsigned integers, zeros are shifted in on the left. For signed integers, the sign bit is replicated.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform."]
4393 #[inline(always)]
4394 fn shr(self, rhs: u32) -> Self::Output {
4395 self.simd.shr_i32x8(self, rhs)
4396 }
4397}
4398impl<S: Simd> core::ops::ShrAssign<u32> for i32x8<S> {
4399 #[inline(always)]
4400 fn shr_assign(&mut self, rhs: u32) {
4401 *self = self.simd.shr_i32x8(*self, rhs);
4402 }
4403}
4404impl<S: Simd> core::ops::Shr for i32x8<S> {
4405 type Output = Self;
4406 #[doc = "Shift each element right by the corresponding element in another vector.\n\nFor unsigned integers, zeros are shifted in on the left. For signed integers, the sign bit is replicated.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform.\n\n# Performance\nThis per-lane shift is slower than shifting the entire vector by a scalar. It is not vectorized at all on WebAssembly, SSE4.2, and for `u8` and `i8` elements on AVX2. Prefer shifting by a single scalar value instead of by a vector whenever possible."]
4407 #[inline(always)]
4408 fn shr(self, rhs: Self) -> Self::Output {
4409 self.simd.shrv_i32x8(self, rhs)
4410 }
4411}
4412impl<S: Simd> core::ops::ShrAssign for i32x8<S> {
4413 #[doc = "Shift each element right by the corresponding element in another vector.\n\nFor unsigned integers, zeros are shifted in on the left. For signed integers, the sign bit is replicated.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform.\n\n# Performance\nThis per-lane shift is slower than shifting the entire vector by a scalar. It is not vectorized at all on WebAssembly, SSE4.2, and for `u8` and `i8` elements on AVX2. Prefer shifting by a single scalar value instead of by a vector whenever possible."]
4414 #[inline(always)]
4415 fn shr_assign(&mut self, rhs: Self) {
4416 *self = self.simd.shrv_i32x8(*self, rhs);
4417 }
4418}
4419impl<S: Simd> core::ops::Add for u32x8<S> {
4420 type Output = Self;
4421 #[doc = "Add two vectors element-wise, wrapping on overflow."]
4422 #[inline(always)]
4423 fn add(self, rhs: Self) -> Self::Output {
4424 self.simd.add_u32x8(self, rhs)
4425 }
4426}
4427impl<S: Simd> core::ops::AddAssign for u32x8<S> {
4428 #[doc = "Add two vectors element-wise, wrapping on overflow."]
4429 #[inline(always)]
4430 fn add_assign(&mut self, rhs: Self) {
4431 *self = self.simd.add_u32x8(*self, rhs);
4432 }
4433}
4434impl<S: Simd> core::ops::Add<u32> for u32x8<S> {
4435 type Output = Self;
4436 #[inline(always)]
4437 fn add(self, rhs: u32) -> Self::Output {
4438 self.simd.add_u32x8(self, rhs.simd_into(self.simd))
4439 }
4440}
4441impl<S: Simd> core::ops::AddAssign<u32> for u32x8<S> {
4442 #[inline(always)]
4443 fn add_assign(&mut self, rhs: u32) {
4444 *self = self.simd.add_u32x8(*self, rhs.simd_into(self.simd));
4445 }
4446}
4447impl<S: Simd> core::ops::Add<u32x8<S>> for u32 {
4448 type Output = u32x8<S>;
4449 #[inline(always)]
4450 fn add(self, rhs: u32x8<S>) -> Self::Output {
4451 rhs.simd.add_u32x8(self.simd_into(rhs.simd), rhs)
4452 }
4453}
4454impl<S: Simd> core::ops::Sub for u32x8<S> {
4455 type Output = Self;
4456 #[doc = "Subtract two vectors element-wise, wrapping on overflow."]
4457 #[inline(always)]
4458 fn sub(self, rhs: Self) -> Self::Output {
4459 self.simd.sub_u32x8(self, rhs)
4460 }
4461}
4462impl<S: Simd> core::ops::SubAssign for u32x8<S> {
4463 #[doc = "Subtract two vectors element-wise, wrapping on overflow."]
4464 #[inline(always)]
4465 fn sub_assign(&mut self, rhs: Self) {
4466 *self = self.simd.sub_u32x8(*self, rhs);
4467 }
4468}
4469impl<S: Simd> core::ops::Sub<u32> for u32x8<S> {
4470 type Output = Self;
4471 #[inline(always)]
4472 fn sub(self, rhs: u32) -> Self::Output {
4473 self.simd.sub_u32x8(self, rhs.simd_into(self.simd))
4474 }
4475}
4476impl<S: Simd> core::ops::SubAssign<u32> for u32x8<S> {
4477 #[inline(always)]
4478 fn sub_assign(&mut self, rhs: u32) {
4479 *self = self.simd.sub_u32x8(*self, rhs.simd_into(self.simd));
4480 }
4481}
4482impl<S: Simd> core::ops::Sub<u32x8<S>> for u32 {
4483 type Output = u32x8<S>;
4484 #[inline(always)]
4485 fn sub(self, rhs: u32x8<S>) -> Self::Output {
4486 rhs.simd.sub_u32x8(self.simd_into(rhs.simd), rhs)
4487 }
4488}
4489impl<S: Simd> core::ops::Mul for u32x8<S> {
4490 type Output = Self;
4491 #[doc = "Multiply two vectors element-wise, wrapping on overflow."]
4492 #[inline(always)]
4493 fn mul(self, rhs: Self) -> Self::Output {
4494 self.simd.mul_u32x8(self, rhs)
4495 }
4496}
4497impl<S: Simd> core::ops::MulAssign for u32x8<S> {
4498 #[doc = "Multiply two vectors element-wise, wrapping on overflow."]
4499 #[inline(always)]
4500 fn mul_assign(&mut self, rhs: Self) {
4501 *self = self.simd.mul_u32x8(*self, rhs);
4502 }
4503}
4504impl<S: Simd> core::ops::Mul<u32> for u32x8<S> {
4505 type Output = Self;
4506 #[inline(always)]
4507 fn mul(self, rhs: u32) -> Self::Output {
4508 self.simd.mul_u32x8(self, rhs.simd_into(self.simd))
4509 }
4510}
4511impl<S: Simd> core::ops::MulAssign<u32> for u32x8<S> {
4512 #[inline(always)]
4513 fn mul_assign(&mut self, rhs: u32) {
4514 *self = self.simd.mul_u32x8(*self, rhs.simd_into(self.simd));
4515 }
4516}
4517impl<S: Simd> core::ops::Mul<u32x8<S>> for u32 {
4518 type Output = u32x8<S>;
4519 #[inline(always)]
4520 fn mul(self, rhs: u32x8<S>) -> Self::Output {
4521 rhs.simd.mul_u32x8(self.simd_into(rhs.simd), rhs)
4522 }
4523}
4524impl<S: Simd> core::ops::BitAnd for u32x8<S> {
4525 type Output = Self;
4526 #[doc = "Compute the bitwise AND of two vectors."]
4527 #[inline(always)]
4528 fn bitand(self, rhs: Self) -> Self::Output {
4529 self.simd.and_u32x8(self, rhs)
4530 }
4531}
4532impl<S: Simd> core::ops::BitAndAssign for u32x8<S> {
4533 #[doc = "Compute the bitwise AND of two vectors."]
4534 #[inline(always)]
4535 fn bitand_assign(&mut self, rhs: Self) {
4536 *self = self.simd.and_u32x8(*self, rhs);
4537 }
4538}
4539impl<S: Simd> core::ops::BitAnd<u32> for u32x8<S> {
4540 type Output = Self;
4541 #[inline(always)]
4542 fn bitand(self, rhs: u32) -> Self::Output {
4543 self.simd.and_u32x8(self, rhs.simd_into(self.simd))
4544 }
4545}
4546impl<S: Simd> core::ops::BitAndAssign<u32> for u32x8<S> {
4547 #[inline(always)]
4548 fn bitand_assign(&mut self, rhs: u32) {
4549 *self = self.simd.and_u32x8(*self, rhs.simd_into(self.simd));
4550 }
4551}
4552impl<S: Simd> core::ops::BitAnd<u32x8<S>> for u32 {
4553 type Output = u32x8<S>;
4554 #[inline(always)]
4555 fn bitand(self, rhs: u32x8<S>) -> Self::Output {
4556 rhs.simd.and_u32x8(self.simd_into(rhs.simd), rhs)
4557 }
4558}
4559impl<S: Simd> core::ops::BitOr for u32x8<S> {
4560 type Output = Self;
4561 #[doc = "Compute the bitwise OR of two vectors."]
4562 #[inline(always)]
4563 fn bitor(self, rhs: Self) -> Self::Output {
4564 self.simd.or_u32x8(self, rhs)
4565 }
4566}
4567impl<S: Simd> core::ops::BitOrAssign for u32x8<S> {
4568 #[doc = "Compute the bitwise OR of two vectors."]
4569 #[inline(always)]
4570 fn bitor_assign(&mut self, rhs: Self) {
4571 *self = self.simd.or_u32x8(*self, rhs);
4572 }
4573}
4574impl<S: Simd> core::ops::BitOr<u32> for u32x8<S> {
4575 type Output = Self;
4576 #[inline(always)]
4577 fn bitor(self, rhs: u32) -> Self::Output {
4578 self.simd.or_u32x8(self, rhs.simd_into(self.simd))
4579 }
4580}
4581impl<S: Simd> core::ops::BitOrAssign<u32> for u32x8<S> {
4582 #[inline(always)]
4583 fn bitor_assign(&mut self, rhs: u32) {
4584 *self = self.simd.or_u32x8(*self, rhs.simd_into(self.simd));
4585 }
4586}
4587impl<S: Simd> core::ops::BitOr<u32x8<S>> for u32 {
4588 type Output = u32x8<S>;
4589 #[inline(always)]
4590 fn bitor(self, rhs: u32x8<S>) -> Self::Output {
4591 rhs.simd.or_u32x8(self.simd_into(rhs.simd), rhs)
4592 }
4593}
4594impl<S: Simd> core::ops::BitXor for u32x8<S> {
4595 type Output = Self;
4596 #[doc = "Compute the bitwise XOR of two vectors."]
4597 #[inline(always)]
4598 fn bitxor(self, rhs: Self) -> Self::Output {
4599 self.simd.xor_u32x8(self, rhs)
4600 }
4601}
4602impl<S: Simd> core::ops::BitXorAssign for u32x8<S> {
4603 #[doc = "Compute the bitwise XOR of two vectors."]
4604 #[inline(always)]
4605 fn bitxor_assign(&mut self, rhs: Self) {
4606 *self = self.simd.xor_u32x8(*self, rhs);
4607 }
4608}
4609impl<S: Simd> core::ops::BitXor<u32> for u32x8<S> {
4610 type Output = Self;
4611 #[inline(always)]
4612 fn bitxor(self, rhs: u32) -> Self::Output {
4613 self.simd.xor_u32x8(self, rhs.simd_into(self.simd))
4614 }
4615}
4616impl<S: Simd> core::ops::BitXorAssign<u32> for u32x8<S> {
4617 #[inline(always)]
4618 fn bitxor_assign(&mut self, rhs: u32) {
4619 *self = self.simd.xor_u32x8(*self, rhs.simd_into(self.simd));
4620 }
4621}
4622impl<S: Simd> core::ops::BitXor<u32x8<S>> for u32 {
4623 type Output = u32x8<S>;
4624 #[inline(always)]
4625 fn bitxor(self, rhs: u32x8<S>) -> Self::Output {
4626 rhs.simd.xor_u32x8(self.simd_into(rhs.simd), rhs)
4627 }
4628}
4629impl<S: Simd> core::ops::Not for u32x8<S> {
4630 type Output = Self;
4631 #[doc = "Compute the bitwise NOT of the vector."]
4632 #[inline(always)]
4633 fn not(self) -> Self::Output {
4634 self.simd.not_u32x8(self)
4635 }
4636}
4637impl<S: Simd> core::ops::Shl<u32> for u32x8<S> {
4638 type Output = Self;
4639 #[doc = "Shift each element left by the given number of bits.\n\nBits shifted out of the left side are discarded, and zeros are shifted in on the right.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform."]
4640 #[inline(always)]
4641 fn shl(self, rhs: u32) -> Self::Output {
4642 self.simd.shl_u32x8(self, rhs)
4643 }
4644}
4645impl<S: Simd> core::ops::ShlAssign<u32> for u32x8<S> {
4646 #[inline(always)]
4647 fn shl_assign(&mut self, rhs: u32) {
4648 *self = self.simd.shl_u32x8(*self, rhs);
4649 }
4650}
4651impl<S: Simd> core::ops::Shl for u32x8<S> {
4652 type Output = Self;
4653 #[doc = "Shift each element left by the given number of bits.\n\nBits shifted out of the left side are discarded, and zeros are shifted in on the right.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform.\n\n# Performance\nThis per-lane shift is slower than shifting the entire vector by a scalar. It is not vectorized at all on WebAssembly, SSE4.2, and for `u8` and `i8` elements on AVX2. Prefer shifting by a single scalar value instead of by a vector whenever possible."]
4654 #[inline(always)]
4655 fn shl(self, rhs: Self) -> Self::Output {
4656 self.simd.shlv_u32x8(self, rhs)
4657 }
4658}
4659impl<S: Simd> core::ops::ShlAssign for u32x8<S> {
4660 #[doc = "Shift each element left by the given number of bits.\n\nBits shifted out of the left side are discarded, and zeros are shifted in on the right.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform.\n\n# Performance\nThis per-lane shift is slower than shifting the entire vector by a scalar. It is not vectorized at all on WebAssembly, SSE4.2, and for `u8` and `i8` elements on AVX2. Prefer shifting by a single scalar value instead of by a vector whenever possible."]
4661 #[inline(always)]
4662 fn shl_assign(&mut self, rhs: Self) {
4663 *self = self.simd.shlv_u32x8(*self, rhs);
4664 }
4665}
4666impl<S: Simd> core::ops::Shr<u32> for u32x8<S> {
4667 type Output = Self;
4668 #[doc = "Shift each element right by the given number of bits.\n\nFor unsigned integers, zeros are shifted in on the left. For signed integers, the sign bit is replicated.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform."]
4669 #[inline(always)]
4670 fn shr(self, rhs: u32) -> Self::Output {
4671 self.simd.shr_u32x8(self, rhs)
4672 }
4673}
4674impl<S: Simd> core::ops::ShrAssign<u32> for u32x8<S> {
4675 #[inline(always)]
4676 fn shr_assign(&mut self, rhs: u32) {
4677 *self = self.simd.shr_u32x8(*self, rhs);
4678 }
4679}
4680impl<S: Simd> core::ops::Shr for u32x8<S> {
4681 type Output = Self;
4682 #[doc = "Shift each element right by the corresponding element in another vector.\n\nFor unsigned integers, zeros are shifted in on the left. For signed integers, the sign bit is replicated.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform.\n\n# Performance\nThis per-lane shift is slower than shifting the entire vector by a scalar. It is not vectorized at all on WebAssembly, SSE4.2, and for `u8` and `i8` elements on AVX2. Prefer shifting by a single scalar value instead of by a vector whenever possible."]
4683 #[inline(always)]
4684 fn shr(self, rhs: Self) -> Self::Output {
4685 self.simd.shrv_u32x8(self, rhs)
4686 }
4687}
4688impl<S: Simd> core::ops::ShrAssign for u32x8<S> {
4689 #[doc = "Shift each element right by the corresponding element in another vector.\n\nFor unsigned integers, zeros are shifted in on the left. For signed integers, the sign bit is replicated.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform.\n\n# Performance\nThis per-lane shift is slower than shifting the entire vector by a scalar. It is not vectorized at all on WebAssembly, SSE4.2, and for `u8` and `i8` elements on AVX2. Prefer shifting by a single scalar value instead of by a vector whenever possible."]
4690 #[inline(always)]
4691 fn shr_assign(&mut self, rhs: Self) {
4692 *self = self.simd.shrv_u32x8(*self, rhs);
4693 }
4694}
4695impl<S: Simd> core::ops::BitAnd for mask32x8<S> {
4696 type Output = Self;
4697 #[doc = "Compute the logical AND of two masks."]
4698 #[inline(always)]
4699 fn bitand(self, rhs: Self) -> Self::Output {
4700 self.simd.and_mask32x8(self, rhs)
4701 }
4702}
4703impl<S: Simd> core::ops::BitAndAssign for mask32x8<S> {
4704 #[doc = "Compute the logical AND of two masks."]
4705 #[inline(always)]
4706 fn bitand_assign(&mut self, rhs: Self) {
4707 *self = self.simd.and_mask32x8(*self, rhs);
4708 }
4709}
4710impl<S: Simd> core::ops::BitOr for mask32x8<S> {
4711 type Output = Self;
4712 #[doc = "Compute the logical OR of two masks."]
4713 #[inline(always)]
4714 fn bitor(self, rhs: Self) -> Self::Output {
4715 self.simd.or_mask32x8(self, rhs)
4716 }
4717}
4718impl<S: Simd> core::ops::BitOrAssign for mask32x8<S> {
4719 #[doc = "Compute the logical OR of two masks."]
4720 #[inline(always)]
4721 fn bitor_assign(&mut self, rhs: Self) {
4722 *self = self.simd.or_mask32x8(*self, rhs);
4723 }
4724}
4725impl<S: Simd> core::ops::BitXor for mask32x8<S> {
4726 type Output = Self;
4727 #[doc = "Compute the logical XOR of two masks."]
4728 #[inline(always)]
4729 fn bitxor(self, rhs: Self) -> Self::Output {
4730 self.simd.xor_mask32x8(self, rhs)
4731 }
4732}
4733impl<S: Simd> core::ops::BitXorAssign for mask32x8<S> {
4734 #[doc = "Compute the logical XOR of two masks."]
4735 #[inline(always)]
4736 fn bitxor_assign(&mut self, rhs: Self) {
4737 *self = self.simd.xor_mask32x8(*self, rhs);
4738 }
4739}
4740impl<S: Simd> core::ops::Not for mask32x8<S> {
4741 type Output = Self;
4742 #[doc = "Compute the logical NOT of the mask."]
4743 #[inline(always)]
4744 fn not(self) -> Self::Output {
4745 self.simd.not_mask32x8(self)
4746 }
4747}
4748impl<S: Simd> core::ops::Neg for f64x4<S> {
4749 type Output = Self;
4750 #[doc = "Negate each element of the vector."]
4751 #[inline(always)]
4752 fn neg(self) -> Self::Output {
4753 self.simd.neg_f64x4(self)
4754 }
4755}
4756impl<S: Simd> core::ops::Add for f64x4<S> {
4757 type Output = Self;
4758 #[doc = "Add two vectors element-wise."]
4759 #[inline(always)]
4760 fn add(self, rhs: Self) -> Self::Output {
4761 self.simd.add_f64x4(self, rhs)
4762 }
4763}
4764impl<S: Simd> core::ops::AddAssign for f64x4<S> {
4765 #[doc = "Add two vectors element-wise."]
4766 #[inline(always)]
4767 fn add_assign(&mut self, rhs: Self) {
4768 *self = self.simd.add_f64x4(*self, rhs);
4769 }
4770}
4771impl<S: Simd> core::ops::Add<f64> for f64x4<S> {
4772 type Output = Self;
4773 #[inline(always)]
4774 fn add(self, rhs: f64) -> Self::Output {
4775 self.simd.add_f64x4(self, rhs.simd_into(self.simd))
4776 }
4777}
4778impl<S: Simd> core::ops::AddAssign<f64> for f64x4<S> {
4779 #[inline(always)]
4780 fn add_assign(&mut self, rhs: f64) {
4781 *self = self.simd.add_f64x4(*self, rhs.simd_into(self.simd));
4782 }
4783}
4784impl<S: Simd> core::ops::Add<f64x4<S>> for f64 {
4785 type Output = f64x4<S>;
4786 #[inline(always)]
4787 fn add(self, rhs: f64x4<S>) -> Self::Output {
4788 rhs.simd.add_f64x4(self.simd_into(rhs.simd), rhs)
4789 }
4790}
4791impl<S: Simd> core::ops::Sub for f64x4<S> {
4792 type Output = Self;
4793 #[doc = "Subtract two vectors element-wise."]
4794 #[inline(always)]
4795 fn sub(self, rhs: Self) -> Self::Output {
4796 self.simd.sub_f64x4(self, rhs)
4797 }
4798}
4799impl<S: Simd> core::ops::SubAssign for f64x4<S> {
4800 #[doc = "Subtract two vectors element-wise."]
4801 #[inline(always)]
4802 fn sub_assign(&mut self, rhs: Self) {
4803 *self = self.simd.sub_f64x4(*self, rhs);
4804 }
4805}
4806impl<S: Simd> core::ops::Sub<f64> for f64x4<S> {
4807 type Output = Self;
4808 #[inline(always)]
4809 fn sub(self, rhs: f64) -> Self::Output {
4810 self.simd.sub_f64x4(self, rhs.simd_into(self.simd))
4811 }
4812}
4813impl<S: Simd> core::ops::SubAssign<f64> for f64x4<S> {
4814 #[inline(always)]
4815 fn sub_assign(&mut self, rhs: f64) {
4816 *self = self.simd.sub_f64x4(*self, rhs.simd_into(self.simd));
4817 }
4818}
4819impl<S: Simd> core::ops::Sub<f64x4<S>> for f64 {
4820 type Output = f64x4<S>;
4821 #[inline(always)]
4822 fn sub(self, rhs: f64x4<S>) -> Self::Output {
4823 rhs.simd.sub_f64x4(self.simd_into(rhs.simd), rhs)
4824 }
4825}
4826impl<S: Simd> core::ops::Mul for f64x4<S> {
4827 type Output = Self;
4828 #[doc = "Multiply two vectors element-wise."]
4829 #[inline(always)]
4830 fn mul(self, rhs: Self) -> Self::Output {
4831 self.simd.mul_f64x4(self, rhs)
4832 }
4833}
4834impl<S: Simd> core::ops::MulAssign for f64x4<S> {
4835 #[doc = "Multiply two vectors element-wise."]
4836 #[inline(always)]
4837 fn mul_assign(&mut self, rhs: Self) {
4838 *self = self.simd.mul_f64x4(*self, rhs);
4839 }
4840}
4841impl<S: Simd> core::ops::Mul<f64> for f64x4<S> {
4842 type Output = Self;
4843 #[inline(always)]
4844 fn mul(self, rhs: f64) -> Self::Output {
4845 self.simd.mul_f64x4(self, rhs.simd_into(self.simd))
4846 }
4847}
4848impl<S: Simd> core::ops::MulAssign<f64> for f64x4<S> {
4849 #[inline(always)]
4850 fn mul_assign(&mut self, rhs: f64) {
4851 *self = self.simd.mul_f64x4(*self, rhs.simd_into(self.simd));
4852 }
4853}
4854impl<S: Simd> core::ops::Mul<f64x4<S>> for f64 {
4855 type Output = f64x4<S>;
4856 #[inline(always)]
4857 fn mul(self, rhs: f64x4<S>) -> Self::Output {
4858 rhs.simd.mul_f64x4(self.simd_into(rhs.simd), rhs)
4859 }
4860}
4861impl<S: Simd> core::ops::Div for f64x4<S> {
4862 type Output = Self;
4863 #[doc = "Divide two vectors element-wise."]
4864 #[inline(always)]
4865 fn div(self, rhs: Self) -> Self::Output {
4866 self.simd.div_f64x4(self, rhs)
4867 }
4868}
4869impl<S: Simd> core::ops::DivAssign for f64x4<S> {
4870 #[doc = "Divide two vectors element-wise."]
4871 #[inline(always)]
4872 fn div_assign(&mut self, rhs: Self) {
4873 *self = self.simd.div_f64x4(*self, rhs);
4874 }
4875}
4876impl<S: Simd> core::ops::Div<f64> for f64x4<S> {
4877 type Output = Self;
4878 #[inline(always)]
4879 fn div(self, rhs: f64) -> Self::Output {
4880 self.simd.div_f64x4(self, rhs.simd_into(self.simd))
4881 }
4882}
4883impl<S: Simd> core::ops::DivAssign<f64> for f64x4<S> {
4884 #[inline(always)]
4885 fn div_assign(&mut self, rhs: f64) {
4886 *self = self.simd.div_f64x4(*self, rhs.simd_into(self.simd));
4887 }
4888}
4889impl<S: Simd> core::ops::Div<f64x4<S>> for f64 {
4890 type Output = f64x4<S>;
4891 #[inline(always)]
4892 fn div(self, rhs: f64x4<S>) -> Self::Output {
4893 rhs.simd.div_f64x4(self.simd_into(rhs.simd), rhs)
4894 }
4895}
4896impl<S: Simd> core::ops::Neg for i64x4<S> {
4897 type Output = Self;
4898 #[doc = "Negate each element of the vector, wrapping on overflow."]
4899 #[inline(always)]
4900 fn neg(self) -> Self::Output {
4901 self.simd.neg_i64x4(self)
4902 }
4903}
4904impl<S: Simd> core::ops::Add for i64x4<S> {
4905 type Output = Self;
4906 #[doc = "Add two vectors element-wise, wrapping on overflow."]
4907 #[inline(always)]
4908 fn add(self, rhs: Self) -> Self::Output {
4909 self.simd.add_i64x4(self, rhs)
4910 }
4911}
4912impl<S: Simd> core::ops::AddAssign for i64x4<S> {
4913 #[doc = "Add two vectors element-wise, wrapping on overflow."]
4914 #[inline(always)]
4915 fn add_assign(&mut self, rhs: Self) {
4916 *self = self.simd.add_i64x4(*self, rhs);
4917 }
4918}
4919impl<S: Simd> core::ops::Add<i64> for i64x4<S> {
4920 type Output = Self;
4921 #[inline(always)]
4922 fn add(self, rhs: i64) -> Self::Output {
4923 self.simd.add_i64x4(self, rhs.simd_into(self.simd))
4924 }
4925}
4926impl<S: Simd> core::ops::AddAssign<i64> for i64x4<S> {
4927 #[inline(always)]
4928 fn add_assign(&mut self, rhs: i64) {
4929 *self = self.simd.add_i64x4(*self, rhs.simd_into(self.simd));
4930 }
4931}
4932impl<S: Simd> core::ops::Add<i64x4<S>> for i64 {
4933 type Output = i64x4<S>;
4934 #[inline(always)]
4935 fn add(self, rhs: i64x4<S>) -> Self::Output {
4936 rhs.simd.add_i64x4(self.simd_into(rhs.simd), rhs)
4937 }
4938}
4939impl<S: Simd> core::ops::Sub for i64x4<S> {
4940 type Output = Self;
4941 #[doc = "Subtract two vectors element-wise, wrapping on overflow."]
4942 #[inline(always)]
4943 fn sub(self, rhs: Self) -> Self::Output {
4944 self.simd.sub_i64x4(self, rhs)
4945 }
4946}
4947impl<S: Simd> core::ops::SubAssign for i64x4<S> {
4948 #[doc = "Subtract two vectors element-wise, wrapping on overflow."]
4949 #[inline(always)]
4950 fn sub_assign(&mut self, rhs: Self) {
4951 *self = self.simd.sub_i64x4(*self, rhs);
4952 }
4953}
4954impl<S: Simd> core::ops::Sub<i64> for i64x4<S> {
4955 type Output = Self;
4956 #[inline(always)]
4957 fn sub(self, rhs: i64) -> Self::Output {
4958 self.simd.sub_i64x4(self, rhs.simd_into(self.simd))
4959 }
4960}
4961impl<S: Simd> core::ops::SubAssign<i64> for i64x4<S> {
4962 #[inline(always)]
4963 fn sub_assign(&mut self, rhs: i64) {
4964 *self = self.simd.sub_i64x4(*self, rhs.simd_into(self.simd));
4965 }
4966}
4967impl<S: Simd> core::ops::Sub<i64x4<S>> for i64 {
4968 type Output = i64x4<S>;
4969 #[inline(always)]
4970 fn sub(self, rhs: i64x4<S>) -> Self::Output {
4971 rhs.simd.sub_i64x4(self.simd_into(rhs.simd), rhs)
4972 }
4973}
4974impl<S: Simd> core::ops::Mul for i64x4<S> {
4975 type Output = Self;
4976 #[doc = "Multiply two vectors element-wise, wrapping on overflow."]
4977 #[inline(always)]
4978 fn mul(self, rhs: Self) -> Self::Output {
4979 self.simd.mul_i64x4(self, rhs)
4980 }
4981}
4982impl<S: Simd> core::ops::MulAssign for i64x4<S> {
4983 #[doc = "Multiply two vectors element-wise, wrapping on overflow."]
4984 #[inline(always)]
4985 fn mul_assign(&mut self, rhs: Self) {
4986 *self = self.simd.mul_i64x4(*self, rhs);
4987 }
4988}
4989impl<S: Simd> core::ops::Mul<i64> for i64x4<S> {
4990 type Output = Self;
4991 #[inline(always)]
4992 fn mul(self, rhs: i64) -> Self::Output {
4993 self.simd.mul_i64x4(self, rhs.simd_into(self.simd))
4994 }
4995}
4996impl<S: Simd> core::ops::MulAssign<i64> for i64x4<S> {
4997 #[inline(always)]
4998 fn mul_assign(&mut self, rhs: i64) {
4999 *self = self.simd.mul_i64x4(*self, rhs.simd_into(self.simd));
5000 }
5001}
5002impl<S: Simd> core::ops::Mul<i64x4<S>> for i64 {
5003 type Output = i64x4<S>;
5004 #[inline(always)]
5005 fn mul(self, rhs: i64x4<S>) -> Self::Output {
5006 rhs.simd.mul_i64x4(self.simd_into(rhs.simd), rhs)
5007 }
5008}
5009impl<S: Simd> core::ops::BitAnd for i64x4<S> {
5010 type Output = Self;
5011 #[doc = "Compute the bitwise AND of two vectors."]
5012 #[inline(always)]
5013 fn bitand(self, rhs: Self) -> Self::Output {
5014 self.simd.and_i64x4(self, rhs)
5015 }
5016}
5017impl<S: Simd> core::ops::BitAndAssign for i64x4<S> {
5018 #[doc = "Compute the bitwise AND of two vectors."]
5019 #[inline(always)]
5020 fn bitand_assign(&mut self, rhs: Self) {
5021 *self = self.simd.and_i64x4(*self, rhs);
5022 }
5023}
5024impl<S: Simd> core::ops::BitAnd<i64> for i64x4<S> {
5025 type Output = Self;
5026 #[inline(always)]
5027 fn bitand(self, rhs: i64) -> Self::Output {
5028 self.simd.and_i64x4(self, rhs.simd_into(self.simd))
5029 }
5030}
5031impl<S: Simd> core::ops::BitAndAssign<i64> for i64x4<S> {
5032 #[inline(always)]
5033 fn bitand_assign(&mut self, rhs: i64) {
5034 *self = self.simd.and_i64x4(*self, rhs.simd_into(self.simd));
5035 }
5036}
5037impl<S: Simd> core::ops::BitAnd<i64x4<S>> for i64 {
5038 type Output = i64x4<S>;
5039 #[inline(always)]
5040 fn bitand(self, rhs: i64x4<S>) -> Self::Output {
5041 rhs.simd.and_i64x4(self.simd_into(rhs.simd), rhs)
5042 }
5043}
5044impl<S: Simd> core::ops::BitOr for i64x4<S> {
5045 type Output = Self;
5046 #[doc = "Compute the bitwise OR of two vectors."]
5047 #[inline(always)]
5048 fn bitor(self, rhs: Self) -> Self::Output {
5049 self.simd.or_i64x4(self, rhs)
5050 }
5051}
5052impl<S: Simd> core::ops::BitOrAssign for i64x4<S> {
5053 #[doc = "Compute the bitwise OR of two vectors."]
5054 #[inline(always)]
5055 fn bitor_assign(&mut self, rhs: Self) {
5056 *self = self.simd.or_i64x4(*self, rhs);
5057 }
5058}
5059impl<S: Simd> core::ops::BitOr<i64> for i64x4<S> {
5060 type Output = Self;
5061 #[inline(always)]
5062 fn bitor(self, rhs: i64) -> Self::Output {
5063 self.simd.or_i64x4(self, rhs.simd_into(self.simd))
5064 }
5065}
5066impl<S: Simd> core::ops::BitOrAssign<i64> for i64x4<S> {
5067 #[inline(always)]
5068 fn bitor_assign(&mut self, rhs: i64) {
5069 *self = self.simd.or_i64x4(*self, rhs.simd_into(self.simd));
5070 }
5071}
5072impl<S: Simd> core::ops::BitOr<i64x4<S>> for i64 {
5073 type Output = i64x4<S>;
5074 #[inline(always)]
5075 fn bitor(self, rhs: i64x4<S>) -> Self::Output {
5076 rhs.simd.or_i64x4(self.simd_into(rhs.simd), rhs)
5077 }
5078}
5079impl<S: Simd> core::ops::BitXor for i64x4<S> {
5080 type Output = Self;
5081 #[doc = "Compute the bitwise XOR of two vectors."]
5082 #[inline(always)]
5083 fn bitxor(self, rhs: Self) -> Self::Output {
5084 self.simd.xor_i64x4(self, rhs)
5085 }
5086}
5087impl<S: Simd> core::ops::BitXorAssign for i64x4<S> {
5088 #[doc = "Compute the bitwise XOR of two vectors."]
5089 #[inline(always)]
5090 fn bitxor_assign(&mut self, rhs: Self) {
5091 *self = self.simd.xor_i64x4(*self, rhs);
5092 }
5093}
5094impl<S: Simd> core::ops::BitXor<i64> for i64x4<S> {
5095 type Output = Self;
5096 #[inline(always)]
5097 fn bitxor(self, rhs: i64) -> Self::Output {
5098 self.simd.xor_i64x4(self, rhs.simd_into(self.simd))
5099 }
5100}
5101impl<S: Simd> core::ops::BitXorAssign<i64> for i64x4<S> {
5102 #[inline(always)]
5103 fn bitxor_assign(&mut self, rhs: i64) {
5104 *self = self.simd.xor_i64x4(*self, rhs.simd_into(self.simd));
5105 }
5106}
5107impl<S: Simd> core::ops::BitXor<i64x4<S>> for i64 {
5108 type Output = i64x4<S>;
5109 #[inline(always)]
5110 fn bitxor(self, rhs: i64x4<S>) -> Self::Output {
5111 rhs.simd.xor_i64x4(self.simd_into(rhs.simd), rhs)
5112 }
5113}
5114impl<S: Simd> core::ops::Not for i64x4<S> {
5115 type Output = Self;
5116 #[doc = "Compute the bitwise NOT of the vector."]
5117 #[inline(always)]
5118 fn not(self) -> Self::Output {
5119 self.simd.not_i64x4(self)
5120 }
5121}
5122impl<S: Simd> core::ops::Shl<u32> for i64x4<S> {
5123 type Output = Self;
5124 #[doc = "Shift each element left by the given number of bits.\n\nBits shifted out of the left side are discarded, and zeros are shifted in on the right.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform."]
5125 #[inline(always)]
5126 fn shl(self, rhs: u32) -> Self::Output {
5127 self.simd.shl_i64x4(self, rhs)
5128 }
5129}
5130impl<S: Simd> core::ops::ShlAssign<u32> for i64x4<S> {
5131 #[inline(always)]
5132 fn shl_assign(&mut self, rhs: u32) {
5133 *self = self.simd.shl_i64x4(*self, rhs);
5134 }
5135}
5136impl<S: Simd> core::ops::Shl for i64x4<S> {
5137 type Output = Self;
5138 #[doc = "Shift each element left by the given number of bits.\n\nBits shifted out of the left side are discarded, and zeros are shifted in on the right.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform.\n\n# Performance\nThis per-lane shift is slower than shifting the entire vector by a scalar. It is not vectorized at all on WebAssembly, SSE4.2, and for `u8` and `i8` elements on AVX2. Prefer shifting by a single scalar value instead of by a vector whenever possible."]
5139 #[inline(always)]
5140 fn shl(self, rhs: Self) -> Self::Output {
5141 self.simd.shlv_i64x4(self, rhs)
5142 }
5143}
5144impl<S: Simd> core::ops::ShlAssign for i64x4<S> {
5145 #[doc = "Shift each element left by the given number of bits.\n\nBits shifted out of the left side are discarded, and zeros are shifted in on the right.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform.\n\n# Performance\nThis per-lane shift is slower than shifting the entire vector by a scalar. It is not vectorized at all on WebAssembly, SSE4.2, and for `u8` and `i8` elements on AVX2. Prefer shifting by a single scalar value instead of by a vector whenever possible."]
5146 #[inline(always)]
5147 fn shl_assign(&mut self, rhs: Self) {
5148 *self = self.simd.shlv_i64x4(*self, rhs);
5149 }
5150}
5151impl<S: Simd> core::ops::Shr<u32> for i64x4<S> {
5152 type Output = Self;
5153 #[doc = "Shift each element right by the given number of bits.\n\nFor unsigned integers, zeros are shifted in on the left. For signed integers, the sign bit is replicated.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform."]
5154 #[inline(always)]
5155 fn shr(self, rhs: u32) -> Self::Output {
5156 self.simd.shr_i64x4(self, rhs)
5157 }
5158}
5159impl<S: Simd> core::ops::ShrAssign<u32> for i64x4<S> {
5160 #[inline(always)]
5161 fn shr_assign(&mut self, rhs: u32) {
5162 *self = self.simd.shr_i64x4(*self, rhs);
5163 }
5164}
5165impl<S: Simd> core::ops::Shr for i64x4<S> {
5166 type Output = Self;
5167 #[doc = "Shift each element right by the corresponding element in another vector.\n\nFor unsigned integers, zeros are shifted in on the left. For signed integers, the sign bit is replicated.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform.\n\n# Performance\nThis per-lane shift is slower than shifting the entire vector by a scalar. It is not vectorized at all on WebAssembly, SSE4.2, and for `u8` and `i8` elements on AVX2. Prefer shifting by a single scalar value instead of by a vector whenever possible."]
5168 #[inline(always)]
5169 fn shr(self, rhs: Self) -> Self::Output {
5170 self.simd.shrv_i64x4(self, rhs)
5171 }
5172}
5173impl<S: Simd> core::ops::ShrAssign for i64x4<S> {
5174 #[doc = "Shift each element right by the corresponding element in another vector.\n\nFor unsigned integers, zeros are shifted in on the left. For signed integers, the sign bit is replicated.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform.\n\n# Performance\nThis per-lane shift is slower than shifting the entire vector by a scalar. It is not vectorized at all on WebAssembly, SSE4.2, and for `u8` and `i8` elements on AVX2. Prefer shifting by a single scalar value instead of by a vector whenever possible."]
5175 #[inline(always)]
5176 fn shr_assign(&mut self, rhs: Self) {
5177 *self = self.simd.shrv_i64x4(*self, rhs);
5178 }
5179}
5180impl<S: Simd> core::ops::Add for u64x4<S> {
5181 type Output = Self;
5182 #[doc = "Add two vectors element-wise, wrapping on overflow."]
5183 #[inline(always)]
5184 fn add(self, rhs: Self) -> Self::Output {
5185 self.simd.add_u64x4(self, rhs)
5186 }
5187}
5188impl<S: Simd> core::ops::AddAssign for u64x4<S> {
5189 #[doc = "Add two vectors element-wise, wrapping on overflow."]
5190 #[inline(always)]
5191 fn add_assign(&mut self, rhs: Self) {
5192 *self = self.simd.add_u64x4(*self, rhs);
5193 }
5194}
5195impl<S: Simd> core::ops::Add<u64> for u64x4<S> {
5196 type Output = Self;
5197 #[inline(always)]
5198 fn add(self, rhs: u64) -> Self::Output {
5199 self.simd.add_u64x4(self, rhs.simd_into(self.simd))
5200 }
5201}
5202impl<S: Simd> core::ops::AddAssign<u64> for u64x4<S> {
5203 #[inline(always)]
5204 fn add_assign(&mut self, rhs: u64) {
5205 *self = self.simd.add_u64x4(*self, rhs.simd_into(self.simd));
5206 }
5207}
5208impl<S: Simd> core::ops::Add<u64x4<S>> for u64 {
5209 type Output = u64x4<S>;
5210 #[inline(always)]
5211 fn add(self, rhs: u64x4<S>) -> Self::Output {
5212 rhs.simd.add_u64x4(self.simd_into(rhs.simd), rhs)
5213 }
5214}
5215impl<S: Simd> core::ops::Sub for u64x4<S> {
5216 type Output = Self;
5217 #[doc = "Subtract two vectors element-wise, wrapping on overflow."]
5218 #[inline(always)]
5219 fn sub(self, rhs: Self) -> Self::Output {
5220 self.simd.sub_u64x4(self, rhs)
5221 }
5222}
5223impl<S: Simd> core::ops::SubAssign for u64x4<S> {
5224 #[doc = "Subtract two vectors element-wise, wrapping on overflow."]
5225 #[inline(always)]
5226 fn sub_assign(&mut self, rhs: Self) {
5227 *self = self.simd.sub_u64x4(*self, rhs);
5228 }
5229}
5230impl<S: Simd> core::ops::Sub<u64> for u64x4<S> {
5231 type Output = Self;
5232 #[inline(always)]
5233 fn sub(self, rhs: u64) -> Self::Output {
5234 self.simd.sub_u64x4(self, rhs.simd_into(self.simd))
5235 }
5236}
5237impl<S: Simd> core::ops::SubAssign<u64> for u64x4<S> {
5238 #[inline(always)]
5239 fn sub_assign(&mut self, rhs: u64) {
5240 *self = self.simd.sub_u64x4(*self, rhs.simd_into(self.simd));
5241 }
5242}
5243impl<S: Simd> core::ops::Sub<u64x4<S>> for u64 {
5244 type Output = u64x4<S>;
5245 #[inline(always)]
5246 fn sub(self, rhs: u64x4<S>) -> Self::Output {
5247 rhs.simd.sub_u64x4(self.simd_into(rhs.simd), rhs)
5248 }
5249}
5250impl<S: Simd> core::ops::Mul for u64x4<S> {
5251 type Output = Self;
5252 #[doc = "Multiply two vectors element-wise, wrapping on overflow."]
5253 #[inline(always)]
5254 fn mul(self, rhs: Self) -> Self::Output {
5255 self.simd.mul_u64x4(self, rhs)
5256 }
5257}
5258impl<S: Simd> core::ops::MulAssign for u64x4<S> {
5259 #[doc = "Multiply two vectors element-wise, wrapping on overflow."]
5260 #[inline(always)]
5261 fn mul_assign(&mut self, rhs: Self) {
5262 *self = self.simd.mul_u64x4(*self, rhs);
5263 }
5264}
5265impl<S: Simd> core::ops::Mul<u64> for u64x4<S> {
5266 type Output = Self;
5267 #[inline(always)]
5268 fn mul(self, rhs: u64) -> Self::Output {
5269 self.simd.mul_u64x4(self, rhs.simd_into(self.simd))
5270 }
5271}
5272impl<S: Simd> core::ops::MulAssign<u64> for u64x4<S> {
5273 #[inline(always)]
5274 fn mul_assign(&mut self, rhs: u64) {
5275 *self = self.simd.mul_u64x4(*self, rhs.simd_into(self.simd));
5276 }
5277}
5278impl<S: Simd> core::ops::Mul<u64x4<S>> for u64 {
5279 type Output = u64x4<S>;
5280 #[inline(always)]
5281 fn mul(self, rhs: u64x4<S>) -> Self::Output {
5282 rhs.simd.mul_u64x4(self.simd_into(rhs.simd), rhs)
5283 }
5284}
5285impl<S: Simd> core::ops::BitAnd for u64x4<S> {
5286 type Output = Self;
5287 #[doc = "Compute the bitwise AND of two vectors."]
5288 #[inline(always)]
5289 fn bitand(self, rhs: Self) -> Self::Output {
5290 self.simd.and_u64x4(self, rhs)
5291 }
5292}
5293impl<S: Simd> core::ops::BitAndAssign for u64x4<S> {
5294 #[doc = "Compute the bitwise AND of two vectors."]
5295 #[inline(always)]
5296 fn bitand_assign(&mut self, rhs: Self) {
5297 *self = self.simd.and_u64x4(*self, rhs);
5298 }
5299}
5300impl<S: Simd> core::ops::BitAnd<u64> for u64x4<S> {
5301 type Output = Self;
5302 #[inline(always)]
5303 fn bitand(self, rhs: u64) -> Self::Output {
5304 self.simd.and_u64x4(self, rhs.simd_into(self.simd))
5305 }
5306}
5307impl<S: Simd> core::ops::BitAndAssign<u64> for u64x4<S> {
5308 #[inline(always)]
5309 fn bitand_assign(&mut self, rhs: u64) {
5310 *self = self.simd.and_u64x4(*self, rhs.simd_into(self.simd));
5311 }
5312}
5313impl<S: Simd> core::ops::BitAnd<u64x4<S>> for u64 {
5314 type Output = u64x4<S>;
5315 #[inline(always)]
5316 fn bitand(self, rhs: u64x4<S>) -> Self::Output {
5317 rhs.simd.and_u64x4(self.simd_into(rhs.simd), rhs)
5318 }
5319}
5320impl<S: Simd> core::ops::BitOr for u64x4<S> {
5321 type Output = Self;
5322 #[doc = "Compute the bitwise OR of two vectors."]
5323 #[inline(always)]
5324 fn bitor(self, rhs: Self) -> Self::Output {
5325 self.simd.or_u64x4(self, rhs)
5326 }
5327}
5328impl<S: Simd> core::ops::BitOrAssign for u64x4<S> {
5329 #[doc = "Compute the bitwise OR of two vectors."]
5330 #[inline(always)]
5331 fn bitor_assign(&mut self, rhs: Self) {
5332 *self = self.simd.or_u64x4(*self, rhs);
5333 }
5334}
5335impl<S: Simd> core::ops::BitOr<u64> for u64x4<S> {
5336 type Output = Self;
5337 #[inline(always)]
5338 fn bitor(self, rhs: u64) -> Self::Output {
5339 self.simd.or_u64x4(self, rhs.simd_into(self.simd))
5340 }
5341}
5342impl<S: Simd> core::ops::BitOrAssign<u64> for u64x4<S> {
5343 #[inline(always)]
5344 fn bitor_assign(&mut self, rhs: u64) {
5345 *self = self.simd.or_u64x4(*self, rhs.simd_into(self.simd));
5346 }
5347}
5348impl<S: Simd> core::ops::BitOr<u64x4<S>> for u64 {
5349 type Output = u64x4<S>;
5350 #[inline(always)]
5351 fn bitor(self, rhs: u64x4<S>) -> Self::Output {
5352 rhs.simd.or_u64x4(self.simd_into(rhs.simd), rhs)
5353 }
5354}
5355impl<S: Simd> core::ops::BitXor for u64x4<S> {
5356 type Output = Self;
5357 #[doc = "Compute the bitwise XOR of two vectors."]
5358 #[inline(always)]
5359 fn bitxor(self, rhs: Self) -> Self::Output {
5360 self.simd.xor_u64x4(self, rhs)
5361 }
5362}
5363impl<S: Simd> core::ops::BitXorAssign for u64x4<S> {
5364 #[doc = "Compute the bitwise XOR of two vectors."]
5365 #[inline(always)]
5366 fn bitxor_assign(&mut self, rhs: Self) {
5367 *self = self.simd.xor_u64x4(*self, rhs);
5368 }
5369}
5370impl<S: Simd> core::ops::BitXor<u64> for u64x4<S> {
5371 type Output = Self;
5372 #[inline(always)]
5373 fn bitxor(self, rhs: u64) -> Self::Output {
5374 self.simd.xor_u64x4(self, rhs.simd_into(self.simd))
5375 }
5376}
5377impl<S: Simd> core::ops::BitXorAssign<u64> for u64x4<S> {
5378 #[inline(always)]
5379 fn bitxor_assign(&mut self, rhs: u64) {
5380 *self = self.simd.xor_u64x4(*self, rhs.simd_into(self.simd));
5381 }
5382}
5383impl<S: Simd> core::ops::BitXor<u64x4<S>> for u64 {
5384 type Output = u64x4<S>;
5385 #[inline(always)]
5386 fn bitxor(self, rhs: u64x4<S>) -> Self::Output {
5387 rhs.simd.xor_u64x4(self.simd_into(rhs.simd), rhs)
5388 }
5389}
5390impl<S: Simd> core::ops::Not for u64x4<S> {
5391 type Output = Self;
5392 #[doc = "Compute the bitwise NOT of the vector."]
5393 #[inline(always)]
5394 fn not(self) -> Self::Output {
5395 self.simd.not_u64x4(self)
5396 }
5397}
5398impl<S: Simd> core::ops::Shl<u32> for u64x4<S> {
5399 type Output = Self;
5400 #[doc = "Shift each element left by the given number of bits.\n\nBits shifted out of the left side are discarded, and zeros are shifted in on the right.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform."]
5401 #[inline(always)]
5402 fn shl(self, rhs: u32) -> Self::Output {
5403 self.simd.shl_u64x4(self, rhs)
5404 }
5405}
5406impl<S: Simd> core::ops::ShlAssign<u32> for u64x4<S> {
5407 #[inline(always)]
5408 fn shl_assign(&mut self, rhs: u32) {
5409 *self = self.simd.shl_u64x4(*self, rhs);
5410 }
5411}
5412impl<S: Simd> core::ops::Shl for u64x4<S> {
5413 type Output = Self;
5414 #[doc = "Shift each element left by the given number of bits.\n\nBits shifted out of the left side are discarded, and zeros are shifted in on the right.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform.\n\n# Performance\nThis per-lane shift is slower than shifting the entire vector by a scalar. It is not vectorized at all on WebAssembly, SSE4.2, and for `u8` and `i8` elements on AVX2. Prefer shifting by a single scalar value instead of by a vector whenever possible."]
5415 #[inline(always)]
5416 fn shl(self, rhs: Self) -> Self::Output {
5417 self.simd.shlv_u64x4(self, rhs)
5418 }
5419}
5420impl<S: Simd> core::ops::ShlAssign for u64x4<S> {
5421 #[doc = "Shift each element left by the given number of bits.\n\nBits shifted out of the left side are discarded, and zeros are shifted in on the right.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform.\n\n# Performance\nThis per-lane shift is slower than shifting the entire vector by a scalar. It is not vectorized at all on WebAssembly, SSE4.2, and for `u8` and `i8` elements on AVX2. Prefer shifting by a single scalar value instead of by a vector whenever possible."]
5422 #[inline(always)]
5423 fn shl_assign(&mut self, rhs: Self) {
5424 *self = self.simd.shlv_u64x4(*self, rhs);
5425 }
5426}
5427impl<S: Simd> core::ops::Shr<u32> for u64x4<S> {
5428 type Output = Self;
5429 #[doc = "Shift each element right by the given number of bits.\n\nFor unsigned integers, zeros are shifted in on the left. For signed integers, the sign bit is replicated.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform."]
5430 #[inline(always)]
5431 fn shr(self, rhs: u32) -> Self::Output {
5432 self.simd.shr_u64x4(self, rhs)
5433 }
5434}
5435impl<S: Simd> core::ops::ShrAssign<u32> for u64x4<S> {
5436 #[inline(always)]
5437 fn shr_assign(&mut self, rhs: u32) {
5438 *self = self.simd.shr_u64x4(*self, rhs);
5439 }
5440}
5441impl<S: Simd> core::ops::Shr for u64x4<S> {
5442 type Output = Self;
5443 #[doc = "Shift each element right by the corresponding element in another vector.\n\nFor unsigned integers, zeros are shifted in on the left. For signed integers, the sign bit is replicated.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform.\n\n# Performance\nThis per-lane shift is slower than shifting the entire vector by a scalar. It is not vectorized at all on WebAssembly, SSE4.2, and for `u8` and `i8` elements on AVX2. Prefer shifting by a single scalar value instead of by a vector whenever possible."]
5444 #[inline(always)]
5445 fn shr(self, rhs: Self) -> Self::Output {
5446 self.simd.shrv_u64x4(self, rhs)
5447 }
5448}
5449impl<S: Simd> core::ops::ShrAssign for u64x4<S> {
5450 #[doc = "Shift each element right by the corresponding element in another vector.\n\nFor unsigned integers, zeros are shifted in on the left. For signed integers, the sign bit is replicated.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform.\n\n# Performance\nThis per-lane shift is slower than shifting the entire vector by a scalar. It is not vectorized at all on WebAssembly, SSE4.2, and for `u8` and `i8` elements on AVX2. Prefer shifting by a single scalar value instead of by a vector whenever possible."]
5451 #[inline(always)]
5452 fn shr_assign(&mut self, rhs: Self) {
5453 *self = self.simd.shrv_u64x4(*self, rhs);
5454 }
5455}
5456impl<S: Simd> core::ops::BitAnd for mask64x4<S> {
5457 type Output = Self;
5458 #[doc = "Compute the logical AND of two masks."]
5459 #[inline(always)]
5460 fn bitand(self, rhs: Self) -> Self::Output {
5461 self.simd.and_mask64x4(self, rhs)
5462 }
5463}
5464impl<S: Simd> core::ops::BitAndAssign for mask64x4<S> {
5465 #[doc = "Compute the logical AND of two masks."]
5466 #[inline(always)]
5467 fn bitand_assign(&mut self, rhs: Self) {
5468 *self = self.simd.and_mask64x4(*self, rhs);
5469 }
5470}
5471impl<S: Simd> core::ops::BitOr for mask64x4<S> {
5472 type Output = Self;
5473 #[doc = "Compute the logical OR of two masks."]
5474 #[inline(always)]
5475 fn bitor(self, rhs: Self) -> Self::Output {
5476 self.simd.or_mask64x4(self, rhs)
5477 }
5478}
5479impl<S: Simd> core::ops::BitOrAssign for mask64x4<S> {
5480 #[doc = "Compute the logical OR of two masks."]
5481 #[inline(always)]
5482 fn bitor_assign(&mut self, rhs: Self) {
5483 *self = self.simd.or_mask64x4(*self, rhs);
5484 }
5485}
5486impl<S: Simd> core::ops::BitXor for mask64x4<S> {
5487 type Output = Self;
5488 #[doc = "Compute the logical XOR of two masks."]
5489 #[inline(always)]
5490 fn bitxor(self, rhs: Self) -> Self::Output {
5491 self.simd.xor_mask64x4(self, rhs)
5492 }
5493}
5494impl<S: Simd> core::ops::BitXorAssign for mask64x4<S> {
5495 #[doc = "Compute the logical XOR of two masks."]
5496 #[inline(always)]
5497 fn bitxor_assign(&mut self, rhs: Self) {
5498 *self = self.simd.xor_mask64x4(*self, rhs);
5499 }
5500}
5501impl<S: Simd> core::ops::Not for mask64x4<S> {
5502 type Output = Self;
5503 #[doc = "Compute the logical NOT of the mask."]
5504 #[inline(always)]
5505 fn not(self) -> Self::Output {
5506 self.simd.not_mask64x4(self)
5507 }
5508}
5509impl<S: Simd> core::ops::Neg for f32x16<S> {
5510 type Output = Self;
5511 #[doc = "Negate each element of the vector."]
5512 #[inline(always)]
5513 fn neg(self) -> Self::Output {
5514 self.simd.neg_f32x16(self)
5515 }
5516}
5517impl<S: Simd> core::ops::Add for f32x16<S> {
5518 type Output = Self;
5519 #[doc = "Add two vectors element-wise."]
5520 #[inline(always)]
5521 fn add(self, rhs: Self) -> Self::Output {
5522 self.simd.add_f32x16(self, rhs)
5523 }
5524}
5525impl<S: Simd> core::ops::AddAssign for f32x16<S> {
5526 #[doc = "Add two vectors element-wise."]
5527 #[inline(always)]
5528 fn add_assign(&mut self, rhs: Self) {
5529 *self = self.simd.add_f32x16(*self, rhs);
5530 }
5531}
5532impl<S: Simd> core::ops::Add<f32> for f32x16<S> {
5533 type Output = Self;
5534 #[inline(always)]
5535 fn add(self, rhs: f32) -> Self::Output {
5536 self.simd.add_f32x16(self, rhs.simd_into(self.simd))
5537 }
5538}
5539impl<S: Simd> core::ops::AddAssign<f32> for f32x16<S> {
5540 #[inline(always)]
5541 fn add_assign(&mut self, rhs: f32) {
5542 *self = self.simd.add_f32x16(*self, rhs.simd_into(self.simd));
5543 }
5544}
5545impl<S: Simd> core::ops::Add<f32x16<S>> for f32 {
5546 type Output = f32x16<S>;
5547 #[inline(always)]
5548 fn add(self, rhs: f32x16<S>) -> Self::Output {
5549 rhs.simd.add_f32x16(self.simd_into(rhs.simd), rhs)
5550 }
5551}
5552impl<S: Simd> core::ops::Sub for f32x16<S> {
5553 type Output = Self;
5554 #[doc = "Subtract two vectors element-wise."]
5555 #[inline(always)]
5556 fn sub(self, rhs: Self) -> Self::Output {
5557 self.simd.sub_f32x16(self, rhs)
5558 }
5559}
5560impl<S: Simd> core::ops::SubAssign for f32x16<S> {
5561 #[doc = "Subtract two vectors element-wise."]
5562 #[inline(always)]
5563 fn sub_assign(&mut self, rhs: Self) {
5564 *self = self.simd.sub_f32x16(*self, rhs);
5565 }
5566}
5567impl<S: Simd> core::ops::Sub<f32> for f32x16<S> {
5568 type Output = Self;
5569 #[inline(always)]
5570 fn sub(self, rhs: f32) -> Self::Output {
5571 self.simd.sub_f32x16(self, rhs.simd_into(self.simd))
5572 }
5573}
5574impl<S: Simd> core::ops::SubAssign<f32> for f32x16<S> {
5575 #[inline(always)]
5576 fn sub_assign(&mut self, rhs: f32) {
5577 *self = self.simd.sub_f32x16(*self, rhs.simd_into(self.simd));
5578 }
5579}
5580impl<S: Simd> core::ops::Sub<f32x16<S>> for f32 {
5581 type Output = f32x16<S>;
5582 #[inline(always)]
5583 fn sub(self, rhs: f32x16<S>) -> Self::Output {
5584 rhs.simd.sub_f32x16(self.simd_into(rhs.simd), rhs)
5585 }
5586}
5587impl<S: Simd> core::ops::Mul for f32x16<S> {
5588 type Output = Self;
5589 #[doc = "Multiply two vectors element-wise."]
5590 #[inline(always)]
5591 fn mul(self, rhs: Self) -> Self::Output {
5592 self.simd.mul_f32x16(self, rhs)
5593 }
5594}
5595impl<S: Simd> core::ops::MulAssign for f32x16<S> {
5596 #[doc = "Multiply two vectors element-wise."]
5597 #[inline(always)]
5598 fn mul_assign(&mut self, rhs: Self) {
5599 *self = self.simd.mul_f32x16(*self, rhs);
5600 }
5601}
5602impl<S: Simd> core::ops::Mul<f32> for f32x16<S> {
5603 type Output = Self;
5604 #[inline(always)]
5605 fn mul(self, rhs: f32) -> Self::Output {
5606 self.simd.mul_f32x16(self, rhs.simd_into(self.simd))
5607 }
5608}
5609impl<S: Simd> core::ops::MulAssign<f32> for f32x16<S> {
5610 #[inline(always)]
5611 fn mul_assign(&mut self, rhs: f32) {
5612 *self = self.simd.mul_f32x16(*self, rhs.simd_into(self.simd));
5613 }
5614}
5615impl<S: Simd> core::ops::Mul<f32x16<S>> for f32 {
5616 type Output = f32x16<S>;
5617 #[inline(always)]
5618 fn mul(self, rhs: f32x16<S>) -> Self::Output {
5619 rhs.simd.mul_f32x16(self.simd_into(rhs.simd), rhs)
5620 }
5621}
5622impl<S: Simd> core::ops::Div for f32x16<S> {
5623 type Output = Self;
5624 #[doc = "Divide two vectors element-wise."]
5625 #[inline(always)]
5626 fn div(self, rhs: Self) -> Self::Output {
5627 self.simd.div_f32x16(self, rhs)
5628 }
5629}
5630impl<S: Simd> core::ops::DivAssign for f32x16<S> {
5631 #[doc = "Divide two vectors element-wise."]
5632 #[inline(always)]
5633 fn div_assign(&mut self, rhs: Self) {
5634 *self = self.simd.div_f32x16(*self, rhs);
5635 }
5636}
5637impl<S: Simd> core::ops::Div<f32> for f32x16<S> {
5638 type Output = Self;
5639 #[inline(always)]
5640 fn div(self, rhs: f32) -> Self::Output {
5641 self.simd.div_f32x16(self, rhs.simd_into(self.simd))
5642 }
5643}
5644impl<S: Simd> core::ops::DivAssign<f32> for f32x16<S> {
5645 #[inline(always)]
5646 fn div_assign(&mut self, rhs: f32) {
5647 *self = self.simd.div_f32x16(*self, rhs.simd_into(self.simd));
5648 }
5649}
5650impl<S: Simd> core::ops::Div<f32x16<S>> for f32 {
5651 type Output = f32x16<S>;
5652 #[inline(always)]
5653 fn div(self, rhs: f32x16<S>) -> Self::Output {
5654 rhs.simd.div_f32x16(self.simd_into(rhs.simd), rhs)
5655 }
5656}
5657impl<S: Simd> core::ops::Neg for i8x64<S> {
5658 type Output = Self;
5659 #[doc = "Negate each element of the vector, wrapping on overflow."]
5660 #[inline(always)]
5661 fn neg(self) -> Self::Output {
5662 self.simd.neg_i8x64(self)
5663 }
5664}
5665impl<S: Simd> core::ops::Add for i8x64<S> {
5666 type Output = Self;
5667 #[doc = "Add two vectors element-wise, wrapping on overflow."]
5668 #[inline(always)]
5669 fn add(self, rhs: Self) -> Self::Output {
5670 self.simd.add_i8x64(self, rhs)
5671 }
5672}
5673impl<S: Simd> core::ops::AddAssign for i8x64<S> {
5674 #[doc = "Add two vectors element-wise, wrapping on overflow."]
5675 #[inline(always)]
5676 fn add_assign(&mut self, rhs: Self) {
5677 *self = self.simd.add_i8x64(*self, rhs);
5678 }
5679}
5680impl<S: Simd> core::ops::Add<i8> for i8x64<S> {
5681 type Output = Self;
5682 #[inline(always)]
5683 fn add(self, rhs: i8) -> Self::Output {
5684 self.simd.add_i8x64(self, rhs.simd_into(self.simd))
5685 }
5686}
5687impl<S: Simd> core::ops::AddAssign<i8> for i8x64<S> {
5688 #[inline(always)]
5689 fn add_assign(&mut self, rhs: i8) {
5690 *self = self.simd.add_i8x64(*self, rhs.simd_into(self.simd));
5691 }
5692}
5693impl<S: Simd> core::ops::Add<i8x64<S>> for i8 {
5694 type Output = i8x64<S>;
5695 #[inline(always)]
5696 fn add(self, rhs: i8x64<S>) -> Self::Output {
5697 rhs.simd.add_i8x64(self.simd_into(rhs.simd), rhs)
5698 }
5699}
5700impl<S: Simd> core::ops::Sub for i8x64<S> {
5701 type Output = Self;
5702 #[doc = "Subtract two vectors element-wise, wrapping on overflow."]
5703 #[inline(always)]
5704 fn sub(self, rhs: Self) -> Self::Output {
5705 self.simd.sub_i8x64(self, rhs)
5706 }
5707}
5708impl<S: Simd> core::ops::SubAssign for i8x64<S> {
5709 #[doc = "Subtract two vectors element-wise, wrapping on overflow."]
5710 #[inline(always)]
5711 fn sub_assign(&mut self, rhs: Self) {
5712 *self = self.simd.sub_i8x64(*self, rhs);
5713 }
5714}
5715impl<S: Simd> core::ops::Sub<i8> for i8x64<S> {
5716 type Output = Self;
5717 #[inline(always)]
5718 fn sub(self, rhs: i8) -> Self::Output {
5719 self.simd.sub_i8x64(self, rhs.simd_into(self.simd))
5720 }
5721}
5722impl<S: Simd> core::ops::SubAssign<i8> for i8x64<S> {
5723 #[inline(always)]
5724 fn sub_assign(&mut self, rhs: i8) {
5725 *self = self.simd.sub_i8x64(*self, rhs.simd_into(self.simd));
5726 }
5727}
5728impl<S: Simd> core::ops::Sub<i8x64<S>> for i8 {
5729 type Output = i8x64<S>;
5730 #[inline(always)]
5731 fn sub(self, rhs: i8x64<S>) -> Self::Output {
5732 rhs.simd.sub_i8x64(self.simd_into(rhs.simd), rhs)
5733 }
5734}
5735impl<S: Simd> core::ops::Mul for i8x64<S> {
5736 type Output = Self;
5737 #[doc = "Multiply two vectors element-wise, wrapping on overflow."]
5738 #[inline(always)]
5739 fn mul(self, rhs: Self) -> Self::Output {
5740 self.simd.mul_i8x64(self, rhs)
5741 }
5742}
5743impl<S: Simd> core::ops::MulAssign for i8x64<S> {
5744 #[doc = "Multiply two vectors element-wise, wrapping on overflow."]
5745 #[inline(always)]
5746 fn mul_assign(&mut self, rhs: Self) {
5747 *self = self.simd.mul_i8x64(*self, rhs);
5748 }
5749}
5750impl<S: Simd> core::ops::Mul<i8> for i8x64<S> {
5751 type Output = Self;
5752 #[inline(always)]
5753 fn mul(self, rhs: i8) -> Self::Output {
5754 self.simd.mul_i8x64(self, rhs.simd_into(self.simd))
5755 }
5756}
5757impl<S: Simd> core::ops::MulAssign<i8> for i8x64<S> {
5758 #[inline(always)]
5759 fn mul_assign(&mut self, rhs: i8) {
5760 *self = self.simd.mul_i8x64(*self, rhs.simd_into(self.simd));
5761 }
5762}
5763impl<S: Simd> core::ops::Mul<i8x64<S>> for i8 {
5764 type Output = i8x64<S>;
5765 #[inline(always)]
5766 fn mul(self, rhs: i8x64<S>) -> Self::Output {
5767 rhs.simd.mul_i8x64(self.simd_into(rhs.simd), rhs)
5768 }
5769}
5770impl<S: Simd> core::ops::BitAnd for i8x64<S> {
5771 type Output = Self;
5772 #[doc = "Compute the bitwise AND of two vectors."]
5773 #[inline(always)]
5774 fn bitand(self, rhs: Self) -> Self::Output {
5775 self.simd.and_i8x64(self, rhs)
5776 }
5777}
5778impl<S: Simd> core::ops::BitAndAssign for i8x64<S> {
5779 #[doc = "Compute the bitwise AND of two vectors."]
5780 #[inline(always)]
5781 fn bitand_assign(&mut self, rhs: Self) {
5782 *self = self.simd.and_i8x64(*self, rhs);
5783 }
5784}
5785impl<S: Simd> core::ops::BitAnd<i8> for i8x64<S> {
5786 type Output = Self;
5787 #[inline(always)]
5788 fn bitand(self, rhs: i8) -> Self::Output {
5789 self.simd.and_i8x64(self, rhs.simd_into(self.simd))
5790 }
5791}
5792impl<S: Simd> core::ops::BitAndAssign<i8> for i8x64<S> {
5793 #[inline(always)]
5794 fn bitand_assign(&mut self, rhs: i8) {
5795 *self = self.simd.and_i8x64(*self, rhs.simd_into(self.simd));
5796 }
5797}
5798impl<S: Simd> core::ops::BitAnd<i8x64<S>> for i8 {
5799 type Output = i8x64<S>;
5800 #[inline(always)]
5801 fn bitand(self, rhs: i8x64<S>) -> Self::Output {
5802 rhs.simd.and_i8x64(self.simd_into(rhs.simd), rhs)
5803 }
5804}
5805impl<S: Simd> core::ops::BitOr for i8x64<S> {
5806 type Output = Self;
5807 #[doc = "Compute the bitwise OR of two vectors."]
5808 #[inline(always)]
5809 fn bitor(self, rhs: Self) -> Self::Output {
5810 self.simd.or_i8x64(self, rhs)
5811 }
5812}
5813impl<S: Simd> core::ops::BitOrAssign for i8x64<S> {
5814 #[doc = "Compute the bitwise OR of two vectors."]
5815 #[inline(always)]
5816 fn bitor_assign(&mut self, rhs: Self) {
5817 *self = self.simd.or_i8x64(*self, rhs);
5818 }
5819}
5820impl<S: Simd> core::ops::BitOr<i8> for i8x64<S> {
5821 type Output = Self;
5822 #[inline(always)]
5823 fn bitor(self, rhs: i8) -> Self::Output {
5824 self.simd.or_i8x64(self, rhs.simd_into(self.simd))
5825 }
5826}
5827impl<S: Simd> core::ops::BitOrAssign<i8> for i8x64<S> {
5828 #[inline(always)]
5829 fn bitor_assign(&mut self, rhs: i8) {
5830 *self = self.simd.or_i8x64(*self, rhs.simd_into(self.simd));
5831 }
5832}
5833impl<S: Simd> core::ops::BitOr<i8x64<S>> for i8 {
5834 type Output = i8x64<S>;
5835 #[inline(always)]
5836 fn bitor(self, rhs: i8x64<S>) -> Self::Output {
5837 rhs.simd.or_i8x64(self.simd_into(rhs.simd), rhs)
5838 }
5839}
5840impl<S: Simd> core::ops::BitXor for i8x64<S> {
5841 type Output = Self;
5842 #[doc = "Compute the bitwise XOR of two vectors."]
5843 #[inline(always)]
5844 fn bitxor(self, rhs: Self) -> Self::Output {
5845 self.simd.xor_i8x64(self, rhs)
5846 }
5847}
5848impl<S: Simd> core::ops::BitXorAssign for i8x64<S> {
5849 #[doc = "Compute the bitwise XOR of two vectors."]
5850 #[inline(always)]
5851 fn bitxor_assign(&mut self, rhs: Self) {
5852 *self = self.simd.xor_i8x64(*self, rhs);
5853 }
5854}
5855impl<S: Simd> core::ops::BitXor<i8> for i8x64<S> {
5856 type Output = Self;
5857 #[inline(always)]
5858 fn bitxor(self, rhs: i8) -> Self::Output {
5859 self.simd.xor_i8x64(self, rhs.simd_into(self.simd))
5860 }
5861}
5862impl<S: Simd> core::ops::BitXorAssign<i8> for i8x64<S> {
5863 #[inline(always)]
5864 fn bitxor_assign(&mut self, rhs: i8) {
5865 *self = self.simd.xor_i8x64(*self, rhs.simd_into(self.simd));
5866 }
5867}
5868impl<S: Simd> core::ops::BitXor<i8x64<S>> for i8 {
5869 type Output = i8x64<S>;
5870 #[inline(always)]
5871 fn bitxor(self, rhs: i8x64<S>) -> Self::Output {
5872 rhs.simd.xor_i8x64(self.simd_into(rhs.simd), rhs)
5873 }
5874}
5875impl<S: Simd> core::ops::Not for i8x64<S> {
5876 type Output = Self;
5877 #[doc = "Compute the bitwise NOT of the vector."]
5878 #[inline(always)]
5879 fn not(self) -> Self::Output {
5880 self.simd.not_i8x64(self)
5881 }
5882}
5883impl<S: Simd> core::ops::Shl<u32> for i8x64<S> {
5884 type Output = Self;
5885 #[doc = "Shift each element left by the given number of bits.\n\nBits shifted out of the left side are discarded, and zeros are shifted in on the right.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform."]
5886 #[inline(always)]
5887 fn shl(self, rhs: u32) -> Self::Output {
5888 self.simd.shl_i8x64(self, rhs)
5889 }
5890}
5891impl<S: Simd> core::ops::ShlAssign<u32> for i8x64<S> {
5892 #[inline(always)]
5893 fn shl_assign(&mut self, rhs: u32) {
5894 *self = self.simd.shl_i8x64(*self, rhs);
5895 }
5896}
5897impl<S: Simd> core::ops::Shl for i8x64<S> {
5898 type Output = Self;
5899 #[doc = "Shift each element left by the given number of bits.\n\nBits shifted out of the left side are discarded, and zeros are shifted in on the right.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform.\n\n# Performance\nThis per-lane shift is slower than shifting the entire vector by a scalar. It is not vectorized at all on WebAssembly, SSE4.2, and for `u8` and `i8` elements on AVX2. Prefer shifting by a single scalar value instead of by a vector whenever possible."]
5900 #[inline(always)]
5901 fn shl(self, rhs: Self) -> Self::Output {
5902 self.simd.shlv_i8x64(self, rhs)
5903 }
5904}
5905impl<S: Simd> core::ops::ShlAssign for i8x64<S> {
5906 #[doc = "Shift each element left by the given number of bits.\n\nBits shifted out of the left side are discarded, and zeros are shifted in on the right.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform.\n\n# Performance\nThis per-lane shift is slower than shifting the entire vector by a scalar. It is not vectorized at all on WebAssembly, SSE4.2, and for `u8` and `i8` elements on AVX2. Prefer shifting by a single scalar value instead of by a vector whenever possible."]
5907 #[inline(always)]
5908 fn shl_assign(&mut self, rhs: Self) {
5909 *self = self.simd.shlv_i8x64(*self, rhs);
5910 }
5911}
5912impl<S: Simd> core::ops::Shr<u32> for i8x64<S> {
5913 type Output = Self;
5914 #[doc = "Shift each element right by the given number of bits.\n\nFor unsigned integers, zeros are shifted in on the left. For signed integers, the sign bit is replicated.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform."]
5915 #[inline(always)]
5916 fn shr(self, rhs: u32) -> Self::Output {
5917 self.simd.shr_i8x64(self, rhs)
5918 }
5919}
5920impl<S: Simd> core::ops::ShrAssign<u32> for i8x64<S> {
5921 #[inline(always)]
5922 fn shr_assign(&mut self, rhs: u32) {
5923 *self = self.simd.shr_i8x64(*self, rhs);
5924 }
5925}
5926impl<S: Simd> core::ops::Shr for i8x64<S> {
5927 type Output = Self;
5928 #[doc = "Shift each element right by the corresponding element in another vector.\n\nFor unsigned integers, zeros are shifted in on the left. For signed integers, the sign bit is replicated.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform.\n\n# Performance\nThis per-lane shift is slower than shifting the entire vector by a scalar. It is not vectorized at all on WebAssembly, SSE4.2, and for `u8` and `i8` elements on AVX2. Prefer shifting by a single scalar value instead of by a vector whenever possible."]
5929 #[inline(always)]
5930 fn shr(self, rhs: Self) -> Self::Output {
5931 self.simd.shrv_i8x64(self, rhs)
5932 }
5933}
5934impl<S: Simd> core::ops::ShrAssign for i8x64<S> {
5935 #[doc = "Shift each element right by the corresponding element in another vector.\n\nFor unsigned integers, zeros are shifted in on the left. For signed integers, the sign bit is replicated.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform.\n\n# Performance\nThis per-lane shift is slower than shifting the entire vector by a scalar. It is not vectorized at all on WebAssembly, SSE4.2, and for `u8` and `i8` elements on AVX2. Prefer shifting by a single scalar value instead of by a vector whenever possible."]
5936 #[inline(always)]
5937 fn shr_assign(&mut self, rhs: Self) {
5938 *self = self.simd.shrv_i8x64(*self, rhs);
5939 }
5940}
5941impl<S: Simd> core::ops::Add for u8x64<S> {
5942 type Output = Self;
5943 #[doc = "Add two vectors element-wise, wrapping on overflow."]
5944 #[inline(always)]
5945 fn add(self, rhs: Self) -> Self::Output {
5946 self.simd.add_u8x64(self, rhs)
5947 }
5948}
5949impl<S: Simd> core::ops::AddAssign for u8x64<S> {
5950 #[doc = "Add two vectors element-wise, wrapping on overflow."]
5951 #[inline(always)]
5952 fn add_assign(&mut self, rhs: Self) {
5953 *self = self.simd.add_u8x64(*self, rhs);
5954 }
5955}
5956impl<S: Simd> core::ops::Add<u8> for u8x64<S> {
5957 type Output = Self;
5958 #[inline(always)]
5959 fn add(self, rhs: u8) -> Self::Output {
5960 self.simd.add_u8x64(self, rhs.simd_into(self.simd))
5961 }
5962}
5963impl<S: Simd> core::ops::AddAssign<u8> for u8x64<S> {
5964 #[inline(always)]
5965 fn add_assign(&mut self, rhs: u8) {
5966 *self = self.simd.add_u8x64(*self, rhs.simd_into(self.simd));
5967 }
5968}
5969impl<S: Simd> core::ops::Add<u8x64<S>> for u8 {
5970 type Output = u8x64<S>;
5971 #[inline(always)]
5972 fn add(self, rhs: u8x64<S>) -> Self::Output {
5973 rhs.simd.add_u8x64(self.simd_into(rhs.simd), rhs)
5974 }
5975}
5976impl<S: Simd> core::ops::Sub for u8x64<S> {
5977 type Output = Self;
5978 #[doc = "Subtract two vectors element-wise, wrapping on overflow."]
5979 #[inline(always)]
5980 fn sub(self, rhs: Self) -> Self::Output {
5981 self.simd.sub_u8x64(self, rhs)
5982 }
5983}
5984impl<S: Simd> core::ops::SubAssign for u8x64<S> {
5985 #[doc = "Subtract two vectors element-wise, wrapping on overflow."]
5986 #[inline(always)]
5987 fn sub_assign(&mut self, rhs: Self) {
5988 *self = self.simd.sub_u8x64(*self, rhs);
5989 }
5990}
5991impl<S: Simd> core::ops::Sub<u8> for u8x64<S> {
5992 type Output = Self;
5993 #[inline(always)]
5994 fn sub(self, rhs: u8) -> Self::Output {
5995 self.simd.sub_u8x64(self, rhs.simd_into(self.simd))
5996 }
5997}
5998impl<S: Simd> core::ops::SubAssign<u8> for u8x64<S> {
5999 #[inline(always)]
6000 fn sub_assign(&mut self, rhs: u8) {
6001 *self = self.simd.sub_u8x64(*self, rhs.simd_into(self.simd));
6002 }
6003}
6004impl<S: Simd> core::ops::Sub<u8x64<S>> for u8 {
6005 type Output = u8x64<S>;
6006 #[inline(always)]
6007 fn sub(self, rhs: u8x64<S>) -> Self::Output {
6008 rhs.simd.sub_u8x64(self.simd_into(rhs.simd), rhs)
6009 }
6010}
6011impl<S: Simd> core::ops::Mul for u8x64<S> {
6012 type Output = Self;
6013 #[doc = "Multiply two vectors element-wise, wrapping on overflow."]
6014 #[inline(always)]
6015 fn mul(self, rhs: Self) -> Self::Output {
6016 self.simd.mul_u8x64(self, rhs)
6017 }
6018}
6019impl<S: Simd> core::ops::MulAssign for u8x64<S> {
6020 #[doc = "Multiply two vectors element-wise, wrapping on overflow."]
6021 #[inline(always)]
6022 fn mul_assign(&mut self, rhs: Self) {
6023 *self = self.simd.mul_u8x64(*self, rhs);
6024 }
6025}
6026impl<S: Simd> core::ops::Mul<u8> for u8x64<S> {
6027 type Output = Self;
6028 #[inline(always)]
6029 fn mul(self, rhs: u8) -> Self::Output {
6030 self.simd.mul_u8x64(self, rhs.simd_into(self.simd))
6031 }
6032}
6033impl<S: Simd> core::ops::MulAssign<u8> for u8x64<S> {
6034 #[inline(always)]
6035 fn mul_assign(&mut self, rhs: u8) {
6036 *self = self.simd.mul_u8x64(*self, rhs.simd_into(self.simd));
6037 }
6038}
6039impl<S: Simd> core::ops::Mul<u8x64<S>> for u8 {
6040 type Output = u8x64<S>;
6041 #[inline(always)]
6042 fn mul(self, rhs: u8x64<S>) -> Self::Output {
6043 rhs.simd.mul_u8x64(self.simd_into(rhs.simd), rhs)
6044 }
6045}
6046impl<S: Simd> core::ops::BitAnd for u8x64<S> {
6047 type Output = Self;
6048 #[doc = "Compute the bitwise AND of two vectors."]
6049 #[inline(always)]
6050 fn bitand(self, rhs: Self) -> Self::Output {
6051 self.simd.and_u8x64(self, rhs)
6052 }
6053}
6054impl<S: Simd> core::ops::BitAndAssign for u8x64<S> {
6055 #[doc = "Compute the bitwise AND of two vectors."]
6056 #[inline(always)]
6057 fn bitand_assign(&mut self, rhs: Self) {
6058 *self = self.simd.and_u8x64(*self, rhs);
6059 }
6060}
6061impl<S: Simd> core::ops::BitAnd<u8> for u8x64<S> {
6062 type Output = Self;
6063 #[inline(always)]
6064 fn bitand(self, rhs: u8) -> Self::Output {
6065 self.simd.and_u8x64(self, rhs.simd_into(self.simd))
6066 }
6067}
6068impl<S: Simd> core::ops::BitAndAssign<u8> for u8x64<S> {
6069 #[inline(always)]
6070 fn bitand_assign(&mut self, rhs: u8) {
6071 *self = self.simd.and_u8x64(*self, rhs.simd_into(self.simd));
6072 }
6073}
6074impl<S: Simd> core::ops::BitAnd<u8x64<S>> for u8 {
6075 type Output = u8x64<S>;
6076 #[inline(always)]
6077 fn bitand(self, rhs: u8x64<S>) -> Self::Output {
6078 rhs.simd.and_u8x64(self.simd_into(rhs.simd), rhs)
6079 }
6080}
6081impl<S: Simd> core::ops::BitOr for u8x64<S> {
6082 type Output = Self;
6083 #[doc = "Compute the bitwise OR of two vectors."]
6084 #[inline(always)]
6085 fn bitor(self, rhs: Self) -> Self::Output {
6086 self.simd.or_u8x64(self, rhs)
6087 }
6088}
6089impl<S: Simd> core::ops::BitOrAssign for u8x64<S> {
6090 #[doc = "Compute the bitwise OR of two vectors."]
6091 #[inline(always)]
6092 fn bitor_assign(&mut self, rhs: Self) {
6093 *self = self.simd.or_u8x64(*self, rhs);
6094 }
6095}
6096impl<S: Simd> core::ops::BitOr<u8> for u8x64<S> {
6097 type Output = Self;
6098 #[inline(always)]
6099 fn bitor(self, rhs: u8) -> Self::Output {
6100 self.simd.or_u8x64(self, rhs.simd_into(self.simd))
6101 }
6102}
6103impl<S: Simd> core::ops::BitOrAssign<u8> for u8x64<S> {
6104 #[inline(always)]
6105 fn bitor_assign(&mut self, rhs: u8) {
6106 *self = self.simd.or_u8x64(*self, rhs.simd_into(self.simd));
6107 }
6108}
6109impl<S: Simd> core::ops::BitOr<u8x64<S>> for u8 {
6110 type Output = u8x64<S>;
6111 #[inline(always)]
6112 fn bitor(self, rhs: u8x64<S>) -> Self::Output {
6113 rhs.simd.or_u8x64(self.simd_into(rhs.simd), rhs)
6114 }
6115}
6116impl<S: Simd> core::ops::BitXor for u8x64<S> {
6117 type Output = Self;
6118 #[doc = "Compute the bitwise XOR of two vectors."]
6119 #[inline(always)]
6120 fn bitxor(self, rhs: Self) -> Self::Output {
6121 self.simd.xor_u8x64(self, rhs)
6122 }
6123}
6124impl<S: Simd> core::ops::BitXorAssign for u8x64<S> {
6125 #[doc = "Compute the bitwise XOR of two vectors."]
6126 #[inline(always)]
6127 fn bitxor_assign(&mut self, rhs: Self) {
6128 *self = self.simd.xor_u8x64(*self, rhs);
6129 }
6130}
6131impl<S: Simd> core::ops::BitXor<u8> for u8x64<S> {
6132 type Output = Self;
6133 #[inline(always)]
6134 fn bitxor(self, rhs: u8) -> Self::Output {
6135 self.simd.xor_u8x64(self, rhs.simd_into(self.simd))
6136 }
6137}
6138impl<S: Simd> core::ops::BitXorAssign<u8> for u8x64<S> {
6139 #[inline(always)]
6140 fn bitxor_assign(&mut self, rhs: u8) {
6141 *self = self.simd.xor_u8x64(*self, rhs.simd_into(self.simd));
6142 }
6143}
6144impl<S: Simd> core::ops::BitXor<u8x64<S>> for u8 {
6145 type Output = u8x64<S>;
6146 #[inline(always)]
6147 fn bitxor(self, rhs: u8x64<S>) -> Self::Output {
6148 rhs.simd.xor_u8x64(self.simd_into(rhs.simd), rhs)
6149 }
6150}
6151impl<S: Simd> core::ops::Not for u8x64<S> {
6152 type Output = Self;
6153 #[doc = "Compute the bitwise NOT of the vector."]
6154 #[inline(always)]
6155 fn not(self) -> Self::Output {
6156 self.simd.not_u8x64(self)
6157 }
6158}
6159impl<S: Simd> core::ops::Shl<u32> for u8x64<S> {
6160 type Output = Self;
6161 #[doc = "Shift each element left by the given number of bits.\n\nBits shifted out of the left side are discarded, and zeros are shifted in on the right.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform."]
6162 #[inline(always)]
6163 fn shl(self, rhs: u32) -> Self::Output {
6164 self.simd.shl_u8x64(self, rhs)
6165 }
6166}
6167impl<S: Simd> core::ops::ShlAssign<u32> for u8x64<S> {
6168 #[inline(always)]
6169 fn shl_assign(&mut self, rhs: u32) {
6170 *self = self.simd.shl_u8x64(*self, rhs);
6171 }
6172}
6173impl<S: Simd> core::ops::Shl for u8x64<S> {
6174 type Output = Self;
6175 #[doc = "Shift each element left by the given number of bits.\n\nBits shifted out of the left side are discarded, and zeros are shifted in on the right.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform.\n\n# Performance\nThis per-lane shift is slower than shifting the entire vector by a scalar. It is not vectorized at all on WebAssembly, SSE4.2, and for `u8` and `i8` elements on AVX2. Prefer shifting by a single scalar value instead of by a vector whenever possible."]
6176 #[inline(always)]
6177 fn shl(self, rhs: Self) -> Self::Output {
6178 self.simd.shlv_u8x64(self, rhs)
6179 }
6180}
6181impl<S: Simd> core::ops::ShlAssign for u8x64<S> {
6182 #[doc = "Shift each element left by the given number of bits.\n\nBits shifted out of the left side are discarded, and zeros are shifted in on the right.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform.\n\n# Performance\nThis per-lane shift is slower than shifting the entire vector by a scalar. It is not vectorized at all on WebAssembly, SSE4.2, and for `u8` and `i8` elements on AVX2. Prefer shifting by a single scalar value instead of by a vector whenever possible."]
6183 #[inline(always)]
6184 fn shl_assign(&mut self, rhs: Self) {
6185 *self = self.simd.shlv_u8x64(*self, rhs);
6186 }
6187}
6188impl<S: Simd> core::ops::Shr<u32> for u8x64<S> {
6189 type Output = Self;
6190 #[doc = "Shift each element right by the given number of bits.\n\nFor unsigned integers, zeros are shifted in on the left. For signed integers, the sign bit is replicated.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform."]
6191 #[inline(always)]
6192 fn shr(self, rhs: u32) -> Self::Output {
6193 self.simd.shr_u8x64(self, rhs)
6194 }
6195}
6196impl<S: Simd> core::ops::ShrAssign<u32> for u8x64<S> {
6197 #[inline(always)]
6198 fn shr_assign(&mut self, rhs: u32) {
6199 *self = self.simd.shr_u8x64(*self, rhs);
6200 }
6201}
6202impl<S: Simd> core::ops::Shr for u8x64<S> {
6203 type Output = Self;
6204 #[doc = "Shift each element right by the corresponding element in another vector.\n\nFor unsigned integers, zeros are shifted in on the left. For signed integers, the sign bit is replicated.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform.\n\n# Performance\nThis per-lane shift is slower than shifting the entire vector by a scalar. It is not vectorized at all on WebAssembly, SSE4.2, and for `u8` and `i8` elements on AVX2. Prefer shifting by a single scalar value instead of by a vector whenever possible."]
6205 #[inline(always)]
6206 fn shr(self, rhs: Self) -> Self::Output {
6207 self.simd.shrv_u8x64(self, rhs)
6208 }
6209}
6210impl<S: Simd> core::ops::ShrAssign for u8x64<S> {
6211 #[doc = "Shift each element right by the corresponding element in another vector.\n\nFor unsigned integers, zeros are shifted in on the left. For signed integers, the sign bit is replicated.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform.\n\n# Performance\nThis per-lane shift is slower than shifting the entire vector by a scalar. It is not vectorized at all on WebAssembly, SSE4.2, and for `u8` and `i8` elements on AVX2. Prefer shifting by a single scalar value instead of by a vector whenever possible."]
6212 #[inline(always)]
6213 fn shr_assign(&mut self, rhs: Self) {
6214 *self = self.simd.shrv_u8x64(*self, rhs);
6215 }
6216}
6217impl<S: Simd> core::ops::BitAnd for mask8x64<S> {
6218 type Output = Self;
6219 #[doc = "Compute the logical AND of two masks."]
6220 #[inline(always)]
6221 fn bitand(self, rhs: Self) -> Self::Output {
6222 self.simd.and_mask8x64(self, rhs)
6223 }
6224}
6225impl<S: Simd> core::ops::BitAndAssign for mask8x64<S> {
6226 #[doc = "Compute the logical AND of two masks."]
6227 #[inline(always)]
6228 fn bitand_assign(&mut self, rhs: Self) {
6229 *self = self.simd.and_mask8x64(*self, rhs);
6230 }
6231}
6232impl<S: Simd> core::ops::BitOr for mask8x64<S> {
6233 type Output = Self;
6234 #[doc = "Compute the logical OR of two masks."]
6235 #[inline(always)]
6236 fn bitor(self, rhs: Self) -> Self::Output {
6237 self.simd.or_mask8x64(self, rhs)
6238 }
6239}
6240impl<S: Simd> core::ops::BitOrAssign for mask8x64<S> {
6241 #[doc = "Compute the logical OR of two masks."]
6242 #[inline(always)]
6243 fn bitor_assign(&mut self, rhs: Self) {
6244 *self = self.simd.or_mask8x64(*self, rhs);
6245 }
6246}
6247impl<S: Simd> core::ops::BitXor for mask8x64<S> {
6248 type Output = Self;
6249 #[doc = "Compute the logical XOR of two masks."]
6250 #[inline(always)]
6251 fn bitxor(self, rhs: Self) -> Self::Output {
6252 self.simd.xor_mask8x64(self, rhs)
6253 }
6254}
6255impl<S: Simd> core::ops::BitXorAssign for mask8x64<S> {
6256 #[doc = "Compute the logical XOR of two masks."]
6257 #[inline(always)]
6258 fn bitxor_assign(&mut self, rhs: Self) {
6259 *self = self.simd.xor_mask8x64(*self, rhs);
6260 }
6261}
6262impl<S: Simd> core::ops::Not for mask8x64<S> {
6263 type Output = Self;
6264 #[doc = "Compute the logical NOT of the mask."]
6265 #[inline(always)]
6266 fn not(self) -> Self::Output {
6267 self.simd.not_mask8x64(self)
6268 }
6269}
6270impl<S: Simd> core::ops::Neg for i16x32<S> {
6271 type Output = Self;
6272 #[doc = "Negate each element of the vector, wrapping on overflow."]
6273 #[inline(always)]
6274 fn neg(self) -> Self::Output {
6275 self.simd.neg_i16x32(self)
6276 }
6277}
6278impl<S: Simd> core::ops::Add for i16x32<S> {
6279 type Output = Self;
6280 #[doc = "Add two vectors element-wise, wrapping on overflow."]
6281 #[inline(always)]
6282 fn add(self, rhs: Self) -> Self::Output {
6283 self.simd.add_i16x32(self, rhs)
6284 }
6285}
6286impl<S: Simd> core::ops::AddAssign for i16x32<S> {
6287 #[doc = "Add two vectors element-wise, wrapping on overflow."]
6288 #[inline(always)]
6289 fn add_assign(&mut self, rhs: Self) {
6290 *self = self.simd.add_i16x32(*self, rhs);
6291 }
6292}
6293impl<S: Simd> core::ops::Add<i16> for i16x32<S> {
6294 type Output = Self;
6295 #[inline(always)]
6296 fn add(self, rhs: i16) -> Self::Output {
6297 self.simd.add_i16x32(self, rhs.simd_into(self.simd))
6298 }
6299}
6300impl<S: Simd> core::ops::AddAssign<i16> for i16x32<S> {
6301 #[inline(always)]
6302 fn add_assign(&mut self, rhs: i16) {
6303 *self = self.simd.add_i16x32(*self, rhs.simd_into(self.simd));
6304 }
6305}
6306impl<S: Simd> core::ops::Add<i16x32<S>> for i16 {
6307 type Output = i16x32<S>;
6308 #[inline(always)]
6309 fn add(self, rhs: i16x32<S>) -> Self::Output {
6310 rhs.simd.add_i16x32(self.simd_into(rhs.simd), rhs)
6311 }
6312}
6313impl<S: Simd> core::ops::Sub for i16x32<S> {
6314 type Output = Self;
6315 #[doc = "Subtract two vectors element-wise, wrapping on overflow."]
6316 #[inline(always)]
6317 fn sub(self, rhs: Self) -> Self::Output {
6318 self.simd.sub_i16x32(self, rhs)
6319 }
6320}
6321impl<S: Simd> core::ops::SubAssign for i16x32<S> {
6322 #[doc = "Subtract two vectors element-wise, wrapping on overflow."]
6323 #[inline(always)]
6324 fn sub_assign(&mut self, rhs: Self) {
6325 *self = self.simd.sub_i16x32(*self, rhs);
6326 }
6327}
6328impl<S: Simd> core::ops::Sub<i16> for i16x32<S> {
6329 type Output = Self;
6330 #[inline(always)]
6331 fn sub(self, rhs: i16) -> Self::Output {
6332 self.simd.sub_i16x32(self, rhs.simd_into(self.simd))
6333 }
6334}
6335impl<S: Simd> core::ops::SubAssign<i16> for i16x32<S> {
6336 #[inline(always)]
6337 fn sub_assign(&mut self, rhs: i16) {
6338 *self = self.simd.sub_i16x32(*self, rhs.simd_into(self.simd));
6339 }
6340}
6341impl<S: Simd> core::ops::Sub<i16x32<S>> for i16 {
6342 type Output = i16x32<S>;
6343 #[inline(always)]
6344 fn sub(self, rhs: i16x32<S>) -> Self::Output {
6345 rhs.simd.sub_i16x32(self.simd_into(rhs.simd), rhs)
6346 }
6347}
6348impl<S: Simd> core::ops::Mul for i16x32<S> {
6349 type Output = Self;
6350 #[doc = "Multiply two vectors element-wise, wrapping on overflow."]
6351 #[inline(always)]
6352 fn mul(self, rhs: Self) -> Self::Output {
6353 self.simd.mul_i16x32(self, rhs)
6354 }
6355}
6356impl<S: Simd> core::ops::MulAssign for i16x32<S> {
6357 #[doc = "Multiply two vectors element-wise, wrapping on overflow."]
6358 #[inline(always)]
6359 fn mul_assign(&mut self, rhs: Self) {
6360 *self = self.simd.mul_i16x32(*self, rhs);
6361 }
6362}
6363impl<S: Simd> core::ops::Mul<i16> for i16x32<S> {
6364 type Output = Self;
6365 #[inline(always)]
6366 fn mul(self, rhs: i16) -> Self::Output {
6367 self.simd.mul_i16x32(self, rhs.simd_into(self.simd))
6368 }
6369}
6370impl<S: Simd> core::ops::MulAssign<i16> for i16x32<S> {
6371 #[inline(always)]
6372 fn mul_assign(&mut self, rhs: i16) {
6373 *self = self.simd.mul_i16x32(*self, rhs.simd_into(self.simd));
6374 }
6375}
6376impl<S: Simd> core::ops::Mul<i16x32<S>> for i16 {
6377 type Output = i16x32<S>;
6378 #[inline(always)]
6379 fn mul(self, rhs: i16x32<S>) -> Self::Output {
6380 rhs.simd.mul_i16x32(self.simd_into(rhs.simd), rhs)
6381 }
6382}
6383impl<S: Simd> core::ops::BitAnd for i16x32<S> {
6384 type Output = Self;
6385 #[doc = "Compute the bitwise AND of two vectors."]
6386 #[inline(always)]
6387 fn bitand(self, rhs: Self) -> Self::Output {
6388 self.simd.and_i16x32(self, rhs)
6389 }
6390}
6391impl<S: Simd> core::ops::BitAndAssign for i16x32<S> {
6392 #[doc = "Compute the bitwise AND of two vectors."]
6393 #[inline(always)]
6394 fn bitand_assign(&mut self, rhs: Self) {
6395 *self = self.simd.and_i16x32(*self, rhs);
6396 }
6397}
6398impl<S: Simd> core::ops::BitAnd<i16> for i16x32<S> {
6399 type Output = Self;
6400 #[inline(always)]
6401 fn bitand(self, rhs: i16) -> Self::Output {
6402 self.simd.and_i16x32(self, rhs.simd_into(self.simd))
6403 }
6404}
6405impl<S: Simd> core::ops::BitAndAssign<i16> for i16x32<S> {
6406 #[inline(always)]
6407 fn bitand_assign(&mut self, rhs: i16) {
6408 *self = self.simd.and_i16x32(*self, rhs.simd_into(self.simd));
6409 }
6410}
6411impl<S: Simd> core::ops::BitAnd<i16x32<S>> for i16 {
6412 type Output = i16x32<S>;
6413 #[inline(always)]
6414 fn bitand(self, rhs: i16x32<S>) -> Self::Output {
6415 rhs.simd.and_i16x32(self.simd_into(rhs.simd), rhs)
6416 }
6417}
6418impl<S: Simd> core::ops::BitOr for i16x32<S> {
6419 type Output = Self;
6420 #[doc = "Compute the bitwise OR of two vectors."]
6421 #[inline(always)]
6422 fn bitor(self, rhs: Self) -> Self::Output {
6423 self.simd.or_i16x32(self, rhs)
6424 }
6425}
6426impl<S: Simd> core::ops::BitOrAssign for i16x32<S> {
6427 #[doc = "Compute the bitwise OR of two vectors."]
6428 #[inline(always)]
6429 fn bitor_assign(&mut self, rhs: Self) {
6430 *self = self.simd.or_i16x32(*self, rhs);
6431 }
6432}
6433impl<S: Simd> core::ops::BitOr<i16> for i16x32<S> {
6434 type Output = Self;
6435 #[inline(always)]
6436 fn bitor(self, rhs: i16) -> Self::Output {
6437 self.simd.or_i16x32(self, rhs.simd_into(self.simd))
6438 }
6439}
6440impl<S: Simd> core::ops::BitOrAssign<i16> for i16x32<S> {
6441 #[inline(always)]
6442 fn bitor_assign(&mut self, rhs: i16) {
6443 *self = self.simd.or_i16x32(*self, rhs.simd_into(self.simd));
6444 }
6445}
6446impl<S: Simd> core::ops::BitOr<i16x32<S>> for i16 {
6447 type Output = i16x32<S>;
6448 #[inline(always)]
6449 fn bitor(self, rhs: i16x32<S>) -> Self::Output {
6450 rhs.simd.or_i16x32(self.simd_into(rhs.simd), rhs)
6451 }
6452}
6453impl<S: Simd> core::ops::BitXor for i16x32<S> {
6454 type Output = Self;
6455 #[doc = "Compute the bitwise XOR of two vectors."]
6456 #[inline(always)]
6457 fn bitxor(self, rhs: Self) -> Self::Output {
6458 self.simd.xor_i16x32(self, rhs)
6459 }
6460}
6461impl<S: Simd> core::ops::BitXorAssign for i16x32<S> {
6462 #[doc = "Compute the bitwise XOR of two vectors."]
6463 #[inline(always)]
6464 fn bitxor_assign(&mut self, rhs: Self) {
6465 *self = self.simd.xor_i16x32(*self, rhs);
6466 }
6467}
6468impl<S: Simd> core::ops::BitXor<i16> for i16x32<S> {
6469 type Output = Self;
6470 #[inline(always)]
6471 fn bitxor(self, rhs: i16) -> Self::Output {
6472 self.simd.xor_i16x32(self, rhs.simd_into(self.simd))
6473 }
6474}
6475impl<S: Simd> core::ops::BitXorAssign<i16> for i16x32<S> {
6476 #[inline(always)]
6477 fn bitxor_assign(&mut self, rhs: i16) {
6478 *self = self.simd.xor_i16x32(*self, rhs.simd_into(self.simd));
6479 }
6480}
6481impl<S: Simd> core::ops::BitXor<i16x32<S>> for i16 {
6482 type Output = i16x32<S>;
6483 #[inline(always)]
6484 fn bitxor(self, rhs: i16x32<S>) -> Self::Output {
6485 rhs.simd.xor_i16x32(self.simd_into(rhs.simd), rhs)
6486 }
6487}
6488impl<S: Simd> core::ops::Not for i16x32<S> {
6489 type Output = Self;
6490 #[doc = "Compute the bitwise NOT of the vector."]
6491 #[inline(always)]
6492 fn not(self) -> Self::Output {
6493 self.simd.not_i16x32(self)
6494 }
6495}
6496impl<S: Simd> core::ops::Shl<u32> for i16x32<S> {
6497 type Output = Self;
6498 #[doc = "Shift each element left by the given number of bits.\n\nBits shifted out of the left side are discarded, and zeros are shifted in on the right.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform."]
6499 #[inline(always)]
6500 fn shl(self, rhs: u32) -> Self::Output {
6501 self.simd.shl_i16x32(self, rhs)
6502 }
6503}
6504impl<S: Simd> core::ops::ShlAssign<u32> for i16x32<S> {
6505 #[inline(always)]
6506 fn shl_assign(&mut self, rhs: u32) {
6507 *self = self.simd.shl_i16x32(*self, rhs);
6508 }
6509}
6510impl<S: Simd> core::ops::Shl for i16x32<S> {
6511 type Output = Self;
6512 #[doc = "Shift each element left by the given number of bits.\n\nBits shifted out of the left side are discarded, and zeros are shifted in on the right.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform.\n\n# Performance\nThis per-lane shift is slower than shifting the entire vector by a scalar. It is not vectorized at all on WebAssembly, SSE4.2, and for `u8` and `i8` elements on AVX2. Prefer shifting by a single scalar value instead of by a vector whenever possible."]
6513 #[inline(always)]
6514 fn shl(self, rhs: Self) -> Self::Output {
6515 self.simd.shlv_i16x32(self, rhs)
6516 }
6517}
6518impl<S: Simd> core::ops::ShlAssign for i16x32<S> {
6519 #[doc = "Shift each element left by the given number of bits.\n\nBits shifted out of the left side are discarded, and zeros are shifted in on the right.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform.\n\n# Performance\nThis per-lane shift is slower than shifting the entire vector by a scalar. It is not vectorized at all on WebAssembly, SSE4.2, and for `u8` and `i8` elements on AVX2. Prefer shifting by a single scalar value instead of by a vector whenever possible."]
6520 #[inline(always)]
6521 fn shl_assign(&mut self, rhs: Self) {
6522 *self = self.simd.shlv_i16x32(*self, rhs);
6523 }
6524}
6525impl<S: Simd> core::ops::Shr<u32> for i16x32<S> {
6526 type Output = Self;
6527 #[doc = "Shift each element right by the given number of bits.\n\nFor unsigned integers, zeros are shifted in on the left. For signed integers, the sign bit is replicated.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform."]
6528 #[inline(always)]
6529 fn shr(self, rhs: u32) -> Self::Output {
6530 self.simd.shr_i16x32(self, rhs)
6531 }
6532}
6533impl<S: Simd> core::ops::ShrAssign<u32> for i16x32<S> {
6534 #[inline(always)]
6535 fn shr_assign(&mut self, rhs: u32) {
6536 *self = self.simd.shr_i16x32(*self, rhs);
6537 }
6538}
6539impl<S: Simd> core::ops::Shr for i16x32<S> {
6540 type Output = Self;
6541 #[doc = "Shift each element right by the corresponding element in another vector.\n\nFor unsigned integers, zeros are shifted in on the left. For signed integers, the sign bit is replicated.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform.\n\n# Performance\nThis per-lane shift is slower than shifting the entire vector by a scalar. It is not vectorized at all on WebAssembly, SSE4.2, and for `u8` and `i8` elements on AVX2. Prefer shifting by a single scalar value instead of by a vector whenever possible."]
6542 #[inline(always)]
6543 fn shr(self, rhs: Self) -> Self::Output {
6544 self.simd.shrv_i16x32(self, rhs)
6545 }
6546}
6547impl<S: Simd> core::ops::ShrAssign for i16x32<S> {
6548 #[doc = "Shift each element right by the corresponding element in another vector.\n\nFor unsigned integers, zeros are shifted in on the left. For signed integers, the sign bit is replicated.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform.\n\n# Performance\nThis per-lane shift is slower than shifting the entire vector by a scalar. It is not vectorized at all on WebAssembly, SSE4.2, and for `u8` and `i8` elements on AVX2. Prefer shifting by a single scalar value instead of by a vector whenever possible."]
6549 #[inline(always)]
6550 fn shr_assign(&mut self, rhs: Self) {
6551 *self = self.simd.shrv_i16x32(*self, rhs);
6552 }
6553}
6554impl<S: Simd> core::ops::Add for u16x32<S> {
6555 type Output = Self;
6556 #[doc = "Add two vectors element-wise, wrapping on overflow."]
6557 #[inline(always)]
6558 fn add(self, rhs: Self) -> Self::Output {
6559 self.simd.add_u16x32(self, rhs)
6560 }
6561}
6562impl<S: Simd> core::ops::AddAssign for u16x32<S> {
6563 #[doc = "Add two vectors element-wise, wrapping on overflow."]
6564 #[inline(always)]
6565 fn add_assign(&mut self, rhs: Self) {
6566 *self = self.simd.add_u16x32(*self, rhs);
6567 }
6568}
6569impl<S: Simd> core::ops::Add<u16> for u16x32<S> {
6570 type Output = Self;
6571 #[inline(always)]
6572 fn add(self, rhs: u16) -> Self::Output {
6573 self.simd.add_u16x32(self, rhs.simd_into(self.simd))
6574 }
6575}
6576impl<S: Simd> core::ops::AddAssign<u16> for u16x32<S> {
6577 #[inline(always)]
6578 fn add_assign(&mut self, rhs: u16) {
6579 *self = self.simd.add_u16x32(*self, rhs.simd_into(self.simd));
6580 }
6581}
6582impl<S: Simd> core::ops::Add<u16x32<S>> for u16 {
6583 type Output = u16x32<S>;
6584 #[inline(always)]
6585 fn add(self, rhs: u16x32<S>) -> Self::Output {
6586 rhs.simd.add_u16x32(self.simd_into(rhs.simd), rhs)
6587 }
6588}
6589impl<S: Simd> core::ops::Sub for u16x32<S> {
6590 type Output = Self;
6591 #[doc = "Subtract two vectors element-wise, wrapping on overflow."]
6592 #[inline(always)]
6593 fn sub(self, rhs: Self) -> Self::Output {
6594 self.simd.sub_u16x32(self, rhs)
6595 }
6596}
6597impl<S: Simd> core::ops::SubAssign for u16x32<S> {
6598 #[doc = "Subtract two vectors element-wise, wrapping on overflow."]
6599 #[inline(always)]
6600 fn sub_assign(&mut self, rhs: Self) {
6601 *self = self.simd.sub_u16x32(*self, rhs);
6602 }
6603}
6604impl<S: Simd> core::ops::Sub<u16> for u16x32<S> {
6605 type Output = Self;
6606 #[inline(always)]
6607 fn sub(self, rhs: u16) -> Self::Output {
6608 self.simd.sub_u16x32(self, rhs.simd_into(self.simd))
6609 }
6610}
6611impl<S: Simd> core::ops::SubAssign<u16> for u16x32<S> {
6612 #[inline(always)]
6613 fn sub_assign(&mut self, rhs: u16) {
6614 *self = self.simd.sub_u16x32(*self, rhs.simd_into(self.simd));
6615 }
6616}
6617impl<S: Simd> core::ops::Sub<u16x32<S>> for u16 {
6618 type Output = u16x32<S>;
6619 #[inline(always)]
6620 fn sub(self, rhs: u16x32<S>) -> Self::Output {
6621 rhs.simd.sub_u16x32(self.simd_into(rhs.simd), rhs)
6622 }
6623}
6624impl<S: Simd> core::ops::Mul for u16x32<S> {
6625 type Output = Self;
6626 #[doc = "Multiply two vectors element-wise, wrapping on overflow."]
6627 #[inline(always)]
6628 fn mul(self, rhs: Self) -> Self::Output {
6629 self.simd.mul_u16x32(self, rhs)
6630 }
6631}
6632impl<S: Simd> core::ops::MulAssign for u16x32<S> {
6633 #[doc = "Multiply two vectors element-wise, wrapping on overflow."]
6634 #[inline(always)]
6635 fn mul_assign(&mut self, rhs: Self) {
6636 *self = self.simd.mul_u16x32(*self, rhs);
6637 }
6638}
6639impl<S: Simd> core::ops::Mul<u16> for u16x32<S> {
6640 type Output = Self;
6641 #[inline(always)]
6642 fn mul(self, rhs: u16) -> Self::Output {
6643 self.simd.mul_u16x32(self, rhs.simd_into(self.simd))
6644 }
6645}
6646impl<S: Simd> core::ops::MulAssign<u16> for u16x32<S> {
6647 #[inline(always)]
6648 fn mul_assign(&mut self, rhs: u16) {
6649 *self = self.simd.mul_u16x32(*self, rhs.simd_into(self.simd));
6650 }
6651}
6652impl<S: Simd> core::ops::Mul<u16x32<S>> for u16 {
6653 type Output = u16x32<S>;
6654 #[inline(always)]
6655 fn mul(self, rhs: u16x32<S>) -> Self::Output {
6656 rhs.simd.mul_u16x32(self.simd_into(rhs.simd), rhs)
6657 }
6658}
6659impl<S: Simd> core::ops::BitAnd for u16x32<S> {
6660 type Output = Self;
6661 #[doc = "Compute the bitwise AND of two vectors."]
6662 #[inline(always)]
6663 fn bitand(self, rhs: Self) -> Self::Output {
6664 self.simd.and_u16x32(self, rhs)
6665 }
6666}
6667impl<S: Simd> core::ops::BitAndAssign for u16x32<S> {
6668 #[doc = "Compute the bitwise AND of two vectors."]
6669 #[inline(always)]
6670 fn bitand_assign(&mut self, rhs: Self) {
6671 *self = self.simd.and_u16x32(*self, rhs);
6672 }
6673}
6674impl<S: Simd> core::ops::BitAnd<u16> for u16x32<S> {
6675 type Output = Self;
6676 #[inline(always)]
6677 fn bitand(self, rhs: u16) -> Self::Output {
6678 self.simd.and_u16x32(self, rhs.simd_into(self.simd))
6679 }
6680}
6681impl<S: Simd> core::ops::BitAndAssign<u16> for u16x32<S> {
6682 #[inline(always)]
6683 fn bitand_assign(&mut self, rhs: u16) {
6684 *self = self.simd.and_u16x32(*self, rhs.simd_into(self.simd));
6685 }
6686}
6687impl<S: Simd> core::ops::BitAnd<u16x32<S>> for u16 {
6688 type Output = u16x32<S>;
6689 #[inline(always)]
6690 fn bitand(self, rhs: u16x32<S>) -> Self::Output {
6691 rhs.simd.and_u16x32(self.simd_into(rhs.simd), rhs)
6692 }
6693}
6694impl<S: Simd> core::ops::BitOr for u16x32<S> {
6695 type Output = Self;
6696 #[doc = "Compute the bitwise OR of two vectors."]
6697 #[inline(always)]
6698 fn bitor(self, rhs: Self) -> Self::Output {
6699 self.simd.or_u16x32(self, rhs)
6700 }
6701}
6702impl<S: Simd> core::ops::BitOrAssign for u16x32<S> {
6703 #[doc = "Compute the bitwise OR of two vectors."]
6704 #[inline(always)]
6705 fn bitor_assign(&mut self, rhs: Self) {
6706 *self = self.simd.or_u16x32(*self, rhs);
6707 }
6708}
6709impl<S: Simd> core::ops::BitOr<u16> for u16x32<S> {
6710 type Output = Self;
6711 #[inline(always)]
6712 fn bitor(self, rhs: u16) -> Self::Output {
6713 self.simd.or_u16x32(self, rhs.simd_into(self.simd))
6714 }
6715}
6716impl<S: Simd> core::ops::BitOrAssign<u16> for u16x32<S> {
6717 #[inline(always)]
6718 fn bitor_assign(&mut self, rhs: u16) {
6719 *self = self.simd.or_u16x32(*self, rhs.simd_into(self.simd));
6720 }
6721}
6722impl<S: Simd> core::ops::BitOr<u16x32<S>> for u16 {
6723 type Output = u16x32<S>;
6724 #[inline(always)]
6725 fn bitor(self, rhs: u16x32<S>) -> Self::Output {
6726 rhs.simd.or_u16x32(self.simd_into(rhs.simd), rhs)
6727 }
6728}
6729impl<S: Simd> core::ops::BitXor for u16x32<S> {
6730 type Output = Self;
6731 #[doc = "Compute the bitwise XOR of two vectors."]
6732 #[inline(always)]
6733 fn bitxor(self, rhs: Self) -> Self::Output {
6734 self.simd.xor_u16x32(self, rhs)
6735 }
6736}
6737impl<S: Simd> core::ops::BitXorAssign for u16x32<S> {
6738 #[doc = "Compute the bitwise XOR of two vectors."]
6739 #[inline(always)]
6740 fn bitxor_assign(&mut self, rhs: Self) {
6741 *self = self.simd.xor_u16x32(*self, rhs);
6742 }
6743}
6744impl<S: Simd> core::ops::BitXor<u16> for u16x32<S> {
6745 type Output = Self;
6746 #[inline(always)]
6747 fn bitxor(self, rhs: u16) -> Self::Output {
6748 self.simd.xor_u16x32(self, rhs.simd_into(self.simd))
6749 }
6750}
6751impl<S: Simd> core::ops::BitXorAssign<u16> for u16x32<S> {
6752 #[inline(always)]
6753 fn bitxor_assign(&mut self, rhs: u16) {
6754 *self = self.simd.xor_u16x32(*self, rhs.simd_into(self.simd));
6755 }
6756}
6757impl<S: Simd> core::ops::BitXor<u16x32<S>> for u16 {
6758 type Output = u16x32<S>;
6759 #[inline(always)]
6760 fn bitxor(self, rhs: u16x32<S>) -> Self::Output {
6761 rhs.simd.xor_u16x32(self.simd_into(rhs.simd), rhs)
6762 }
6763}
6764impl<S: Simd> core::ops::Not for u16x32<S> {
6765 type Output = Self;
6766 #[doc = "Compute the bitwise NOT of the vector."]
6767 #[inline(always)]
6768 fn not(self) -> Self::Output {
6769 self.simd.not_u16x32(self)
6770 }
6771}
6772impl<S: Simd> core::ops::Shl<u32> for u16x32<S> {
6773 type Output = Self;
6774 #[doc = "Shift each element left by the given number of bits.\n\nBits shifted out of the left side are discarded, and zeros are shifted in on the right.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform."]
6775 #[inline(always)]
6776 fn shl(self, rhs: u32) -> Self::Output {
6777 self.simd.shl_u16x32(self, rhs)
6778 }
6779}
6780impl<S: Simd> core::ops::ShlAssign<u32> for u16x32<S> {
6781 #[inline(always)]
6782 fn shl_assign(&mut self, rhs: u32) {
6783 *self = self.simd.shl_u16x32(*self, rhs);
6784 }
6785}
6786impl<S: Simd> core::ops::Shl for u16x32<S> {
6787 type Output = Self;
6788 #[doc = "Shift each element left by the given number of bits.\n\nBits shifted out of the left side are discarded, and zeros are shifted in on the right.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform.\n\n# Performance\nThis per-lane shift is slower than shifting the entire vector by a scalar. It is not vectorized at all on WebAssembly, SSE4.2, and for `u8` and `i8` elements on AVX2. Prefer shifting by a single scalar value instead of by a vector whenever possible."]
6789 #[inline(always)]
6790 fn shl(self, rhs: Self) -> Self::Output {
6791 self.simd.shlv_u16x32(self, rhs)
6792 }
6793}
6794impl<S: Simd> core::ops::ShlAssign for u16x32<S> {
6795 #[doc = "Shift each element left by the given number of bits.\n\nBits shifted out of the left side are discarded, and zeros are shifted in on the right.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform.\n\n# Performance\nThis per-lane shift is slower than shifting the entire vector by a scalar. It is not vectorized at all on WebAssembly, SSE4.2, and for `u8` and `i8` elements on AVX2. Prefer shifting by a single scalar value instead of by a vector whenever possible."]
6796 #[inline(always)]
6797 fn shl_assign(&mut self, rhs: Self) {
6798 *self = self.simd.shlv_u16x32(*self, rhs);
6799 }
6800}
6801impl<S: Simd> core::ops::Shr<u32> for u16x32<S> {
6802 type Output = Self;
6803 #[doc = "Shift each element right by the given number of bits.\n\nFor unsigned integers, zeros are shifted in on the left. For signed integers, the sign bit is replicated.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform."]
6804 #[inline(always)]
6805 fn shr(self, rhs: u32) -> Self::Output {
6806 self.simd.shr_u16x32(self, rhs)
6807 }
6808}
6809impl<S: Simd> core::ops::ShrAssign<u32> for u16x32<S> {
6810 #[inline(always)]
6811 fn shr_assign(&mut self, rhs: u32) {
6812 *self = self.simd.shr_u16x32(*self, rhs);
6813 }
6814}
6815impl<S: Simd> core::ops::Shr for u16x32<S> {
6816 type Output = Self;
6817 #[doc = "Shift each element right by the corresponding element in another vector.\n\nFor unsigned integers, zeros are shifted in on the left. For signed integers, the sign bit is replicated.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform.\n\n# Performance\nThis per-lane shift is slower than shifting the entire vector by a scalar. It is not vectorized at all on WebAssembly, SSE4.2, and for `u8` and `i8` elements on AVX2. Prefer shifting by a single scalar value instead of by a vector whenever possible."]
6818 #[inline(always)]
6819 fn shr(self, rhs: Self) -> Self::Output {
6820 self.simd.shrv_u16x32(self, rhs)
6821 }
6822}
6823impl<S: Simd> core::ops::ShrAssign for u16x32<S> {
6824 #[doc = "Shift each element right by the corresponding element in another vector.\n\nFor unsigned integers, zeros are shifted in on the left. For signed integers, the sign bit is replicated.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform.\n\n# Performance\nThis per-lane shift is slower than shifting the entire vector by a scalar. It is not vectorized at all on WebAssembly, SSE4.2, and for `u8` and `i8` elements on AVX2. Prefer shifting by a single scalar value instead of by a vector whenever possible."]
6825 #[inline(always)]
6826 fn shr_assign(&mut self, rhs: Self) {
6827 *self = self.simd.shrv_u16x32(*self, rhs);
6828 }
6829}
6830impl<S: Simd> core::ops::BitAnd for mask16x32<S> {
6831 type Output = Self;
6832 #[doc = "Compute the logical AND of two masks."]
6833 #[inline(always)]
6834 fn bitand(self, rhs: Self) -> Self::Output {
6835 self.simd.and_mask16x32(self, rhs)
6836 }
6837}
6838impl<S: Simd> core::ops::BitAndAssign for mask16x32<S> {
6839 #[doc = "Compute the logical AND of two masks."]
6840 #[inline(always)]
6841 fn bitand_assign(&mut self, rhs: Self) {
6842 *self = self.simd.and_mask16x32(*self, rhs);
6843 }
6844}
6845impl<S: Simd> core::ops::BitOr for mask16x32<S> {
6846 type Output = Self;
6847 #[doc = "Compute the logical OR of two masks."]
6848 #[inline(always)]
6849 fn bitor(self, rhs: Self) -> Self::Output {
6850 self.simd.or_mask16x32(self, rhs)
6851 }
6852}
6853impl<S: Simd> core::ops::BitOrAssign for mask16x32<S> {
6854 #[doc = "Compute the logical OR of two masks."]
6855 #[inline(always)]
6856 fn bitor_assign(&mut self, rhs: Self) {
6857 *self = self.simd.or_mask16x32(*self, rhs);
6858 }
6859}
6860impl<S: Simd> core::ops::BitXor for mask16x32<S> {
6861 type Output = Self;
6862 #[doc = "Compute the logical XOR of two masks."]
6863 #[inline(always)]
6864 fn bitxor(self, rhs: Self) -> Self::Output {
6865 self.simd.xor_mask16x32(self, rhs)
6866 }
6867}
6868impl<S: Simd> core::ops::BitXorAssign for mask16x32<S> {
6869 #[doc = "Compute the logical XOR of two masks."]
6870 #[inline(always)]
6871 fn bitxor_assign(&mut self, rhs: Self) {
6872 *self = self.simd.xor_mask16x32(*self, rhs);
6873 }
6874}
6875impl<S: Simd> core::ops::Not for mask16x32<S> {
6876 type Output = Self;
6877 #[doc = "Compute the logical NOT of the mask."]
6878 #[inline(always)]
6879 fn not(self) -> Self::Output {
6880 self.simd.not_mask16x32(self)
6881 }
6882}
6883impl<S: Simd> core::ops::Neg for i32x16<S> {
6884 type Output = Self;
6885 #[doc = "Negate each element of the vector, wrapping on overflow."]
6886 #[inline(always)]
6887 fn neg(self) -> Self::Output {
6888 self.simd.neg_i32x16(self)
6889 }
6890}
6891impl<S: Simd> core::ops::Add for i32x16<S> {
6892 type Output = Self;
6893 #[doc = "Add two vectors element-wise, wrapping on overflow."]
6894 #[inline(always)]
6895 fn add(self, rhs: Self) -> Self::Output {
6896 self.simd.add_i32x16(self, rhs)
6897 }
6898}
6899impl<S: Simd> core::ops::AddAssign for i32x16<S> {
6900 #[doc = "Add two vectors element-wise, wrapping on overflow."]
6901 #[inline(always)]
6902 fn add_assign(&mut self, rhs: Self) {
6903 *self = self.simd.add_i32x16(*self, rhs);
6904 }
6905}
6906impl<S: Simd> core::ops::Add<i32> for i32x16<S> {
6907 type Output = Self;
6908 #[inline(always)]
6909 fn add(self, rhs: i32) -> Self::Output {
6910 self.simd.add_i32x16(self, rhs.simd_into(self.simd))
6911 }
6912}
6913impl<S: Simd> core::ops::AddAssign<i32> for i32x16<S> {
6914 #[inline(always)]
6915 fn add_assign(&mut self, rhs: i32) {
6916 *self = self.simd.add_i32x16(*self, rhs.simd_into(self.simd));
6917 }
6918}
6919impl<S: Simd> core::ops::Add<i32x16<S>> for i32 {
6920 type Output = i32x16<S>;
6921 #[inline(always)]
6922 fn add(self, rhs: i32x16<S>) -> Self::Output {
6923 rhs.simd.add_i32x16(self.simd_into(rhs.simd), rhs)
6924 }
6925}
6926impl<S: Simd> core::ops::Sub for i32x16<S> {
6927 type Output = Self;
6928 #[doc = "Subtract two vectors element-wise, wrapping on overflow."]
6929 #[inline(always)]
6930 fn sub(self, rhs: Self) -> Self::Output {
6931 self.simd.sub_i32x16(self, rhs)
6932 }
6933}
6934impl<S: Simd> core::ops::SubAssign for i32x16<S> {
6935 #[doc = "Subtract two vectors element-wise, wrapping on overflow."]
6936 #[inline(always)]
6937 fn sub_assign(&mut self, rhs: Self) {
6938 *self = self.simd.sub_i32x16(*self, rhs);
6939 }
6940}
6941impl<S: Simd> core::ops::Sub<i32> for i32x16<S> {
6942 type Output = Self;
6943 #[inline(always)]
6944 fn sub(self, rhs: i32) -> Self::Output {
6945 self.simd.sub_i32x16(self, rhs.simd_into(self.simd))
6946 }
6947}
6948impl<S: Simd> core::ops::SubAssign<i32> for i32x16<S> {
6949 #[inline(always)]
6950 fn sub_assign(&mut self, rhs: i32) {
6951 *self = self.simd.sub_i32x16(*self, rhs.simd_into(self.simd));
6952 }
6953}
6954impl<S: Simd> core::ops::Sub<i32x16<S>> for i32 {
6955 type Output = i32x16<S>;
6956 #[inline(always)]
6957 fn sub(self, rhs: i32x16<S>) -> Self::Output {
6958 rhs.simd.sub_i32x16(self.simd_into(rhs.simd), rhs)
6959 }
6960}
6961impl<S: Simd> core::ops::Mul for i32x16<S> {
6962 type Output = Self;
6963 #[doc = "Multiply two vectors element-wise, wrapping on overflow."]
6964 #[inline(always)]
6965 fn mul(self, rhs: Self) -> Self::Output {
6966 self.simd.mul_i32x16(self, rhs)
6967 }
6968}
6969impl<S: Simd> core::ops::MulAssign for i32x16<S> {
6970 #[doc = "Multiply two vectors element-wise, wrapping on overflow."]
6971 #[inline(always)]
6972 fn mul_assign(&mut self, rhs: Self) {
6973 *self = self.simd.mul_i32x16(*self, rhs);
6974 }
6975}
6976impl<S: Simd> core::ops::Mul<i32> for i32x16<S> {
6977 type Output = Self;
6978 #[inline(always)]
6979 fn mul(self, rhs: i32) -> Self::Output {
6980 self.simd.mul_i32x16(self, rhs.simd_into(self.simd))
6981 }
6982}
6983impl<S: Simd> core::ops::MulAssign<i32> for i32x16<S> {
6984 #[inline(always)]
6985 fn mul_assign(&mut self, rhs: i32) {
6986 *self = self.simd.mul_i32x16(*self, rhs.simd_into(self.simd));
6987 }
6988}
6989impl<S: Simd> core::ops::Mul<i32x16<S>> for i32 {
6990 type Output = i32x16<S>;
6991 #[inline(always)]
6992 fn mul(self, rhs: i32x16<S>) -> Self::Output {
6993 rhs.simd.mul_i32x16(self.simd_into(rhs.simd), rhs)
6994 }
6995}
6996impl<S: Simd> core::ops::BitAnd for i32x16<S> {
6997 type Output = Self;
6998 #[doc = "Compute the bitwise AND of two vectors."]
6999 #[inline(always)]
7000 fn bitand(self, rhs: Self) -> Self::Output {
7001 self.simd.and_i32x16(self, rhs)
7002 }
7003}
7004impl<S: Simd> core::ops::BitAndAssign for i32x16<S> {
7005 #[doc = "Compute the bitwise AND of two vectors."]
7006 #[inline(always)]
7007 fn bitand_assign(&mut self, rhs: Self) {
7008 *self = self.simd.and_i32x16(*self, rhs);
7009 }
7010}
7011impl<S: Simd> core::ops::BitAnd<i32> for i32x16<S> {
7012 type Output = Self;
7013 #[inline(always)]
7014 fn bitand(self, rhs: i32) -> Self::Output {
7015 self.simd.and_i32x16(self, rhs.simd_into(self.simd))
7016 }
7017}
7018impl<S: Simd> core::ops::BitAndAssign<i32> for i32x16<S> {
7019 #[inline(always)]
7020 fn bitand_assign(&mut self, rhs: i32) {
7021 *self = self.simd.and_i32x16(*self, rhs.simd_into(self.simd));
7022 }
7023}
7024impl<S: Simd> core::ops::BitAnd<i32x16<S>> for i32 {
7025 type Output = i32x16<S>;
7026 #[inline(always)]
7027 fn bitand(self, rhs: i32x16<S>) -> Self::Output {
7028 rhs.simd.and_i32x16(self.simd_into(rhs.simd), rhs)
7029 }
7030}
7031impl<S: Simd> core::ops::BitOr for i32x16<S> {
7032 type Output = Self;
7033 #[doc = "Compute the bitwise OR of two vectors."]
7034 #[inline(always)]
7035 fn bitor(self, rhs: Self) -> Self::Output {
7036 self.simd.or_i32x16(self, rhs)
7037 }
7038}
7039impl<S: Simd> core::ops::BitOrAssign for i32x16<S> {
7040 #[doc = "Compute the bitwise OR of two vectors."]
7041 #[inline(always)]
7042 fn bitor_assign(&mut self, rhs: Self) {
7043 *self = self.simd.or_i32x16(*self, rhs);
7044 }
7045}
7046impl<S: Simd> core::ops::BitOr<i32> for i32x16<S> {
7047 type Output = Self;
7048 #[inline(always)]
7049 fn bitor(self, rhs: i32) -> Self::Output {
7050 self.simd.or_i32x16(self, rhs.simd_into(self.simd))
7051 }
7052}
7053impl<S: Simd> core::ops::BitOrAssign<i32> for i32x16<S> {
7054 #[inline(always)]
7055 fn bitor_assign(&mut self, rhs: i32) {
7056 *self = self.simd.or_i32x16(*self, rhs.simd_into(self.simd));
7057 }
7058}
7059impl<S: Simd> core::ops::BitOr<i32x16<S>> for i32 {
7060 type Output = i32x16<S>;
7061 #[inline(always)]
7062 fn bitor(self, rhs: i32x16<S>) -> Self::Output {
7063 rhs.simd.or_i32x16(self.simd_into(rhs.simd), rhs)
7064 }
7065}
7066impl<S: Simd> core::ops::BitXor for i32x16<S> {
7067 type Output = Self;
7068 #[doc = "Compute the bitwise XOR of two vectors."]
7069 #[inline(always)]
7070 fn bitxor(self, rhs: Self) -> Self::Output {
7071 self.simd.xor_i32x16(self, rhs)
7072 }
7073}
7074impl<S: Simd> core::ops::BitXorAssign for i32x16<S> {
7075 #[doc = "Compute the bitwise XOR of two vectors."]
7076 #[inline(always)]
7077 fn bitxor_assign(&mut self, rhs: Self) {
7078 *self = self.simd.xor_i32x16(*self, rhs);
7079 }
7080}
7081impl<S: Simd> core::ops::BitXor<i32> for i32x16<S> {
7082 type Output = Self;
7083 #[inline(always)]
7084 fn bitxor(self, rhs: i32) -> Self::Output {
7085 self.simd.xor_i32x16(self, rhs.simd_into(self.simd))
7086 }
7087}
7088impl<S: Simd> core::ops::BitXorAssign<i32> for i32x16<S> {
7089 #[inline(always)]
7090 fn bitxor_assign(&mut self, rhs: i32) {
7091 *self = self.simd.xor_i32x16(*self, rhs.simd_into(self.simd));
7092 }
7093}
7094impl<S: Simd> core::ops::BitXor<i32x16<S>> for i32 {
7095 type Output = i32x16<S>;
7096 #[inline(always)]
7097 fn bitxor(self, rhs: i32x16<S>) -> Self::Output {
7098 rhs.simd.xor_i32x16(self.simd_into(rhs.simd), rhs)
7099 }
7100}
7101impl<S: Simd> core::ops::Not for i32x16<S> {
7102 type Output = Self;
7103 #[doc = "Compute the bitwise NOT of the vector."]
7104 #[inline(always)]
7105 fn not(self) -> Self::Output {
7106 self.simd.not_i32x16(self)
7107 }
7108}
7109impl<S: Simd> core::ops::Shl<u32> for i32x16<S> {
7110 type Output = Self;
7111 #[doc = "Shift each element left by the given number of bits.\n\nBits shifted out of the left side are discarded, and zeros are shifted in on the right.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform."]
7112 #[inline(always)]
7113 fn shl(self, rhs: u32) -> Self::Output {
7114 self.simd.shl_i32x16(self, rhs)
7115 }
7116}
7117impl<S: Simd> core::ops::ShlAssign<u32> for i32x16<S> {
7118 #[inline(always)]
7119 fn shl_assign(&mut self, rhs: u32) {
7120 *self = self.simd.shl_i32x16(*self, rhs);
7121 }
7122}
7123impl<S: Simd> core::ops::Shl for i32x16<S> {
7124 type Output = Self;
7125 #[doc = "Shift each element left by the given number of bits.\n\nBits shifted out of the left side are discarded, and zeros are shifted in on the right.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform.\n\n# Performance\nThis per-lane shift is slower than shifting the entire vector by a scalar. It is not vectorized at all on WebAssembly, SSE4.2, and for `u8` and `i8` elements on AVX2. Prefer shifting by a single scalar value instead of by a vector whenever possible."]
7126 #[inline(always)]
7127 fn shl(self, rhs: Self) -> Self::Output {
7128 self.simd.shlv_i32x16(self, rhs)
7129 }
7130}
7131impl<S: Simd> core::ops::ShlAssign for i32x16<S> {
7132 #[doc = "Shift each element left by the given number of bits.\n\nBits shifted out of the left side are discarded, and zeros are shifted in on the right.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform.\n\n# Performance\nThis per-lane shift is slower than shifting the entire vector by a scalar. It is not vectorized at all on WebAssembly, SSE4.2, and for `u8` and `i8` elements on AVX2. Prefer shifting by a single scalar value instead of by a vector whenever possible."]
7133 #[inline(always)]
7134 fn shl_assign(&mut self, rhs: Self) {
7135 *self = self.simd.shlv_i32x16(*self, rhs);
7136 }
7137}
7138impl<S: Simd> core::ops::Shr<u32> for i32x16<S> {
7139 type Output = Self;
7140 #[doc = "Shift each element right by the given number of bits.\n\nFor unsigned integers, zeros are shifted in on the left. For signed integers, the sign bit is replicated.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform."]
7141 #[inline(always)]
7142 fn shr(self, rhs: u32) -> Self::Output {
7143 self.simd.shr_i32x16(self, rhs)
7144 }
7145}
7146impl<S: Simd> core::ops::ShrAssign<u32> for i32x16<S> {
7147 #[inline(always)]
7148 fn shr_assign(&mut self, rhs: u32) {
7149 *self = self.simd.shr_i32x16(*self, rhs);
7150 }
7151}
7152impl<S: Simd> core::ops::Shr for i32x16<S> {
7153 type Output = Self;
7154 #[doc = "Shift each element right by the corresponding element in another vector.\n\nFor unsigned integers, zeros are shifted in on the left. For signed integers, the sign bit is replicated.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform.\n\n# Performance\nThis per-lane shift is slower than shifting the entire vector by a scalar. It is not vectorized at all on WebAssembly, SSE4.2, and for `u8` and `i8` elements on AVX2. Prefer shifting by a single scalar value instead of by a vector whenever possible."]
7155 #[inline(always)]
7156 fn shr(self, rhs: Self) -> Self::Output {
7157 self.simd.shrv_i32x16(self, rhs)
7158 }
7159}
7160impl<S: Simd> core::ops::ShrAssign for i32x16<S> {
7161 #[doc = "Shift each element right by the corresponding element in another vector.\n\nFor unsigned integers, zeros are shifted in on the left. For signed integers, the sign bit is replicated.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform.\n\n# Performance\nThis per-lane shift is slower than shifting the entire vector by a scalar. It is not vectorized at all on WebAssembly, SSE4.2, and for `u8` and `i8` elements on AVX2. Prefer shifting by a single scalar value instead of by a vector whenever possible."]
7162 #[inline(always)]
7163 fn shr_assign(&mut self, rhs: Self) {
7164 *self = self.simd.shrv_i32x16(*self, rhs);
7165 }
7166}
7167impl<S: Simd> core::ops::Add for u32x16<S> {
7168 type Output = Self;
7169 #[doc = "Add two vectors element-wise, wrapping on overflow."]
7170 #[inline(always)]
7171 fn add(self, rhs: Self) -> Self::Output {
7172 self.simd.add_u32x16(self, rhs)
7173 }
7174}
7175impl<S: Simd> core::ops::AddAssign for u32x16<S> {
7176 #[doc = "Add two vectors element-wise, wrapping on overflow."]
7177 #[inline(always)]
7178 fn add_assign(&mut self, rhs: Self) {
7179 *self = self.simd.add_u32x16(*self, rhs);
7180 }
7181}
7182impl<S: Simd> core::ops::Add<u32> for u32x16<S> {
7183 type Output = Self;
7184 #[inline(always)]
7185 fn add(self, rhs: u32) -> Self::Output {
7186 self.simd.add_u32x16(self, rhs.simd_into(self.simd))
7187 }
7188}
7189impl<S: Simd> core::ops::AddAssign<u32> for u32x16<S> {
7190 #[inline(always)]
7191 fn add_assign(&mut self, rhs: u32) {
7192 *self = self.simd.add_u32x16(*self, rhs.simd_into(self.simd));
7193 }
7194}
7195impl<S: Simd> core::ops::Add<u32x16<S>> for u32 {
7196 type Output = u32x16<S>;
7197 #[inline(always)]
7198 fn add(self, rhs: u32x16<S>) -> Self::Output {
7199 rhs.simd.add_u32x16(self.simd_into(rhs.simd), rhs)
7200 }
7201}
7202impl<S: Simd> core::ops::Sub for u32x16<S> {
7203 type Output = Self;
7204 #[doc = "Subtract two vectors element-wise, wrapping on overflow."]
7205 #[inline(always)]
7206 fn sub(self, rhs: Self) -> Self::Output {
7207 self.simd.sub_u32x16(self, rhs)
7208 }
7209}
7210impl<S: Simd> core::ops::SubAssign for u32x16<S> {
7211 #[doc = "Subtract two vectors element-wise, wrapping on overflow."]
7212 #[inline(always)]
7213 fn sub_assign(&mut self, rhs: Self) {
7214 *self = self.simd.sub_u32x16(*self, rhs);
7215 }
7216}
7217impl<S: Simd> core::ops::Sub<u32> for u32x16<S> {
7218 type Output = Self;
7219 #[inline(always)]
7220 fn sub(self, rhs: u32) -> Self::Output {
7221 self.simd.sub_u32x16(self, rhs.simd_into(self.simd))
7222 }
7223}
7224impl<S: Simd> core::ops::SubAssign<u32> for u32x16<S> {
7225 #[inline(always)]
7226 fn sub_assign(&mut self, rhs: u32) {
7227 *self = self.simd.sub_u32x16(*self, rhs.simd_into(self.simd));
7228 }
7229}
7230impl<S: Simd> core::ops::Sub<u32x16<S>> for u32 {
7231 type Output = u32x16<S>;
7232 #[inline(always)]
7233 fn sub(self, rhs: u32x16<S>) -> Self::Output {
7234 rhs.simd.sub_u32x16(self.simd_into(rhs.simd), rhs)
7235 }
7236}
7237impl<S: Simd> core::ops::Mul for u32x16<S> {
7238 type Output = Self;
7239 #[doc = "Multiply two vectors element-wise, wrapping on overflow."]
7240 #[inline(always)]
7241 fn mul(self, rhs: Self) -> Self::Output {
7242 self.simd.mul_u32x16(self, rhs)
7243 }
7244}
7245impl<S: Simd> core::ops::MulAssign for u32x16<S> {
7246 #[doc = "Multiply two vectors element-wise, wrapping on overflow."]
7247 #[inline(always)]
7248 fn mul_assign(&mut self, rhs: Self) {
7249 *self = self.simd.mul_u32x16(*self, rhs);
7250 }
7251}
7252impl<S: Simd> core::ops::Mul<u32> for u32x16<S> {
7253 type Output = Self;
7254 #[inline(always)]
7255 fn mul(self, rhs: u32) -> Self::Output {
7256 self.simd.mul_u32x16(self, rhs.simd_into(self.simd))
7257 }
7258}
7259impl<S: Simd> core::ops::MulAssign<u32> for u32x16<S> {
7260 #[inline(always)]
7261 fn mul_assign(&mut self, rhs: u32) {
7262 *self = self.simd.mul_u32x16(*self, rhs.simd_into(self.simd));
7263 }
7264}
7265impl<S: Simd> core::ops::Mul<u32x16<S>> for u32 {
7266 type Output = u32x16<S>;
7267 #[inline(always)]
7268 fn mul(self, rhs: u32x16<S>) -> Self::Output {
7269 rhs.simd.mul_u32x16(self.simd_into(rhs.simd), rhs)
7270 }
7271}
7272impl<S: Simd> core::ops::BitAnd for u32x16<S> {
7273 type Output = Self;
7274 #[doc = "Compute the bitwise AND of two vectors."]
7275 #[inline(always)]
7276 fn bitand(self, rhs: Self) -> Self::Output {
7277 self.simd.and_u32x16(self, rhs)
7278 }
7279}
7280impl<S: Simd> core::ops::BitAndAssign for u32x16<S> {
7281 #[doc = "Compute the bitwise AND of two vectors."]
7282 #[inline(always)]
7283 fn bitand_assign(&mut self, rhs: Self) {
7284 *self = self.simd.and_u32x16(*self, rhs);
7285 }
7286}
7287impl<S: Simd> core::ops::BitAnd<u32> for u32x16<S> {
7288 type Output = Self;
7289 #[inline(always)]
7290 fn bitand(self, rhs: u32) -> Self::Output {
7291 self.simd.and_u32x16(self, rhs.simd_into(self.simd))
7292 }
7293}
7294impl<S: Simd> core::ops::BitAndAssign<u32> for u32x16<S> {
7295 #[inline(always)]
7296 fn bitand_assign(&mut self, rhs: u32) {
7297 *self = self.simd.and_u32x16(*self, rhs.simd_into(self.simd));
7298 }
7299}
7300impl<S: Simd> core::ops::BitAnd<u32x16<S>> for u32 {
7301 type Output = u32x16<S>;
7302 #[inline(always)]
7303 fn bitand(self, rhs: u32x16<S>) -> Self::Output {
7304 rhs.simd.and_u32x16(self.simd_into(rhs.simd), rhs)
7305 }
7306}
7307impl<S: Simd> core::ops::BitOr for u32x16<S> {
7308 type Output = Self;
7309 #[doc = "Compute the bitwise OR of two vectors."]
7310 #[inline(always)]
7311 fn bitor(self, rhs: Self) -> Self::Output {
7312 self.simd.or_u32x16(self, rhs)
7313 }
7314}
7315impl<S: Simd> core::ops::BitOrAssign for u32x16<S> {
7316 #[doc = "Compute the bitwise OR of two vectors."]
7317 #[inline(always)]
7318 fn bitor_assign(&mut self, rhs: Self) {
7319 *self = self.simd.or_u32x16(*self, rhs);
7320 }
7321}
7322impl<S: Simd> core::ops::BitOr<u32> for u32x16<S> {
7323 type Output = Self;
7324 #[inline(always)]
7325 fn bitor(self, rhs: u32) -> Self::Output {
7326 self.simd.or_u32x16(self, rhs.simd_into(self.simd))
7327 }
7328}
7329impl<S: Simd> core::ops::BitOrAssign<u32> for u32x16<S> {
7330 #[inline(always)]
7331 fn bitor_assign(&mut self, rhs: u32) {
7332 *self = self.simd.or_u32x16(*self, rhs.simd_into(self.simd));
7333 }
7334}
7335impl<S: Simd> core::ops::BitOr<u32x16<S>> for u32 {
7336 type Output = u32x16<S>;
7337 #[inline(always)]
7338 fn bitor(self, rhs: u32x16<S>) -> Self::Output {
7339 rhs.simd.or_u32x16(self.simd_into(rhs.simd), rhs)
7340 }
7341}
7342impl<S: Simd> core::ops::BitXor for u32x16<S> {
7343 type Output = Self;
7344 #[doc = "Compute the bitwise XOR of two vectors."]
7345 #[inline(always)]
7346 fn bitxor(self, rhs: Self) -> Self::Output {
7347 self.simd.xor_u32x16(self, rhs)
7348 }
7349}
7350impl<S: Simd> core::ops::BitXorAssign for u32x16<S> {
7351 #[doc = "Compute the bitwise XOR of two vectors."]
7352 #[inline(always)]
7353 fn bitxor_assign(&mut self, rhs: Self) {
7354 *self = self.simd.xor_u32x16(*self, rhs);
7355 }
7356}
7357impl<S: Simd> core::ops::BitXor<u32> for u32x16<S> {
7358 type Output = Self;
7359 #[inline(always)]
7360 fn bitxor(self, rhs: u32) -> Self::Output {
7361 self.simd.xor_u32x16(self, rhs.simd_into(self.simd))
7362 }
7363}
7364impl<S: Simd> core::ops::BitXorAssign<u32> for u32x16<S> {
7365 #[inline(always)]
7366 fn bitxor_assign(&mut self, rhs: u32) {
7367 *self = self.simd.xor_u32x16(*self, rhs.simd_into(self.simd));
7368 }
7369}
7370impl<S: Simd> core::ops::BitXor<u32x16<S>> for u32 {
7371 type Output = u32x16<S>;
7372 #[inline(always)]
7373 fn bitxor(self, rhs: u32x16<S>) -> Self::Output {
7374 rhs.simd.xor_u32x16(self.simd_into(rhs.simd), rhs)
7375 }
7376}
7377impl<S: Simd> core::ops::Not for u32x16<S> {
7378 type Output = Self;
7379 #[doc = "Compute the bitwise NOT of the vector."]
7380 #[inline(always)]
7381 fn not(self) -> Self::Output {
7382 self.simd.not_u32x16(self)
7383 }
7384}
7385impl<S: Simd> core::ops::Shl<u32> for u32x16<S> {
7386 type Output = Self;
7387 #[doc = "Shift each element left by the given number of bits.\n\nBits shifted out of the left side are discarded, and zeros are shifted in on the right.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform."]
7388 #[inline(always)]
7389 fn shl(self, rhs: u32) -> Self::Output {
7390 self.simd.shl_u32x16(self, rhs)
7391 }
7392}
7393impl<S: Simd> core::ops::ShlAssign<u32> for u32x16<S> {
7394 #[inline(always)]
7395 fn shl_assign(&mut self, rhs: u32) {
7396 *self = self.simd.shl_u32x16(*self, rhs);
7397 }
7398}
7399impl<S: Simd> core::ops::Shl for u32x16<S> {
7400 type Output = Self;
7401 #[doc = "Shift each element left by the given number of bits.\n\nBits shifted out of the left side are discarded, and zeros are shifted in on the right.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform.\n\n# Performance\nThis per-lane shift is slower than shifting the entire vector by a scalar. It is not vectorized at all on WebAssembly, SSE4.2, and for `u8` and `i8` elements on AVX2. Prefer shifting by a single scalar value instead of by a vector whenever possible."]
7402 #[inline(always)]
7403 fn shl(self, rhs: Self) -> Self::Output {
7404 self.simd.shlv_u32x16(self, rhs)
7405 }
7406}
7407impl<S: Simd> core::ops::ShlAssign for u32x16<S> {
7408 #[doc = "Shift each element left by the given number of bits.\n\nBits shifted out of the left side are discarded, and zeros are shifted in on the right.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform.\n\n# Performance\nThis per-lane shift is slower than shifting the entire vector by a scalar. It is not vectorized at all on WebAssembly, SSE4.2, and for `u8` and `i8` elements on AVX2. Prefer shifting by a single scalar value instead of by a vector whenever possible."]
7409 #[inline(always)]
7410 fn shl_assign(&mut self, rhs: Self) {
7411 *self = self.simd.shlv_u32x16(*self, rhs);
7412 }
7413}
7414impl<S: Simd> core::ops::Shr<u32> for u32x16<S> {
7415 type Output = Self;
7416 #[doc = "Shift each element right by the given number of bits.\n\nFor unsigned integers, zeros are shifted in on the left. For signed integers, the sign bit is replicated.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform."]
7417 #[inline(always)]
7418 fn shr(self, rhs: u32) -> Self::Output {
7419 self.simd.shr_u32x16(self, rhs)
7420 }
7421}
7422impl<S: Simd> core::ops::ShrAssign<u32> for u32x16<S> {
7423 #[inline(always)]
7424 fn shr_assign(&mut self, rhs: u32) {
7425 *self = self.simd.shr_u32x16(*self, rhs);
7426 }
7427}
7428impl<S: Simd> core::ops::Shr for u32x16<S> {
7429 type Output = Self;
7430 #[doc = "Shift each element right by the corresponding element in another vector.\n\nFor unsigned integers, zeros are shifted in on the left. For signed integers, the sign bit is replicated.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform.\n\n# Performance\nThis per-lane shift is slower than shifting the entire vector by a scalar. It is not vectorized at all on WebAssembly, SSE4.2, and for `u8` and `i8` elements on AVX2. Prefer shifting by a single scalar value instead of by a vector whenever possible."]
7431 #[inline(always)]
7432 fn shr(self, rhs: Self) -> Self::Output {
7433 self.simd.shrv_u32x16(self, rhs)
7434 }
7435}
7436impl<S: Simd> core::ops::ShrAssign for u32x16<S> {
7437 #[doc = "Shift each element right by the corresponding element in another vector.\n\nFor unsigned integers, zeros are shifted in on the left. For signed integers, the sign bit is replicated.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform.\n\n# Performance\nThis per-lane shift is slower than shifting the entire vector by a scalar. It is not vectorized at all on WebAssembly, SSE4.2, and for `u8` and `i8` elements on AVX2. Prefer shifting by a single scalar value instead of by a vector whenever possible."]
7438 #[inline(always)]
7439 fn shr_assign(&mut self, rhs: Self) {
7440 *self = self.simd.shrv_u32x16(*self, rhs);
7441 }
7442}
7443impl<S: Simd> core::ops::BitAnd for mask32x16<S> {
7444 type Output = Self;
7445 #[doc = "Compute the logical AND of two masks."]
7446 #[inline(always)]
7447 fn bitand(self, rhs: Self) -> Self::Output {
7448 self.simd.and_mask32x16(self, rhs)
7449 }
7450}
7451impl<S: Simd> core::ops::BitAndAssign for mask32x16<S> {
7452 #[doc = "Compute the logical AND of two masks."]
7453 #[inline(always)]
7454 fn bitand_assign(&mut self, rhs: Self) {
7455 *self = self.simd.and_mask32x16(*self, rhs);
7456 }
7457}
7458impl<S: Simd> core::ops::BitOr for mask32x16<S> {
7459 type Output = Self;
7460 #[doc = "Compute the logical OR of two masks."]
7461 #[inline(always)]
7462 fn bitor(self, rhs: Self) -> Self::Output {
7463 self.simd.or_mask32x16(self, rhs)
7464 }
7465}
7466impl<S: Simd> core::ops::BitOrAssign for mask32x16<S> {
7467 #[doc = "Compute the logical OR of two masks."]
7468 #[inline(always)]
7469 fn bitor_assign(&mut self, rhs: Self) {
7470 *self = self.simd.or_mask32x16(*self, rhs);
7471 }
7472}
7473impl<S: Simd> core::ops::BitXor for mask32x16<S> {
7474 type Output = Self;
7475 #[doc = "Compute the logical XOR of two masks."]
7476 #[inline(always)]
7477 fn bitxor(self, rhs: Self) -> Self::Output {
7478 self.simd.xor_mask32x16(self, rhs)
7479 }
7480}
7481impl<S: Simd> core::ops::BitXorAssign for mask32x16<S> {
7482 #[doc = "Compute the logical XOR of two masks."]
7483 #[inline(always)]
7484 fn bitxor_assign(&mut self, rhs: Self) {
7485 *self = self.simd.xor_mask32x16(*self, rhs);
7486 }
7487}
7488impl<S: Simd> core::ops::Not for mask32x16<S> {
7489 type Output = Self;
7490 #[doc = "Compute the logical NOT of the mask."]
7491 #[inline(always)]
7492 fn not(self) -> Self::Output {
7493 self.simd.not_mask32x16(self)
7494 }
7495}
7496impl<S: Simd> core::ops::Neg for f64x8<S> {
7497 type Output = Self;
7498 #[doc = "Negate each element of the vector."]
7499 #[inline(always)]
7500 fn neg(self) -> Self::Output {
7501 self.simd.neg_f64x8(self)
7502 }
7503}
7504impl<S: Simd> core::ops::Add for f64x8<S> {
7505 type Output = Self;
7506 #[doc = "Add two vectors element-wise."]
7507 #[inline(always)]
7508 fn add(self, rhs: Self) -> Self::Output {
7509 self.simd.add_f64x8(self, rhs)
7510 }
7511}
7512impl<S: Simd> core::ops::AddAssign for f64x8<S> {
7513 #[doc = "Add two vectors element-wise."]
7514 #[inline(always)]
7515 fn add_assign(&mut self, rhs: Self) {
7516 *self = self.simd.add_f64x8(*self, rhs);
7517 }
7518}
7519impl<S: Simd> core::ops::Add<f64> for f64x8<S> {
7520 type Output = Self;
7521 #[inline(always)]
7522 fn add(self, rhs: f64) -> Self::Output {
7523 self.simd.add_f64x8(self, rhs.simd_into(self.simd))
7524 }
7525}
7526impl<S: Simd> core::ops::AddAssign<f64> for f64x8<S> {
7527 #[inline(always)]
7528 fn add_assign(&mut self, rhs: f64) {
7529 *self = self.simd.add_f64x8(*self, rhs.simd_into(self.simd));
7530 }
7531}
7532impl<S: Simd> core::ops::Add<f64x8<S>> for f64 {
7533 type Output = f64x8<S>;
7534 #[inline(always)]
7535 fn add(self, rhs: f64x8<S>) -> Self::Output {
7536 rhs.simd.add_f64x8(self.simd_into(rhs.simd), rhs)
7537 }
7538}
7539impl<S: Simd> core::ops::Sub for f64x8<S> {
7540 type Output = Self;
7541 #[doc = "Subtract two vectors element-wise."]
7542 #[inline(always)]
7543 fn sub(self, rhs: Self) -> Self::Output {
7544 self.simd.sub_f64x8(self, rhs)
7545 }
7546}
7547impl<S: Simd> core::ops::SubAssign for f64x8<S> {
7548 #[doc = "Subtract two vectors element-wise."]
7549 #[inline(always)]
7550 fn sub_assign(&mut self, rhs: Self) {
7551 *self = self.simd.sub_f64x8(*self, rhs);
7552 }
7553}
7554impl<S: Simd> core::ops::Sub<f64> for f64x8<S> {
7555 type Output = Self;
7556 #[inline(always)]
7557 fn sub(self, rhs: f64) -> Self::Output {
7558 self.simd.sub_f64x8(self, rhs.simd_into(self.simd))
7559 }
7560}
7561impl<S: Simd> core::ops::SubAssign<f64> for f64x8<S> {
7562 #[inline(always)]
7563 fn sub_assign(&mut self, rhs: f64) {
7564 *self = self.simd.sub_f64x8(*self, rhs.simd_into(self.simd));
7565 }
7566}
7567impl<S: Simd> core::ops::Sub<f64x8<S>> for f64 {
7568 type Output = f64x8<S>;
7569 #[inline(always)]
7570 fn sub(self, rhs: f64x8<S>) -> Self::Output {
7571 rhs.simd.sub_f64x8(self.simd_into(rhs.simd), rhs)
7572 }
7573}
7574impl<S: Simd> core::ops::Mul for f64x8<S> {
7575 type Output = Self;
7576 #[doc = "Multiply two vectors element-wise."]
7577 #[inline(always)]
7578 fn mul(self, rhs: Self) -> Self::Output {
7579 self.simd.mul_f64x8(self, rhs)
7580 }
7581}
7582impl<S: Simd> core::ops::MulAssign for f64x8<S> {
7583 #[doc = "Multiply two vectors element-wise."]
7584 #[inline(always)]
7585 fn mul_assign(&mut self, rhs: Self) {
7586 *self = self.simd.mul_f64x8(*self, rhs);
7587 }
7588}
7589impl<S: Simd> core::ops::Mul<f64> for f64x8<S> {
7590 type Output = Self;
7591 #[inline(always)]
7592 fn mul(self, rhs: f64) -> Self::Output {
7593 self.simd.mul_f64x8(self, rhs.simd_into(self.simd))
7594 }
7595}
7596impl<S: Simd> core::ops::MulAssign<f64> for f64x8<S> {
7597 #[inline(always)]
7598 fn mul_assign(&mut self, rhs: f64) {
7599 *self = self.simd.mul_f64x8(*self, rhs.simd_into(self.simd));
7600 }
7601}
7602impl<S: Simd> core::ops::Mul<f64x8<S>> for f64 {
7603 type Output = f64x8<S>;
7604 #[inline(always)]
7605 fn mul(self, rhs: f64x8<S>) -> Self::Output {
7606 rhs.simd.mul_f64x8(self.simd_into(rhs.simd), rhs)
7607 }
7608}
7609impl<S: Simd> core::ops::Div for f64x8<S> {
7610 type Output = Self;
7611 #[doc = "Divide two vectors element-wise."]
7612 #[inline(always)]
7613 fn div(self, rhs: Self) -> Self::Output {
7614 self.simd.div_f64x8(self, rhs)
7615 }
7616}
7617impl<S: Simd> core::ops::DivAssign for f64x8<S> {
7618 #[doc = "Divide two vectors element-wise."]
7619 #[inline(always)]
7620 fn div_assign(&mut self, rhs: Self) {
7621 *self = self.simd.div_f64x8(*self, rhs);
7622 }
7623}
7624impl<S: Simd> core::ops::Div<f64> for f64x8<S> {
7625 type Output = Self;
7626 #[inline(always)]
7627 fn div(self, rhs: f64) -> Self::Output {
7628 self.simd.div_f64x8(self, rhs.simd_into(self.simd))
7629 }
7630}
7631impl<S: Simd> core::ops::DivAssign<f64> for f64x8<S> {
7632 #[inline(always)]
7633 fn div_assign(&mut self, rhs: f64) {
7634 *self = self.simd.div_f64x8(*self, rhs.simd_into(self.simd));
7635 }
7636}
7637impl<S: Simd> core::ops::Div<f64x8<S>> for f64 {
7638 type Output = f64x8<S>;
7639 #[inline(always)]
7640 fn div(self, rhs: f64x8<S>) -> Self::Output {
7641 rhs.simd.div_f64x8(self.simd_into(rhs.simd), rhs)
7642 }
7643}
7644impl<S: Simd> core::ops::Neg for i64x8<S> {
7645 type Output = Self;
7646 #[doc = "Negate each element of the vector, wrapping on overflow."]
7647 #[inline(always)]
7648 fn neg(self) -> Self::Output {
7649 self.simd.neg_i64x8(self)
7650 }
7651}
7652impl<S: Simd> core::ops::Add for i64x8<S> {
7653 type Output = Self;
7654 #[doc = "Add two vectors element-wise, wrapping on overflow."]
7655 #[inline(always)]
7656 fn add(self, rhs: Self) -> Self::Output {
7657 self.simd.add_i64x8(self, rhs)
7658 }
7659}
7660impl<S: Simd> core::ops::AddAssign for i64x8<S> {
7661 #[doc = "Add two vectors element-wise, wrapping on overflow."]
7662 #[inline(always)]
7663 fn add_assign(&mut self, rhs: Self) {
7664 *self = self.simd.add_i64x8(*self, rhs);
7665 }
7666}
7667impl<S: Simd> core::ops::Add<i64> for i64x8<S> {
7668 type Output = Self;
7669 #[inline(always)]
7670 fn add(self, rhs: i64) -> Self::Output {
7671 self.simd.add_i64x8(self, rhs.simd_into(self.simd))
7672 }
7673}
7674impl<S: Simd> core::ops::AddAssign<i64> for i64x8<S> {
7675 #[inline(always)]
7676 fn add_assign(&mut self, rhs: i64) {
7677 *self = self.simd.add_i64x8(*self, rhs.simd_into(self.simd));
7678 }
7679}
7680impl<S: Simd> core::ops::Add<i64x8<S>> for i64 {
7681 type Output = i64x8<S>;
7682 #[inline(always)]
7683 fn add(self, rhs: i64x8<S>) -> Self::Output {
7684 rhs.simd.add_i64x8(self.simd_into(rhs.simd), rhs)
7685 }
7686}
7687impl<S: Simd> core::ops::Sub for i64x8<S> {
7688 type Output = Self;
7689 #[doc = "Subtract two vectors element-wise, wrapping on overflow."]
7690 #[inline(always)]
7691 fn sub(self, rhs: Self) -> Self::Output {
7692 self.simd.sub_i64x8(self, rhs)
7693 }
7694}
7695impl<S: Simd> core::ops::SubAssign for i64x8<S> {
7696 #[doc = "Subtract two vectors element-wise, wrapping on overflow."]
7697 #[inline(always)]
7698 fn sub_assign(&mut self, rhs: Self) {
7699 *self = self.simd.sub_i64x8(*self, rhs);
7700 }
7701}
7702impl<S: Simd> core::ops::Sub<i64> for i64x8<S> {
7703 type Output = Self;
7704 #[inline(always)]
7705 fn sub(self, rhs: i64) -> Self::Output {
7706 self.simd.sub_i64x8(self, rhs.simd_into(self.simd))
7707 }
7708}
7709impl<S: Simd> core::ops::SubAssign<i64> for i64x8<S> {
7710 #[inline(always)]
7711 fn sub_assign(&mut self, rhs: i64) {
7712 *self = self.simd.sub_i64x8(*self, rhs.simd_into(self.simd));
7713 }
7714}
7715impl<S: Simd> core::ops::Sub<i64x8<S>> for i64 {
7716 type Output = i64x8<S>;
7717 #[inline(always)]
7718 fn sub(self, rhs: i64x8<S>) -> Self::Output {
7719 rhs.simd.sub_i64x8(self.simd_into(rhs.simd), rhs)
7720 }
7721}
7722impl<S: Simd> core::ops::Mul for i64x8<S> {
7723 type Output = Self;
7724 #[doc = "Multiply two vectors element-wise, wrapping on overflow."]
7725 #[inline(always)]
7726 fn mul(self, rhs: Self) -> Self::Output {
7727 self.simd.mul_i64x8(self, rhs)
7728 }
7729}
7730impl<S: Simd> core::ops::MulAssign for i64x8<S> {
7731 #[doc = "Multiply two vectors element-wise, wrapping on overflow."]
7732 #[inline(always)]
7733 fn mul_assign(&mut self, rhs: Self) {
7734 *self = self.simd.mul_i64x8(*self, rhs);
7735 }
7736}
7737impl<S: Simd> core::ops::Mul<i64> for i64x8<S> {
7738 type Output = Self;
7739 #[inline(always)]
7740 fn mul(self, rhs: i64) -> Self::Output {
7741 self.simd.mul_i64x8(self, rhs.simd_into(self.simd))
7742 }
7743}
7744impl<S: Simd> core::ops::MulAssign<i64> for i64x8<S> {
7745 #[inline(always)]
7746 fn mul_assign(&mut self, rhs: i64) {
7747 *self = self.simd.mul_i64x8(*self, rhs.simd_into(self.simd));
7748 }
7749}
7750impl<S: Simd> core::ops::Mul<i64x8<S>> for i64 {
7751 type Output = i64x8<S>;
7752 #[inline(always)]
7753 fn mul(self, rhs: i64x8<S>) -> Self::Output {
7754 rhs.simd.mul_i64x8(self.simd_into(rhs.simd), rhs)
7755 }
7756}
7757impl<S: Simd> core::ops::BitAnd for i64x8<S> {
7758 type Output = Self;
7759 #[doc = "Compute the bitwise AND of two vectors."]
7760 #[inline(always)]
7761 fn bitand(self, rhs: Self) -> Self::Output {
7762 self.simd.and_i64x8(self, rhs)
7763 }
7764}
7765impl<S: Simd> core::ops::BitAndAssign for i64x8<S> {
7766 #[doc = "Compute the bitwise AND of two vectors."]
7767 #[inline(always)]
7768 fn bitand_assign(&mut self, rhs: Self) {
7769 *self = self.simd.and_i64x8(*self, rhs);
7770 }
7771}
7772impl<S: Simd> core::ops::BitAnd<i64> for i64x8<S> {
7773 type Output = Self;
7774 #[inline(always)]
7775 fn bitand(self, rhs: i64) -> Self::Output {
7776 self.simd.and_i64x8(self, rhs.simd_into(self.simd))
7777 }
7778}
7779impl<S: Simd> core::ops::BitAndAssign<i64> for i64x8<S> {
7780 #[inline(always)]
7781 fn bitand_assign(&mut self, rhs: i64) {
7782 *self = self.simd.and_i64x8(*self, rhs.simd_into(self.simd));
7783 }
7784}
7785impl<S: Simd> core::ops::BitAnd<i64x8<S>> for i64 {
7786 type Output = i64x8<S>;
7787 #[inline(always)]
7788 fn bitand(self, rhs: i64x8<S>) -> Self::Output {
7789 rhs.simd.and_i64x8(self.simd_into(rhs.simd), rhs)
7790 }
7791}
7792impl<S: Simd> core::ops::BitOr for i64x8<S> {
7793 type Output = Self;
7794 #[doc = "Compute the bitwise OR of two vectors."]
7795 #[inline(always)]
7796 fn bitor(self, rhs: Self) -> Self::Output {
7797 self.simd.or_i64x8(self, rhs)
7798 }
7799}
7800impl<S: Simd> core::ops::BitOrAssign for i64x8<S> {
7801 #[doc = "Compute the bitwise OR of two vectors."]
7802 #[inline(always)]
7803 fn bitor_assign(&mut self, rhs: Self) {
7804 *self = self.simd.or_i64x8(*self, rhs);
7805 }
7806}
7807impl<S: Simd> core::ops::BitOr<i64> for i64x8<S> {
7808 type Output = Self;
7809 #[inline(always)]
7810 fn bitor(self, rhs: i64) -> Self::Output {
7811 self.simd.or_i64x8(self, rhs.simd_into(self.simd))
7812 }
7813}
7814impl<S: Simd> core::ops::BitOrAssign<i64> for i64x8<S> {
7815 #[inline(always)]
7816 fn bitor_assign(&mut self, rhs: i64) {
7817 *self = self.simd.or_i64x8(*self, rhs.simd_into(self.simd));
7818 }
7819}
7820impl<S: Simd> core::ops::BitOr<i64x8<S>> for i64 {
7821 type Output = i64x8<S>;
7822 #[inline(always)]
7823 fn bitor(self, rhs: i64x8<S>) -> Self::Output {
7824 rhs.simd.or_i64x8(self.simd_into(rhs.simd), rhs)
7825 }
7826}
7827impl<S: Simd> core::ops::BitXor for i64x8<S> {
7828 type Output = Self;
7829 #[doc = "Compute the bitwise XOR of two vectors."]
7830 #[inline(always)]
7831 fn bitxor(self, rhs: Self) -> Self::Output {
7832 self.simd.xor_i64x8(self, rhs)
7833 }
7834}
7835impl<S: Simd> core::ops::BitXorAssign for i64x8<S> {
7836 #[doc = "Compute the bitwise XOR of two vectors."]
7837 #[inline(always)]
7838 fn bitxor_assign(&mut self, rhs: Self) {
7839 *self = self.simd.xor_i64x8(*self, rhs);
7840 }
7841}
7842impl<S: Simd> core::ops::BitXor<i64> for i64x8<S> {
7843 type Output = Self;
7844 #[inline(always)]
7845 fn bitxor(self, rhs: i64) -> Self::Output {
7846 self.simd.xor_i64x8(self, rhs.simd_into(self.simd))
7847 }
7848}
7849impl<S: Simd> core::ops::BitXorAssign<i64> for i64x8<S> {
7850 #[inline(always)]
7851 fn bitxor_assign(&mut self, rhs: i64) {
7852 *self = self.simd.xor_i64x8(*self, rhs.simd_into(self.simd));
7853 }
7854}
7855impl<S: Simd> core::ops::BitXor<i64x8<S>> for i64 {
7856 type Output = i64x8<S>;
7857 #[inline(always)]
7858 fn bitxor(self, rhs: i64x8<S>) -> Self::Output {
7859 rhs.simd.xor_i64x8(self.simd_into(rhs.simd), rhs)
7860 }
7861}
7862impl<S: Simd> core::ops::Not for i64x8<S> {
7863 type Output = Self;
7864 #[doc = "Compute the bitwise NOT of the vector."]
7865 #[inline(always)]
7866 fn not(self) -> Self::Output {
7867 self.simd.not_i64x8(self)
7868 }
7869}
7870impl<S: Simd> core::ops::Shl<u32> for i64x8<S> {
7871 type Output = Self;
7872 #[doc = "Shift each element left by the given number of bits.\n\nBits shifted out of the left side are discarded, and zeros are shifted in on the right.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform."]
7873 #[inline(always)]
7874 fn shl(self, rhs: u32) -> Self::Output {
7875 self.simd.shl_i64x8(self, rhs)
7876 }
7877}
7878impl<S: Simd> core::ops::ShlAssign<u32> for i64x8<S> {
7879 #[inline(always)]
7880 fn shl_assign(&mut self, rhs: u32) {
7881 *self = self.simd.shl_i64x8(*self, rhs);
7882 }
7883}
7884impl<S: Simd> core::ops::Shl for i64x8<S> {
7885 type Output = Self;
7886 #[doc = "Shift each element left by the given number of bits.\n\nBits shifted out of the left side are discarded, and zeros are shifted in on the right.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform.\n\n# Performance\nThis per-lane shift is slower than shifting the entire vector by a scalar. It is not vectorized at all on WebAssembly, SSE4.2, and for `u8` and `i8` elements on AVX2. Prefer shifting by a single scalar value instead of by a vector whenever possible."]
7887 #[inline(always)]
7888 fn shl(self, rhs: Self) -> Self::Output {
7889 self.simd.shlv_i64x8(self, rhs)
7890 }
7891}
7892impl<S: Simd> core::ops::ShlAssign for i64x8<S> {
7893 #[doc = "Shift each element left by the given number of bits.\n\nBits shifted out of the left side are discarded, and zeros are shifted in on the right.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform.\n\n# Performance\nThis per-lane shift is slower than shifting the entire vector by a scalar. It is not vectorized at all on WebAssembly, SSE4.2, and for `u8` and `i8` elements on AVX2. Prefer shifting by a single scalar value instead of by a vector whenever possible."]
7894 #[inline(always)]
7895 fn shl_assign(&mut self, rhs: Self) {
7896 *self = self.simd.shlv_i64x8(*self, rhs);
7897 }
7898}
7899impl<S: Simd> core::ops::Shr<u32> for i64x8<S> {
7900 type Output = Self;
7901 #[doc = "Shift each element right by the given number of bits.\n\nFor unsigned integers, zeros are shifted in on the left. For signed integers, the sign bit is replicated.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform."]
7902 #[inline(always)]
7903 fn shr(self, rhs: u32) -> Self::Output {
7904 self.simd.shr_i64x8(self, rhs)
7905 }
7906}
7907impl<S: Simd> core::ops::ShrAssign<u32> for i64x8<S> {
7908 #[inline(always)]
7909 fn shr_assign(&mut self, rhs: u32) {
7910 *self = self.simd.shr_i64x8(*self, rhs);
7911 }
7912}
7913impl<S: Simd> core::ops::Shr for i64x8<S> {
7914 type Output = Self;
7915 #[doc = "Shift each element right by the corresponding element in another vector.\n\nFor unsigned integers, zeros are shifted in on the left. For signed integers, the sign bit is replicated.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform.\n\n# Performance\nThis per-lane shift is slower than shifting the entire vector by a scalar. It is not vectorized at all on WebAssembly, SSE4.2, and for `u8` and `i8` elements on AVX2. Prefer shifting by a single scalar value instead of by a vector whenever possible."]
7916 #[inline(always)]
7917 fn shr(self, rhs: Self) -> Self::Output {
7918 self.simd.shrv_i64x8(self, rhs)
7919 }
7920}
7921impl<S: Simd> core::ops::ShrAssign for i64x8<S> {
7922 #[doc = "Shift each element right by the corresponding element in another vector.\n\nFor unsigned integers, zeros are shifted in on the left. For signed integers, the sign bit is replicated.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform.\n\n# Performance\nThis per-lane shift is slower than shifting the entire vector by a scalar. It is not vectorized at all on WebAssembly, SSE4.2, and for `u8` and `i8` elements on AVX2. Prefer shifting by a single scalar value instead of by a vector whenever possible."]
7923 #[inline(always)]
7924 fn shr_assign(&mut self, rhs: Self) {
7925 *self = self.simd.shrv_i64x8(*self, rhs);
7926 }
7927}
7928impl<S: Simd> core::ops::Add for u64x8<S> {
7929 type Output = Self;
7930 #[doc = "Add two vectors element-wise, wrapping on overflow."]
7931 #[inline(always)]
7932 fn add(self, rhs: Self) -> Self::Output {
7933 self.simd.add_u64x8(self, rhs)
7934 }
7935}
7936impl<S: Simd> core::ops::AddAssign for u64x8<S> {
7937 #[doc = "Add two vectors element-wise, wrapping on overflow."]
7938 #[inline(always)]
7939 fn add_assign(&mut self, rhs: Self) {
7940 *self = self.simd.add_u64x8(*self, rhs);
7941 }
7942}
7943impl<S: Simd> core::ops::Add<u64> for u64x8<S> {
7944 type Output = Self;
7945 #[inline(always)]
7946 fn add(self, rhs: u64) -> Self::Output {
7947 self.simd.add_u64x8(self, rhs.simd_into(self.simd))
7948 }
7949}
7950impl<S: Simd> core::ops::AddAssign<u64> for u64x8<S> {
7951 #[inline(always)]
7952 fn add_assign(&mut self, rhs: u64) {
7953 *self = self.simd.add_u64x8(*self, rhs.simd_into(self.simd));
7954 }
7955}
7956impl<S: Simd> core::ops::Add<u64x8<S>> for u64 {
7957 type Output = u64x8<S>;
7958 #[inline(always)]
7959 fn add(self, rhs: u64x8<S>) -> Self::Output {
7960 rhs.simd.add_u64x8(self.simd_into(rhs.simd), rhs)
7961 }
7962}
7963impl<S: Simd> core::ops::Sub for u64x8<S> {
7964 type Output = Self;
7965 #[doc = "Subtract two vectors element-wise, wrapping on overflow."]
7966 #[inline(always)]
7967 fn sub(self, rhs: Self) -> Self::Output {
7968 self.simd.sub_u64x8(self, rhs)
7969 }
7970}
7971impl<S: Simd> core::ops::SubAssign for u64x8<S> {
7972 #[doc = "Subtract two vectors element-wise, wrapping on overflow."]
7973 #[inline(always)]
7974 fn sub_assign(&mut self, rhs: Self) {
7975 *self = self.simd.sub_u64x8(*self, rhs);
7976 }
7977}
7978impl<S: Simd> core::ops::Sub<u64> for u64x8<S> {
7979 type Output = Self;
7980 #[inline(always)]
7981 fn sub(self, rhs: u64) -> Self::Output {
7982 self.simd.sub_u64x8(self, rhs.simd_into(self.simd))
7983 }
7984}
7985impl<S: Simd> core::ops::SubAssign<u64> for u64x8<S> {
7986 #[inline(always)]
7987 fn sub_assign(&mut self, rhs: u64) {
7988 *self = self.simd.sub_u64x8(*self, rhs.simd_into(self.simd));
7989 }
7990}
7991impl<S: Simd> core::ops::Sub<u64x8<S>> for u64 {
7992 type Output = u64x8<S>;
7993 #[inline(always)]
7994 fn sub(self, rhs: u64x8<S>) -> Self::Output {
7995 rhs.simd.sub_u64x8(self.simd_into(rhs.simd), rhs)
7996 }
7997}
7998impl<S: Simd> core::ops::Mul for u64x8<S> {
7999 type Output = Self;
8000 #[doc = "Multiply two vectors element-wise, wrapping on overflow."]
8001 #[inline(always)]
8002 fn mul(self, rhs: Self) -> Self::Output {
8003 self.simd.mul_u64x8(self, rhs)
8004 }
8005}
8006impl<S: Simd> core::ops::MulAssign for u64x8<S> {
8007 #[doc = "Multiply two vectors element-wise, wrapping on overflow."]
8008 #[inline(always)]
8009 fn mul_assign(&mut self, rhs: Self) {
8010 *self = self.simd.mul_u64x8(*self, rhs);
8011 }
8012}
8013impl<S: Simd> core::ops::Mul<u64> for u64x8<S> {
8014 type Output = Self;
8015 #[inline(always)]
8016 fn mul(self, rhs: u64) -> Self::Output {
8017 self.simd.mul_u64x8(self, rhs.simd_into(self.simd))
8018 }
8019}
8020impl<S: Simd> core::ops::MulAssign<u64> for u64x8<S> {
8021 #[inline(always)]
8022 fn mul_assign(&mut self, rhs: u64) {
8023 *self = self.simd.mul_u64x8(*self, rhs.simd_into(self.simd));
8024 }
8025}
8026impl<S: Simd> core::ops::Mul<u64x8<S>> for u64 {
8027 type Output = u64x8<S>;
8028 #[inline(always)]
8029 fn mul(self, rhs: u64x8<S>) -> Self::Output {
8030 rhs.simd.mul_u64x8(self.simd_into(rhs.simd), rhs)
8031 }
8032}
8033impl<S: Simd> core::ops::BitAnd for u64x8<S> {
8034 type Output = Self;
8035 #[doc = "Compute the bitwise AND of two vectors."]
8036 #[inline(always)]
8037 fn bitand(self, rhs: Self) -> Self::Output {
8038 self.simd.and_u64x8(self, rhs)
8039 }
8040}
8041impl<S: Simd> core::ops::BitAndAssign for u64x8<S> {
8042 #[doc = "Compute the bitwise AND of two vectors."]
8043 #[inline(always)]
8044 fn bitand_assign(&mut self, rhs: Self) {
8045 *self = self.simd.and_u64x8(*self, rhs);
8046 }
8047}
8048impl<S: Simd> core::ops::BitAnd<u64> for u64x8<S> {
8049 type Output = Self;
8050 #[inline(always)]
8051 fn bitand(self, rhs: u64) -> Self::Output {
8052 self.simd.and_u64x8(self, rhs.simd_into(self.simd))
8053 }
8054}
8055impl<S: Simd> core::ops::BitAndAssign<u64> for u64x8<S> {
8056 #[inline(always)]
8057 fn bitand_assign(&mut self, rhs: u64) {
8058 *self = self.simd.and_u64x8(*self, rhs.simd_into(self.simd));
8059 }
8060}
8061impl<S: Simd> core::ops::BitAnd<u64x8<S>> for u64 {
8062 type Output = u64x8<S>;
8063 #[inline(always)]
8064 fn bitand(self, rhs: u64x8<S>) -> Self::Output {
8065 rhs.simd.and_u64x8(self.simd_into(rhs.simd), rhs)
8066 }
8067}
8068impl<S: Simd> core::ops::BitOr for u64x8<S> {
8069 type Output = Self;
8070 #[doc = "Compute the bitwise OR of two vectors."]
8071 #[inline(always)]
8072 fn bitor(self, rhs: Self) -> Self::Output {
8073 self.simd.or_u64x8(self, rhs)
8074 }
8075}
8076impl<S: Simd> core::ops::BitOrAssign for u64x8<S> {
8077 #[doc = "Compute the bitwise OR of two vectors."]
8078 #[inline(always)]
8079 fn bitor_assign(&mut self, rhs: Self) {
8080 *self = self.simd.or_u64x8(*self, rhs);
8081 }
8082}
8083impl<S: Simd> core::ops::BitOr<u64> for u64x8<S> {
8084 type Output = Self;
8085 #[inline(always)]
8086 fn bitor(self, rhs: u64) -> Self::Output {
8087 self.simd.or_u64x8(self, rhs.simd_into(self.simd))
8088 }
8089}
8090impl<S: Simd> core::ops::BitOrAssign<u64> for u64x8<S> {
8091 #[inline(always)]
8092 fn bitor_assign(&mut self, rhs: u64) {
8093 *self = self.simd.or_u64x8(*self, rhs.simd_into(self.simd));
8094 }
8095}
8096impl<S: Simd> core::ops::BitOr<u64x8<S>> for u64 {
8097 type Output = u64x8<S>;
8098 #[inline(always)]
8099 fn bitor(self, rhs: u64x8<S>) -> Self::Output {
8100 rhs.simd.or_u64x8(self.simd_into(rhs.simd), rhs)
8101 }
8102}
8103impl<S: Simd> core::ops::BitXor for u64x8<S> {
8104 type Output = Self;
8105 #[doc = "Compute the bitwise XOR of two vectors."]
8106 #[inline(always)]
8107 fn bitxor(self, rhs: Self) -> Self::Output {
8108 self.simd.xor_u64x8(self, rhs)
8109 }
8110}
8111impl<S: Simd> core::ops::BitXorAssign for u64x8<S> {
8112 #[doc = "Compute the bitwise XOR of two vectors."]
8113 #[inline(always)]
8114 fn bitxor_assign(&mut self, rhs: Self) {
8115 *self = self.simd.xor_u64x8(*self, rhs);
8116 }
8117}
8118impl<S: Simd> core::ops::BitXor<u64> for u64x8<S> {
8119 type Output = Self;
8120 #[inline(always)]
8121 fn bitxor(self, rhs: u64) -> Self::Output {
8122 self.simd.xor_u64x8(self, rhs.simd_into(self.simd))
8123 }
8124}
8125impl<S: Simd> core::ops::BitXorAssign<u64> for u64x8<S> {
8126 #[inline(always)]
8127 fn bitxor_assign(&mut self, rhs: u64) {
8128 *self = self.simd.xor_u64x8(*self, rhs.simd_into(self.simd));
8129 }
8130}
8131impl<S: Simd> core::ops::BitXor<u64x8<S>> for u64 {
8132 type Output = u64x8<S>;
8133 #[inline(always)]
8134 fn bitxor(self, rhs: u64x8<S>) -> Self::Output {
8135 rhs.simd.xor_u64x8(self.simd_into(rhs.simd), rhs)
8136 }
8137}
8138impl<S: Simd> core::ops::Not for u64x8<S> {
8139 type Output = Self;
8140 #[doc = "Compute the bitwise NOT of the vector."]
8141 #[inline(always)]
8142 fn not(self) -> Self::Output {
8143 self.simd.not_u64x8(self)
8144 }
8145}
8146impl<S: Simd> core::ops::Shl<u32> for u64x8<S> {
8147 type Output = Self;
8148 #[doc = "Shift each element left by the given number of bits.\n\nBits shifted out of the left side are discarded, and zeros are shifted in on the right.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform."]
8149 #[inline(always)]
8150 fn shl(self, rhs: u32) -> Self::Output {
8151 self.simd.shl_u64x8(self, rhs)
8152 }
8153}
8154impl<S: Simd> core::ops::ShlAssign<u32> for u64x8<S> {
8155 #[inline(always)]
8156 fn shl_assign(&mut self, rhs: u32) {
8157 *self = self.simd.shl_u64x8(*self, rhs);
8158 }
8159}
8160impl<S: Simd> core::ops::Shl for u64x8<S> {
8161 type Output = Self;
8162 #[doc = "Shift each element left by the given number of bits.\n\nBits shifted out of the left side are discarded, and zeros are shifted in on the right.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform.\n\n# Performance\nThis per-lane shift is slower than shifting the entire vector by a scalar. It is not vectorized at all on WebAssembly, SSE4.2, and for `u8` and `i8` elements on AVX2. Prefer shifting by a single scalar value instead of by a vector whenever possible."]
8163 #[inline(always)]
8164 fn shl(self, rhs: Self) -> Self::Output {
8165 self.simd.shlv_u64x8(self, rhs)
8166 }
8167}
8168impl<S: Simd> core::ops::ShlAssign for u64x8<S> {
8169 #[doc = "Shift each element left by the given number of bits.\n\nBits shifted out of the left side are discarded, and zeros are shifted in on the right.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform.\n\n# Performance\nThis per-lane shift is slower than shifting the entire vector by a scalar. It is not vectorized at all on WebAssembly, SSE4.2, and for `u8` and `i8` elements on AVX2. Prefer shifting by a single scalar value instead of by a vector whenever possible."]
8170 #[inline(always)]
8171 fn shl_assign(&mut self, rhs: Self) {
8172 *self = self.simd.shlv_u64x8(*self, rhs);
8173 }
8174}
8175impl<S: Simd> core::ops::Shr<u32> for u64x8<S> {
8176 type Output = Self;
8177 #[doc = "Shift each element right by the given number of bits.\n\nFor unsigned integers, zeros are shifted in on the left. For signed integers, the sign bit is replicated.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform."]
8178 #[inline(always)]
8179 fn shr(self, rhs: u32) -> Self::Output {
8180 self.simd.shr_u64x8(self, rhs)
8181 }
8182}
8183impl<S: Simd> core::ops::ShrAssign<u32> for u64x8<S> {
8184 #[inline(always)]
8185 fn shr_assign(&mut self, rhs: u32) {
8186 *self = self.simd.shr_u64x8(*self, rhs);
8187 }
8188}
8189impl<S: Simd> core::ops::Shr for u64x8<S> {
8190 type Output = Self;
8191 #[doc = "Shift each element right by the corresponding element in another vector.\n\nFor unsigned integers, zeros are shifted in on the left. For signed integers, the sign bit is replicated.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform.\n\n# Performance\nThis per-lane shift is slower than shifting the entire vector by a scalar. It is not vectorized at all on WebAssembly, SSE4.2, and for `u8` and `i8` elements on AVX2. Prefer shifting by a single scalar value instead of by a vector whenever possible."]
8192 #[inline(always)]
8193 fn shr(self, rhs: Self) -> Self::Output {
8194 self.simd.shrv_u64x8(self, rhs)
8195 }
8196}
8197impl<S: Simd> core::ops::ShrAssign for u64x8<S> {
8198 #[doc = "Shift each element right by the corresponding element in another vector.\n\nFor unsigned integers, zeros are shifted in on the left. For signed integers, the sign bit is replicated.\n\nWhen shifting out of bounds (e.g. shifting a 32-bit value by 32 or more), the result is implementation-defined and may vary by platform.\n\n# Performance\nThis per-lane shift is slower than shifting the entire vector by a scalar. It is not vectorized at all on WebAssembly, SSE4.2, and for `u8` and `i8` elements on AVX2. Prefer shifting by a single scalar value instead of by a vector whenever possible."]
8199 #[inline(always)]
8200 fn shr_assign(&mut self, rhs: Self) {
8201 *self = self.simd.shrv_u64x8(*self, rhs);
8202 }
8203}
8204impl<S: Simd> core::ops::BitAnd for mask64x8<S> {
8205 type Output = Self;
8206 #[doc = "Compute the logical AND of two masks."]
8207 #[inline(always)]
8208 fn bitand(self, rhs: Self) -> Self::Output {
8209 self.simd.and_mask64x8(self, rhs)
8210 }
8211}
8212impl<S: Simd> core::ops::BitAndAssign for mask64x8<S> {
8213 #[doc = "Compute the logical AND of two masks."]
8214 #[inline(always)]
8215 fn bitand_assign(&mut self, rhs: Self) {
8216 *self = self.simd.and_mask64x8(*self, rhs);
8217 }
8218}
8219impl<S: Simd> core::ops::BitOr for mask64x8<S> {
8220 type Output = Self;
8221 #[doc = "Compute the logical OR of two masks."]
8222 #[inline(always)]
8223 fn bitor(self, rhs: Self) -> Self::Output {
8224 self.simd.or_mask64x8(self, rhs)
8225 }
8226}
8227impl<S: Simd> core::ops::BitOrAssign for mask64x8<S> {
8228 #[doc = "Compute the logical OR of two masks."]
8229 #[inline(always)]
8230 fn bitor_assign(&mut self, rhs: Self) {
8231 *self = self.simd.or_mask64x8(*self, rhs);
8232 }
8233}
8234impl<S: Simd> core::ops::BitXor for mask64x8<S> {
8235 type Output = Self;
8236 #[doc = "Compute the logical XOR of two masks."]
8237 #[inline(always)]
8238 fn bitxor(self, rhs: Self) -> Self::Output {
8239 self.simd.xor_mask64x8(self, rhs)
8240 }
8241}
8242impl<S: Simd> core::ops::BitXorAssign for mask64x8<S> {
8243 #[doc = "Compute the logical XOR of two masks."]
8244 #[inline(always)]
8245 fn bitxor_assign(&mut self, rhs: Self) {
8246 *self = self.simd.xor_mask64x8(*self, rhs);
8247 }
8248}
8249impl<S: Simd> core::ops::Not for mask64x8<S> {
8250 type Output = Self;
8251 #[doc = "Compute the logical NOT of the mask."]
8252 #[inline(always)]
8253 fn not(self) -> Self::Output {
8254 self.simd.not_mask64x8(self)
8255 }
8256}