feagi_hal/hal/
accelerator.rs

1// Copyright 2025 Neuraville Inc.
2// SPDX-License-Identifier: Apache-2.0
3
4/// Neural accelerator abstraction for hardware acceleration (Hailo, TPU, etc.)
5pub trait NeuralAccelerator {
6    /// Platform-specific error type
7    type Error;
8
9    /// Check if accelerator is available and ready
10    ///
11    /// # Returns
12    /// True if accelerator is ready to use
13    fn is_available(&self) -> bool;
14
15    /// Get accelerator name/identifier
16    ///
17    /// # Returns
18    /// Human-readable accelerator name
19    fn name(&self) -> &'static str;
20
21    /// Get accelerator performance metrics (TOPS, GOPS, etc.)
22    ///
23    /// # Returns
24    /// Performance in operations per second
25    fn performance_ops_per_sec(&self) -> u64 {
26        0 // Default: unknown
27    }
28
29    /// Upload neuron state to accelerator
30    ///
31    /// # Arguments
32    /// * `neurons` - Serialized neuron state data
33    ///
34    /// # Returns
35    /// Ok(()) or error
36    fn upload_neurons(&mut self, neurons: &[u8]) -> Result<(), Self::Error>;
37
38    /// Upload synapse connectivity to accelerator
39    ///
40    /// # Arguments
41    /// * `synapses` - Serialized synapse data
42    ///
43    /// # Returns
44    /// Ok(()) or error
45    fn upload_synapses(&mut self, synapses: &[u8]) -> Result<(), Self::Error>;
46
47    /// Process burst on accelerator
48    ///
49    /// # Returns
50    /// Number of neurons that fired, or error
51    fn process_burst(&mut self) -> Result<u32, Self::Error>;
52
53    /// Download updated neuron state from accelerator
54    ///
55    /// # Arguments
56    /// * `buffer` - Buffer to write neuron state into
57    ///
58    /// # Returns
59    /// Number of bytes written or error
60    fn download_neurons(&mut self, buffer: &mut [u8]) -> Result<usize, Self::Error>;
61
62    /// Reset accelerator to initial state
63    ///
64    /// # Returns
65    /// Ok(()) or error
66    fn reset(&mut self) -> Result<(), Self::Error> {
67        // Default implementation: no-op
68        Ok(())
69    }
70}
71
72/// Accelerator capabilities
73#[derive(Debug, Clone, Copy)]
74pub struct AcceleratorCapabilities {
75    /// Maximum neurons supported
76    pub max_neurons: usize,
77
78    /// Maximum synapses supported
79    pub max_synapses: usize,
80
81    /// Supported precisions (bitmask: bit 0 = INT8, bit 1 = FP16, bit 2 = FP32)
82    pub supported_precisions: u8,
83
84    /// Memory bandwidth (bytes/sec)
85    pub memory_bandwidth_bytes_per_sec: u64,
86
87    /// Power consumption (milliwatts)
88    pub power_consumption_mw: u32,
89}
90
91impl AcceleratorCapabilities {
92    /// Check if INT8 precision is supported
93    pub fn supports_int8(&self) -> bool {
94        (self.supported_precisions & 0b001) != 0
95    }
96
97    /// Check if FP16 precision is supported
98    pub fn supports_fp16(&self) -> bool {
99        (self.supported_precisions & 0b010) != 0
100    }
101
102    /// Check if FP32 precision is supported
103    pub fn supports_fp32(&self) -> bool {
104        (self.supported_precisions & 0b100) != 0
105    }
106}
feagi_hal/hal/accelerator.rs

feagi_hal/hal/
accelerator.rs
