Expand description
The CPU render lane (L0 fallback).
scissor— the rect scissor geometry (moved from map3d in Phase A).sdf— the CPU SDF coverage + thick-AA-line raster math (the source of truth the GPUsdf.wgsl/line.wgslmirror).CpuCanvas— collectsQuadInstance/LineInstancebatches and rasterizes them onto avello_cpuPixmapvia thesdfcoverage math, producing a straight-RGBA8 frame. It implements the L0Canvasseam;CpuRendererimplementsRenderer.
Re-exports§
pub use scissor::clip_poly_to_rect;pub use scissor::ink_outside_rect;
Modules§
- scissor
- The CPU rect scissor — geometry-level clipping of triangles to a widget rect, the “ink never escapes the rect” guarantee.
- sdf
- CPU SDF coverage + AA-line raster — the L0 fallback that produces the same
pixels as the GPU pipeline ([
super::super::gpu::sdf_pipeline]).
Structs§
- CpuCanvas
- A CPU canvas: an off-screen
Pixmap(the vello_cpu raster target, per the CONS-CORE spec) plus the batched SDF instances drawn onto it. The host pushes quads + lines, thenCpuCanvas::rasterizeevaluates thesdfcoverage for every instance over its bounding box and alpha-composites it into the pixmap. - CpuRenderer
- The CPU
Renderer—beginopens aCpuCanvassized to the rect,presentrasterizes it to aFrame. Headless / device / CI; always available (no GPU).