Module london

Source
Expand description

Instructions available in the London hard fork.

Structs§

Add
Representation of the add instruction.
AddMod
Representation of the addmod instruction.
Address
Representation of the address instruction.
And
Representation of the and instruction.
Balance
Representation of the balance instruction.
BaseFee
Representation of the basefee instruction.
BlockHash
Representation of the blockhash instruction.
Byte
Representation of the byte instruction.
Call
Representation of the call instruction.
CallCode
Representation of the callcode instruction.
CallDataCopy
Representation of the calldatacopy instruction.
CallDataLoad
Representation of the calldataload instruction.
CallDataSize
Representation of the calldatasize instruction.
CallValue
Representation of the callvalue instruction.
Caller
Representation of the caller instruction.
ChainId
Representation of the chainid instruction.
CodeCopy
Representation of the codecopy instruction.
CodeSize
Representation of the codesize instruction.
Coinbase
Representation of the coinbase instruction.
Create
Representation of the create instruction.
Create2
Representation of the create2 instruction.
DelegateCall
Representation of the delegatecall instruction.
Difficulty
Representation of the difficulty instruction.
Div
Representation of the div instruction.
Dup1
Representation of the dup1 instruction.
Dup2
Representation of the dup2 instruction.
Dup3
Representation of the dup3 instruction.
Dup4
Representation of the dup4 instruction.
Dup5
Representation of the dup5 instruction.
Dup6
Representation of the dup6 instruction.
Dup7
Representation of the dup7 instruction.
Dup8
Representation of the dup8 instruction.
Dup9
Representation of the dup9 instruction.
Dup10
Representation of the dup10 instruction.
Dup11
Representation of the dup11 instruction.
Dup12
Representation of the dup12 instruction.
Dup13
Representation of the dup13 instruction.
Dup14
Representation of the dup14 instruction.
Dup15
Representation of the dup15 instruction.
Dup16
Representation of the dup16 instruction.
Eq
Representation of the eq instruction.
Exp
Representation of the exp instruction.
ExtCodeCopy
Representation of the extcodecopy instruction.
ExtCodeHash
Representation of the extcodehash instruction.
ExtCodeSize
Representation of the extcodesize instruction.
Gas
Representation of the gas instruction.
GasLimit
Representation of the gaslimit instruction.
GasPrice
Representation of the gasprice instruction.
GetPc
Representation of the pc instruction.
Gt
Representation of the gt instruction.
Invalid
Representation of the invalid instruction.
Invalid0c
Representation of the invalid_0c instruction.
Invalid0d
Representation of the invalid_0d instruction.
Invalid0e
Representation of the invalid_0e instruction.
Invalid0f
Representation of the invalid_0f instruction.
Invalid1e
Representation of the invalid_1e instruction.
Invalid1f
Representation of the invalid_1f instruction.
Invalid2a
Representation of the invalid_2a instruction.
Invalid2b
Representation of the invalid_2b instruction.
Invalid2c
Representation of the invalid_2c instruction.
Invalid2d
Representation of the invalid_2d instruction.
Invalid2e
Representation of the invalid_2e instruction.
Invalid2f
Representation of the invalid_2f instruction.
Invalid4a
Representation of the invalid_4a instruction.
Invalid4b
Representation of the invalid_4b instruction.
Invalid4c
Representation of the invalid_4c instruction.
Invalid4d
Representation of the invalid_4d instruction.
Invalid4e
Representation of the invalid_4e instruction.
Invalid4f
Representation of the invalid_4f instruction.
Invalid5c
Representation of the invalid_5c instruction.
Invalid5d
Representation of the invalid_5d instruction.
Invalid5e
Representation of the invalid_5e instruction.
Invalid5f
Representation of the invalid_5f instruction.
Invalid21
Representation of the invalid_21 instruction.
Invalid22
Representation of the invalid_22 instruction.
Invalid23
Representation of the invalid_23 instruction.
Invalid24
Representation of the invalid_24 instruction.
Invalid25
Representation of the invalid_25 instruction.
Invalid26
Representation of the invalid_26 instruction.
Invalid27
Representation of the invalid_27 instruction.
Invalid28
Representation of the invalid_28 instruction.
Invalid29
Representation of the invalid_29 instruction.
Invalid49
Representation of the invalid_49 instruction.
InvalidA5
Representation of the invalid_a5 instruction.
InvalidA6
Representation of the invalid_a6 instruction.
InvalidA7
Representation of the invalid_a7 instruction.
InvalidA8
Representation of the invalid_a8 instruction.
InvalidA9
Representation of the invalid_a9 instruction.
InvalidAa
Representation of the invalid_aa instruction.
InvalidAb
Representation of the invalid_ab instruction.
InvalidAc
Representation of the invalid_ac instruction.
InvalidAd
Representation of the invalid_ad instruction.
InvalidAe
Representation of the invalid_ae instruction.
InvalidAf
Representation of the invalid_af instruction.
InvalidB0
Representation of the invalid_b0 instruction.
InvalidB1
Representation of the invalid_b1 instruction.
InvalidB2
Representation of the invalid_b2 instruction.
InvalidB3
Representation of the invalid_b3 instruction.
InvalidB4
Representation of the invalid_b4 instruction.
InvalidB5
Representation of the invalid_b5 instruction.
InvalidB6
Representation of the invalid_b6 instruction.
InvalidB7
Representation of the invalid_b7 instruction.
InvalidB8
Representation of the invalid_b8 instruction.
InvalidB9
Representation of the invalid_b9 instruction.
InvalidBa
Representation of the invalid_ba instruction.
InvalidBb
Representation of the invalid_bb instruction.
InvalidBc
Representation of the invalid_bc instruction.
InvalidBd
Representation of the invalid_bd instruction.
InvalidBe
Representation of the invalid_be instruction.
InvalidBf
Representation of the invalid_bf instruction.
InvalidC0
Representation of the invalid_c0 instruction.
InvalidC1
Representation of the invalid_c1 instruction.
InvalidC2
Representation of the invalid_c2 instruction.
InvalidC3
Representation of the invalid_c3 instruction.
InvalidC4
Representation of the invalid_c4 instruction.
InvalidC5
Representation of the invalid_c5 instruction.
InvalidC6
Representation of the invalid_c6 instruction.
InvalidC7
Representation of the invalid_c7 instruction.
InvalidC8
Representation of the invalid_c8 instruction.
InvalidC9
Representation of the invalid_c9 instruction.
InvalidCa
Representation of the invalid_ca instruction.
InvalidCb
Representation of the invalid_cb instruction.
InvalidCc
Representation of the invalid_cc instruction.
InvalidCd
Representation of the invalid_cd instruction.
InvalidCe
Representation of the invalid_ce instruction.
InvalidCf
Representation of the invalid_cf instruction.
InvalidD0
Representation of the invalid_d0 instruction.
InvalidD1
Representation of the invalid_d1 instruction.
InvalidD2
Representation of the invalid_d2 instruction.
InvalidD3
Representation of the invalid_d3 instruction.
InvalidD4
Representation of the invalid_d4 instruction.
InvalidD5
Representation of the invalid_d5 instruction.
InvalidD6
Representation of the invalid_d6 instruction.
InvalidD7
Representation of the invalid_d7 instruction.
InvalidD8
Representation of the invalid_d8 instruction.
InvalidD9
Representation of the invalid_d9 instruction.
InvalidDa
Representation of the invalid_da instruction.
InvalidDb
Representation of the invalid_db instruction.
InvalidDc
Representation of the invalid_dc instruction.
InvalidDd
Representation of the invalid_dd instruction.
InvalidDe
Representation of the invalid_de instruction.
InvalidDf
Representation of the invalid_df instruction.
InvalidE0
Representation of the invalid_e0 instruction.
InvalidE1
Representation of the invalid_e1 instruction.
InvalidE2
Representation of the invalid_e2 instruction.
InvalidE3
Representation of the invalid_e3 instruction.
InvalidE4
Representation of the invalid_e4 instruction.
InvalidE5
Representation of the invalid_e5 instruction.
InvalidE6
Representation of the invalid_e6 instruction.
InvalidE7
Representation of the invalid_e7 instruction.
InvalidE8
Representation of the invalid_e8 instruction.
InvalidE9
Representation of the invalid_e9 instruction.
InvalidEa
Representation of the invalid_ea instruction.
InvalidEb
Representation of the invalid_eb instruction.
InvalidEc
Representation of the invalid_ec instruction.
InvalidEd
Representation of the invalid_ed instruction.
InvalidEe
Representation of the invalid_ee instruction.
InvalidEf
Representation of the invalid_ef instruction.
InvalidF6
Representation of the invalid_f6 instruction.
InvalidF7
Representation of the invalid_f7 instruction.
InvalidF8
Representation of the invalid_f8 instruction.
InvalidF9
Representation of the invalid_f9 instruction.
InvalidFb
Representation of the invalid_fb instruction.
InvalidFc
Representation of the invalid_fc instruction.
IsZero
Representation of the iszero instruction.
Jump
Representation of the jump instruction.
JumpDest
Representation of the jumpdest instruction.
JumpI
Representation of the jumpi instruction.
Keccak256
Representation of the keccak256 instruction.
Log0
Representation of the log0 instruction.
Log1
Representation of the log1 instruction.
Log2
Representation of the log2 instruction.
Log3
Representation of the log3 instruction.
Log4
Representation of the log4 instruction.
Lt
Representation of the lt instruction.
MLoad
Representation of the mload instruction.
MSize
Representation of the msize instruction.
MStore
Representation of the mstore instruction.
MStore8
Representation of the mstore8 instruction.
Mod
Representation of the mod instruction.
Mul
Representation of the mul instruction.
MulMod
Representation of the mulmod instruction.
Not
Representation of the not instruction.
Number
Representation of the number instruction.
Or
Representation of the or instruction.
Origin
Representation of the origin instruction.
Pop
Representation of the pop instruction.
Push1
Representation of the push1 instruction.
Push2
Representation of the push2 instruction.
Push3
Representation of the push3 instruction.
Push4
Representation of the push4 instruction.
Push5
Representation of the push5 instruction.
Push6
Representation of the push6 instruction.
Push7
Representation of the push7 instruction.
Push8
Representation of the push8 instruction.
Push9
Representation of the push9 instruction.
Push10
Representation of the push10 instruction.
Push11
Representation of the push11 instruction.
Push12
Representation of the push12 instruction.
Push13
Representation of the push13 instruction.
Push14
Representation of the push14 instruction.
Push15
Representation of the push15 instruction.
Push16
Representation of the push16 instruction.
Push17
Representation of the push17 instruction.
Push18
Representation of the push18 instruction.
Push19
Representation of the push19 instruction.
Push20
Representation of the push20 instruction.
Push21
Representation of the push21 instruction.
Push22
Representation of the push22 instruction.
Push23
Representation of the push23 instruction.
Push24
Representation of the push24 instruction.
Push25
Representation of the push25 instruction.
Push26
Representation of the push26 instruction.
Push27
Representation of the push27 instruction.
Push28
Representation of the push28 instruction.
Push29
Representation of the push29 instruction.
Push30
Representation of the push30 instruction.
Push31
Representation of the push31 instruction.
Push32
Representation of the push32 instruction.
Return
Representation of the return instruction.
ReturnDataCopy
Representation of the returndatacopy instruction.
ReturnDataSize
Representation of the returndatasize instruction.
Revert
Representation of the revert instruction.
SDiv
Representation of the sdiv instruction.
SGt
Representation of the sgt instruction.
SLoad
Representation of the sload instruction.
SLt
Representation of the slt instruction.
SMod
Representation of the smod instruction.
SStore
Representation of the sstore instruction.
Sar
Representation of the sar instruction.
SelfBalance
Representation of the selfbalance instruction.
SelfDestruct
Representation of the selfdestruct instruction.
Shl
Representation of the shl instruction.
Shr
Representation of the shr instruction.
SignExtend
Representation of the signextend instruction.
StaticCall
Representation of the staticcall instruction.
Stop
Representation of the stop instruction.
Sub
Representation of the sub instruction.
Swap1
Representation of the swap1 instruction.
Swap2
Representation of the swap2 instruction.
Swap3
Representation of the swap3 instruction.
Swap4
Representation of the swap4 instruction.
Swap5
Representation of the swap5 instruction.
Swap6
Representation of the swap6 instruction.
Swap7
Representation of the swap7 instruction.
Swap8
Representation of the swap8 instruction.
Swap9
Representation of the swap9 instruction.
Swap10
Representation of the swap10 instruction.
Swap11
Representation of the swap11 instruction.
Swap12
Representation of the swap12 instruction.
Swap13
Representation of the swap13 instruction.
Swap14
Representation of the swap14 instruction.
Swap15
Representation of the swap15 instruction.
Swap16
Representation of the swap16 instruction.
Timestamp
Representation of the timestamp instruction.
Xor
Representation of the xor instruction.

Enums§

Op
All instructions in the london fork.

Traits§

Operation
Trait for types that represent an EVM instruction.