esp8266/spi1/
spi_slave.rs

1#[doc = "Register `SPI_SLAVE` reader"]
2pub struct R(crate::R<SPI_SLAVE_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<SPI_SLAVE_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<SPI_SLAVE_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<SPI_SLAVE_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `SPI_SLAVE` writer"]
17pub struct W(crate::W<SPI_SLAVE_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<SPI_SLAVE_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<SPI_SLAVE_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<SPI_SLAVE_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `spi_sync_reset` reader - It is the synchronous reset signal of the module. This bit is self-cleared by hardware."]
38pub struct SPI_SYNC_RESET_R(crate::FieldReader<bool, bool>);
39impl SPI_SYNC_RESET_R {
40    #[inline(always)]
41    pub(crate) fn new(bits: bool) -> Self {
42        SPI_SYNC_RESET_R(crate::FieldReader::new(bits))
43    }
44}
45impl core::ops::Deref for SPI_SYNC_RESET_R {
46    type Target = crate::FieldReader<bool, bool>;
47    #[inline(always)]
48    fn deref(&self) -> &Self::Target {
49        &self.0
50    }
51}
52#[doc = "Field `spi_sync_reset` writer - It is the synchronous reset signal of the module. This bit is self-cleared by hardware."]
53pub struct SPI_SYNC_RESET_W<'a> {
54    w: &'a mut W,
55}
56impl<'a> SPI_SYNC_RESET_W<'a> {
57    #[doc = r"Sets the field bit"]
58    #[inline(always)]
59    pub fn set_bit(self) -> &'a mut W {
60        self.bit(true)
61    }
62    #[doc = r"Clears the field bit"]
63    #[inline(always)]
64    pub fn clear_bit(self) -> &'a mut W {
65        self.bit(false)
66    }
67    #[doc = r"Writes raw bits to the field"]
68    #[inline(always)]
69    pub fn bit(self, value: bool) -> &'a mut W {
70        self.w.bits = (self.w.bits & !(1 << 31)) | ((value as u32 & 1) << 31);
71        self.w
72    }
73}
74#[doc = "Field `spi_slave_mode` reader - 1: slave mode, 0: master mode."]
75pub struct SPI_SLAVE_MODE_R(crate::FieldReader<bool, bool>);
76impl SPI_SLAVE_MODE_R {
77    #[inline(always)]
78    pub(crate) fn new(bits: bool) -> Self {
79        SPI_SLAVE_MODE_R(crate::FieldReader::new(bits))
80    }
81}
82impl core::ops::Deref for SPI_SLAVE_MODE_R {
83    type Target = crate::FieldReader<bool, bool>;
84    #[inline(always)]
85    fn deref(&self) -> &Self::Target {
86        &self.0
87    }
88}
89#[doc = "Field `spi_slave_mode` writer - 1: slave mode, 0: master mode."]
90pub struct SPI_SLAVE_MODE_W<'a> {
91    w: &'a mut W,
92}
93impl<'a> SPI_SLAVE_MODE_W<'a> {
94    #[doc = r"Sets the field bit"]
95    #[inline(always)]
96    pub fn set_bit(self) -> &'a mut W {
97        self.bit(true)
98    }
99    #[doc = r"Clears the field bit"]
100    #[inline(always)]
101    pub fn clear_bit(self) -> &'a mut W {
102        self.bit(false)
103    }
104    #[doc = r"Writes raw bits to the field"]
105    #[inline(always)]
106    pub fn bit(self, value: bool) -> &'a mut W {
107        self.w.bits = (self.w.bits & !(1 << 30)) | ((value as u32 & 1) << 30);
108        self.w
109    }
110}
111#[doc = "Field `slv_cmd_define` reader - 1: slave mode commands are defined in SPI_SLAVE3. 0: slave mode commands are fixed as 1: \"write-status\"; 4: \"read-status\"; 2: \"write-buffer\" and 3: \"read-buffer\"."]
112pub struct SLV_CMD_DEFINE_R(crate::FieldReader<bool, bool>);
113impl SLV_CMD_DEFINE_R {
114    #[inline(always)]
115    pub(crate) fn new(bits: bool) -> Self {
116        SLV_CMD_DEFINE_R(crate::FieldReader::new(bits))
117    }
118}
119impl core::ops::Deref for SLV_CMD_DEFINE_R {
120    type Target = crate::FieldReader<bool, bool>;
121    #[inline(always)]
122    fn deref(&self) -> &Self::Target {
123        &self.0
124    }
125}
126#[doc = "Field `slv_cmd_define` writer - 1: slave mode commands are defined in SPI_SLAVE3. 0: slave mode commands are fixed as 1: \"write-status\"; 4: \"read-status\"; 2: \"write-buffer\" and 3: \"read-buffer\"."]
127pub struct SLV_CMD_DEFINE_W<'a> {
128    w: &'a mut W,
129}
130impl<'a> SLV_CMD_DEFINE_W<'a> {
131    #[doc = r"Sets the field bit"]
132    #[inline(always)]
133    pub fn set_bit(self) -> &'a mut W {
134        self.bit(true)
135    }
136    #[doc = r"Clears the field bit"]
137    #[inline(always)]
138    pub fn clear_bit(self) -> &'a mut W {
139        self.bit(false)
140    }
141    #[doc = r"Writes raw bits to the field"]
142    #[inline(always)]
143    pub fn bit(self, value: bool) -> &'a mut W {
144        self.w.bits = (self.w.bits & !(1 << 27)) | ((value as u32 & 1) << 27);
145        self.w
146    }
147}
148#[doc = "Field `spi_trans_cnt` reader - The operations counter in both the master mode and the slave mode."]
149pub struct SPI_TRANS_CNT_R(crate::FieldReader<u8, u8>);
150impl SPI_TRANS_CNT_R {
151    #[inline(always)]
152    pub(crate) fn new(bits: u8) -> Self {
153        SPI_TRANS_CNT_R(crate::FieldReader::new(bits))
154    }
155}
156impl core::ops::Deref for SPI_TRANS_CNT_R {
157    type Target = crate::FieldReader<u8, u8>;
158    #[inline(always)]
159    fn deref(&self) -> &Self::Target {
160        &self.0
161    }
162}
163#[doc = "Field `spi_int_en` reader - Interrupt enable bits for the below 5 sources"]
164pub struct SPI_INT_EN_R(crate::FieldReader<u8, u8>);
165impl SPI_INT_EN_R {
166    #[inline(always)]
167    pub(crate) fn new(bits: u8) -> Self {
168        SPI_INT_EN_R(crate::FieldReader::new(bits))
169    }
170}
171impl core::ops::Deref for SPI_INT_EN_R {
172    type Target = crate::FieldReader<u8, u8>;
173    #[inline(always)]
174    fn deref(&self) -> &Self::Target {
175        &self.0
176    }
177}
178#[doc = "Field `spi_int_en` writer - Interrupt enable bits for the below 5 sources"]
179pub struct SPI_INT_EN_W<'a> {
180    w: &'a mut W,
181}
182impl<'a> SPI_INT_EN_W<'a> {
183    #[doc = r"Writes raw bits to the field"]
184    #[inline(always)]
185    pub unsafe fn bits(self, value: u8) -> &'a mut W {
186        self.w.bits = (self.w.bits & !(0x1f << 5)) | ((value as u32 & 0x1f) << 5);
187        self.w
188    }
189}
190#[doc = "Field `spi_trans_done` reader - The interrupt raw bit for the completement of any operation in both the master mode and the slave mode."]
191pub struct SPI_TRANS_DONE_R(crate::FieldReader<bool, bool>);
192impl SPI_TRANS_DONE_R {
193    #[inline(always)]
194    pub(crate) fn new(bits: bool) -> Self {
195        SPI_TRANS_DONE_R(crate::FieldReader::new(bits))
196    }
197}
198impl core::ops::Deref for SPI_TRANS_DONE_R {
199    type Target = crate::FieldReader<bool, bool>;
200    #[inline(always)]
201    fn deref(&self) -> &Self::Target {
202        &self.0
203    }
204}
205#[doc = "Field `spi_trans_done` writer - The interrupt raw bit for the completement of any operation in both the master mode and the slave mode."]
206pub struct SPI_TRANS_DONE_W<'a> {
207    w: &'a mut W,
208}
209impl<'a> SPI_TRANS_DONE_W<'a> {
210    #[doc = r"Sets the field bit"]
211    #[inline(always)]
212    pub fn set_bit(self) -> &'a mut W {
213        self.bit(true)
214    }
215    #[doc = r"Clears the field bit"]
216    #[inline(always)]
217    pub fn clear_bit(self) -> &'a mut W {
218        self.bit(false)
219    }
220    #[doc = r"Writes raw bits to the field"]
221    #[inline(always)]
222    pub fn bit(self, value: bool) -> &'a mut W {
223        self.w.bits = (self.w.bits & !(1 << 4)) | ((value as u32 & 1) << 4);
224        self.w
225    }
226}
227#[doc = "Field `slv_wr_sta_done` reader - The interrupt raw bit for the completement of \"write-status\" operation in the slave mode."]
228pub struct SLV_WR_STA_DONE_R(crate::FieldReader<bool, bool>);
229impl SLV_WR_STA_DONE_R {
230    #[inline(always)]
231    pub(crate) fn new(bits: bool) -> Self {
232        SLV_WR_STA_DONE_R(crate::FieldReader::new(bits))
233    }
234}
235impl core::ops::Deref for SLV_WR_STA_DONE_R {
236    type Target = crate::FieldReader<bool, bool>;
237    #[inline(always)]
238    fn deref(&self) -> &Self::Target {
239        &self.0
240    }
241}
242#[doc = "Field `slv_wr_sta_done` writer - The interrupt raw bit for the completement of \"write-status\" operation in the slave mode."]
243pub struct SLV_WR_STA_DONE_W<'a> {
244    w: &'a mut W,
245}
246impl<'a> SLV_WR_STA_DONE_W<'a> {
247    #[doc = r"Sets the field bit"]
248    #[inline(always)]
249    pub fn set_bit(self) -> &'a mut W {
250        self.bit(true)
251    }
252    #[doc = r"Clears the field bit"]
253    #[inline(always)]
254    pub fn clear_bit(self) -> &'a mut W {
255        self.bit(false)
256    }
257    #[doc = r"Writes raw bits to the field"]
258    #[inline(always)]
259    pub fn bit(self, value: bool) -> &'a mut W {
260        self.w.bits = (self.w.bits & !(1 << 3)) | ((value as u32 & 1) << 3);
261        self.w
262    }
263}
264#[doc = "Field `slv_rd_sta_done` reader - The interrupt raw bit for the completement of \"read-status\" operation in the slave mode."]
265pub struct SLV_RD_STA_DONE_R(crate::FieldReader<bool, bool>);
266impl SLV_RD_STA_DONE_R {
267    #[inline(always)]
268    pub(crate) fn new(bits: bool) -> Self {
269        SLV_RD_STA_DONE_R(crate::FieldReader::new(bits))
270    }
271}
272impl core::ops::Deref for SLV_RD_STA_DONE_R {
273    type Target = crate::FieldReader<bool, bool>;
274    #[inline(always)]
275    fn deref(&self) -> &Self::Target {
276        &self.0
277    }
278}
279#[doc = "Field `slv_rd_sta_done` writer - The interrupt raw bit for the completement of \"read-status\" operation in the slave mode."]
280pub struct SLV_RD_STA_DONE_W<'a> {
281    w: &'a mut W,
282}
283impl<'a> SLV_RD_STA_DONE_W<'a> {
284    #[doc = r"Sets the field bit"]
285    #[inline(always)]
286    pub fn set_bit(self) -> &'a mut W {
287        self.bit(true)
288    }
289    #[doc = r"Clears the field bit"]
290    #[inline(always)]
291    pub fn clear_bit(self) -> &'a mut W {
292        self.bit(false)
293    }
294    #[doc = r"Writes raw bits to the field"]
295    #[inline(always)]
296    pub fn bit(self, value: bool) -> &'a mut W {
297        self.w.bits = (self.w.bits & !(1 << 2)) | ((value as u32 & 1) << 2);
298        self.w
299    }
300}
301#[doc = "Field `slv_wr_buf_done` reader - The interrupt raw bit for the completement of \"write-buffer\" operation in the slave mode."]
302pub struct SLV_WR_BUF_DONE_R(crate::FieldReader<bool, bool>);
303impl SLV_WR_BUF_DONE_R {
304    #[inline(always)]
305    pub(crate) fn new(bits: bool) -> Self {
306        SLV_WR_BUF_DONE_R(crate::FieldReader::new(bits))
307    }
308}
309impl core::ops::Deref for SLV_WR_BUF_DONE_R {
310    type Target = crate::FieldReader<bool, bool>;
311    #[inline(always)]
312    fn deref(&self) -> &Self::Target {
313        &self.0
314    }
315}
316#[doc = "Field `slv_wr_buf_done` writer - The interrupt raw bit for the completement of \"write-buffer\" operation in the slave mode."]
317pub struct SLV_WR_BUF_DONE_W<'a> {
318    w: &'a mut W,
319}
320impl<'a> SLV_WR_BUF_DONE_W<'a> {
321    #[doc = r"Sets the field bit"]
322    #[inline(always)]
323    pub fn set_bit(self) -> &'a mut W {
324        self.bit(true)
325    }
326    #[doc = r"Clears the field bit"]
327    #[inline(always)]
328    pub fn clear_bit(self) -> &'a mut W {
329        self.bit(false)
330    }
331    #[doc = r"Writes raw bits to the field"]
332    #[inline(always)]
333    pub fn bit(self, value: bool) -> &'a mut W {
334        self.w.bits = (self.w.bits & !(1 << 1)) | ((value as u32 & 1) << 1);
335        self.w
336    }
337}
338#[doc = "Field `slv_rd_buf_done` reader - The interrupt raw bit for the completement of \"read-buffer\" operation in the slave mode."]
339pub struct SLV_RD_BUF_DONE_R(crate::FieldReader<bool, bool>);
340impl SLV_RD_BUF_DONE_R {
341    #[inline(always)]
342    pub(crate) fn new(bits: bool) -> Self {
343        SLV_RD_BUF_DONE_R(crate::FieldReader::new(bits))
344    }
345}
346impl core::ops::Deref for SLV_RD_BUF_DONE_R {
347    type Target = crate::FieldReader<bool, bool>;
348    #[inline(always)]
349    fn deref(&self) -> &Self::Target {
350        &self.0
351    }
352}
353#[doc = "Field `slv_rd_buf_done` writer - The interrupt raw bit for the completement of \"read-buffer\" operation in the slave mode."]
354pub struct SLV_RD_BUF_DONE_W<'a> {
355    w: &'a mut W,
356}
357impl<'a> SLV_RD_BUF_DONE_W<'a> {
358    #[doc = r"Sets the field bit"]
359    #[inline(always)]
360    pub fn set_bit(self) -> &'a mut W {
361        self.bit(true)
362    }
363    #[doc = r"Clears the field bit"]
364    #[inline(always)]
365    pub fn clear_bit(self) -> &'a mut W {
366        self.bit(false)
367    }
368    #[doc = r"Writes raw bits to the field"]
369    #[inline(always)]
370    pub fn bit(self, value: bool) -> &'a mut W {
371        self.w.bits = (self.w.bits & !1) | (value as u32 & 1);
372        self.w
373    }
374}
375#[doc = "Field `spi_buffer_enable` reader - Enable read/write buffer"]
376pub struct SPI_BUFFER_ENABLE_R(crate::FieldReader<bool, bool>);
377impl SPI_BUFFER_ENABLE_R {
378    #[inline(always)]
379    pub(crate) fn new(bits: bool) -> Self {
380        SPI_BUFFER_ENABLE_R(crate::FieldReader::new(bits))
381    }
382}
383impl core::ops::Deref for SPI_BUFFER_ENABLE_R {
384    type Target = crate::FieldReader<bool, bool>;
385    #[inline(always)]
386    fn deref(&self) -> &Self::Target {
387        &self.0
388    }
389}
390#[doc = "Field `spi_buffer_enable` writer - Enable read/write buffer"]
391pub struct SPI_BUFFER_ENABLE_W<'a> {
392    w: &'a mut W,
393}
394impl<'a> SPI_BUFFER_ENABLE_W<'a> {
395    #[doc = r"Sets the field bit"]
396    #[inline(always)]
397    pub fn set_bit(self) -> &'a mut W {
398        self.bit(true)
399    }
400    #[doc = r"Clears the field bit"]
401    #[inline(always)]
402    pub fn clear_bit(self) -> &'a mut W {
403        self.bit(false)
404    }
405    #[doc = r"Writes raw bits to the field"]
406    #[inline(always)]
407    pub fn bit(self, value: bool) -> &'a mut W {
408        self.w.bits = (self.w.bits & !(1 << 29)) | ((value as u32 & 1) << 29);
409        self.w
410    }
411}
412#[doc = "Field `sta_enable` reader - Enable read/write buffer"]
413pub struct STA_ENABLE_R(crate::FieldReader<bool, bool>);
414impl STA_ENABLE_R {
415    #[inline(always)]
416    pub(crate) fn new(bits: bool) -> Self {
417        STA_ENABLE_R(crate::FieldReader::new(bits))
418    }
419}
420impl core::ops::Deref for STA_ENABLE_R {
421    type Target = crate::FieldReader<bool, bool>;
422    #[inline(always)]
423    fn deref(&self) -> &Self::Target {
424        &self.0
425    }
426}
427#[doc = "Field `sta_enable` writer - Enable read/write buffer"]
428pub struct STA_ENABLE_W<'a> {
429    w: &'a mut W,
430}
431impl<'a> STA_ENABLE_W<'a> {
432    #[doc = r"Sets the field bit"]
433    #[inline(always)]
434    pub fn set_bit(self) -> &'a mut W {
435        self.bit(true)
436    }
437    #[doc = r"Clears the field bit"]
438    #[inline(always)]
439    pub fn clear_bit(self) -> &'a mut W {
440        self.bit(false)
441    }
442    #[doc = r"Writes raw bits to the field"]
443    #[inline(always)]
444    pub fn bit(self, value: bool) -> &'a mut W {
445        self.w.bits = (self.w.bits & !(1 << 28)) | ((value as u32 & 1) << 28);
446        self.w
447    }
448}
449#[doc = "Field `interrupt_trans_enable` reader - Enable TRANS interrupts"]
450pub struct INTERRUPT_TRANS_ENABLE_R(crate::FieldReader<bool, bool>);
451impl INTERRUPT_TRANS_ENABLE_R {
452    #[inline(always)]
453    pub(crate) fn new(bits: bool) -> Self {
454        INTERRUPT_TRANS_ENABLE_R(crate::FieldReader::new(bits))
455    }
456}
457impl core::ops::Deref for INTERRUPT_TRANS_ENABLE_R {
458    type Target = crate::FieldReader<bool, bool>;
459    #[inline(always)]
460    fn deref(&self) -> &Self::Target {
461        &self.0
462    }
463}
464#[doc = "Field `interrupt_trans_enable` writer - Enable TRANS interrupts"]
465pub struct INTERRUPT_TRANS_ENABLE_W<'a> {
466    w: &'a mut W,
467}
468impl<'a> INTERRUPT_TRANS_ENABLE_W<'a> {
469    #[doc = r"Sets the field bit"]
470    #[inline(always)]
471    pub fn set_bit(self) -> &'a mut W {
472        self.bit(true)
473    }
474    #[doc = r"Clears the field bit"]
475    #[inline(always)]
476    pub fn clear_bit(self) -> &'a mut W {
477        self.bit(false)
478    }
479    #[doc = r"Writes raw bits to the field"]
480    #[inline(always)]
481    pub fn bit(self, value: bool) -> &'a mut W {
482        self.w.bits = (self.w.bits & !(1 << 9)) | ((value as u32 & 1) << 9);
483        self.w
484    }
485}
486#[doc = "Field `interrupt_ws_enable` reader - Enable status write interrupts"]
487pub struct INTERRUPT_WS_ENABLE_R(crate::FieldReader<bool, bool>);
488impl INTERRUPT_WS_ENABLE_R {
489    #[inline(always)]
490    pub(crate) fn new(bits: bool) -> Self {
491        INTERRUPT_WS_ENABLE_R(crate::FieldReader::new(bits))
492    }
493}
494impl core::ops::Deref for INTERRUPT_WS_ENABLE_R {
495    type Target = crate::FieldReader<bool, bool>;
496    #[inline(always)]
497    fn deref(&self) -> &Self::Target {
498        &self.0
499    }
500}
501#[doc = "Field `interrupt_ws_enable` writer - Enable status write interrupts"]
502pub struct INTERRUPT_WS_ENABLE_W<'a> {
503    w: &'a mut W,
504}
505impl<'a> INTERRUPT_WS_ENABLE_W<'a> {
506    #[doc = r"Sets the field bit"]
507    #[inline(always)]
508    pub fn set_bit(self) -> &'a mut W {
509        self.bit(true)
510    }
511    #[doc = r"Clears the field bit"]
512    #[inline(always)]
513    pub fn clear_bit(self) -> &'a mut W {
514        self.bit(false)
515    }
516    #[doc = r"Writes raw bits to the field"]
517    #[inline(always)]
518    pub fn bit(self, value: bool) -> &'a mut W {
519        self.w.bits = (self.w.bits & !(1 << 8)) | ((value as u32 & 1) << 8);
520        self.w
521    }
522}
523#[doc = "Field `interrupt_rs_enable` reader - Enable status read interrupts"]
524pub struct INTERRUPT_RS_ENABLE_R(crate::FieldReader<bool, bool>);
525impl INTERRUPT_RS_ENABLE_R {
526    #[inline(always)]
527    pub(crate) fn new(bits: bool) -> Self {
528        INTERRUPT_RS_ENABLE_R(crate::FieldReader::new(bits))
529    }
530}
531impl core::ops::Deref for INTERRUPT_RS_ENABLE_R {
532    type Target = crate::FieldReader<bool, bool>;
533    #[inline(always)]
534    fn deref(&self) -> &Self::Target {
535        &self.0
536    }
537}
538#[doc = "Field `interrupt_rs_enable` writer - Enable status read interrupts"]
539pub struct INTERRUPT_RS_ENABLE_W<'a> {
540    w: &'a mut W,
541}
542impl<'a> INTERRUPT_RS_ENABLE_W<'a> {
543    #[doc = r"Sets the field bit"]
544    #[inline(always)]
545    pub fn set_bit(self) -> &'a mut W {
546        self.bit(true)
547    }
548    #[doc = r"Clears the field bit"]
549    #[inline(always)]
550    pub fn clear_bit(self) -> &'a mut W {
551        self.bit(false)
552    }
553    #[doc = r"Writes raw bits to the field"]
554    #[inline(always)]
555    pub fn bit(self, value: bool) -> &'a mut W {
556        self.w.bits = (self.w.bits & !(1 << 7)) | ((value as u32 & 1) << 7);
557        self.w
558    }
559}
560#[doc = "Field `interrupt_wb_enable` reader - Enable buffer write interrupts"]
561pub struct INTERRUPT_WB_ENABLE_R(crate::FieldReader<bool, bool>);
562impl INTERRUPT_WB_ENABLE_R {
563    #[inline(always)]
564    pub(crate) fn new(bits: bool) -> Self {
565        INTERRUPT_WB_ENABLE_R(crate::FieldReader::new(bits))
566    }
567}
568impl core::ops::Deref for INTERRUPT_WB_ENABLE_R {
569    type Target = crate::FieldReader<bool, bool>;
570    #[inline(always)]
571    fn deref(&self) -> &Self::Target {
572        &self.0
573    }
574}
575#[doc = "Field `interrupt_wb_enable` writer - Enable buffer write interrupts"]
576pub struct INTERRUPT_WB_ENABLE_W<'a> {
577    w: &'a mut W,
578}
579impl<'a> INTERRUPT_WB_ENABLE_W<'a> {
580    #[doc = r"Sets the field bit"]
581    #[inline(always)]
582    pub fn set_bit(self) -> &'a mut W {
583        self.bit(true)
584    }
585    #[doc = r"Clears the field bit"]
586    #[inline(always)]
587    pub fn clear_bit(self) -> &'a mut W {
588        self.bit(false)
589    }
590    #[doc = r"Writes raw bits to the field"]
591    #[inline(always)]
592    pub fn bit(self, value: bool) -> &'a mut W {
593        self.w.bits = (self.w.bits & !(1 << 6)) | ((value as u32 & 1) << 6);
594        self.w
595    }
596}
597#[doc = "Field `interrupt_rb_enable` reader - Enable buffer read interrupts"]
598pub struct INTERRUPT_RB_ENABLE_R(crate::FieldReader<bool, bool>);
599impl INTERRUPT_RB_ENABLE_R {
600    #[inline(always)]
601    pub(crate) fn new(bits: bool) -> Self {
602        INTERRUPT_RB_ENABLE_R(crate::FieldReader::new(bits))
603    }
604}
605impl core::ops::Deref for INTERRUPT_RB_ENABLE_R {
606    type Target = crate::FieldReader<bool, bool>;
607    #[inline(always)]
608    fn deref(&self) -> &Self::Target {
609        &self.0
610    }
611}
612#[doc = "Field `interrupt_rb_enable` writer - Enable buffer read interrupts"]
613pub struct INTERRUPT_RB_ENABLE_W<'a> {
614    w: &'a mut W,
615}
616impl<'a> INTERRUPT_RB_ENABLE_W<'a> {
617    #[doc = r"Sets the field bit"]
618    #[inline(always)]
619    pub fn set_bit(self) -> &'a mut W {
620        self.bit(true)
621    }
622    #[doc = r"Clears the field bit"]
623    #[inline(always)]
624    pub fn clear_bit(self) -> &'a mut W {
625        self.bit(false)
626    }
627    #[doc = r"Writes raw bits to the field"]
628    #[inline(always)]
629    pub fn bit(self, value: bool) -> &'a mut W {
630        self.w.bits = (self.w.bits & !(1 << 5)) | ((value as u32 & 1) << 5);
631        self.w
632    }
633}
634impl R {
635    #[doc = "Bit 31 - It is the synchronous reset signal of the module. This bit is self-cleared by hardware."]
636    #[inline(always)]
637    pub fn spi_sync_reset(&self) -> SPI_SYNC_RESET_R {
638        SPI_SYNC_RESET_R::new(((self.bits >> 31) & 1) != 0)
639    }
640    #[doc = "Bit 30 - 1: slave mode, 0: master mode."]
641    #[inline(always)]
642    pub fn spi_slave_mode(&self) -> SPI_SLAVE_MODE_R {
643        SPI_SLAVE_MODE_R::new(((self.bits >> 30) & 1) != 0)
644    }
645    #[doc = "Bit 27 - 1: slave mode commands are defined in SPI_SLAVE3. 0: slave mode commands are fixed as 1: \"write-status\"; 4: \"read-status\"; 2: \"write-buffer\" and 3: \"read-buffer\"."]
646    #[inline(always)]
647    pub fn slv_cmd_define(&self) -> SLV_CMD_DEFINE_R {
648        SLV_CMD_DEFINE_R::new(((self.bits >> 27) & 1) != 0)
649    }
650    #[doc = "Bits 23:26 - The operations counter in both the master mode and the slave mode."]
651    #[inline(always)]
652    pub fn spi_trans_cnt(&self) -> SPI_TRANS_CNT_R {
653        SPI_TRANS_CNT_R::new(((self.bits >> 23) & 0x0f) as u8)
654    }
655    #[doc = "Bits 5:9 - Interrupt enable bits for the below 5 sources"]
656    #[inline(always)]
657    pub fn spi_int_en(&self) -> SPI_INT_EN_R {
658        SPI_INT_EN_R::new(((self.bits >> 5) & 0x1f) as u8)
659    }
660    #[doc = "Bit 4 - The interrupt raw bit for the completement of any operation in both the master mode and the slave mode."]
661    #[inline(always)]
662    pub fn spi_trans_done(&self) -> SPI_TRANS_DONE_R {
663        SPI_TRANS_DONE_R::new(((self.bits >> 4) & 1) != 0)
664    }
665    #[doc = "Bit 3 - The interrupt raw bit for the completement of \"write-status\" operation in the slave mode."]
666    #[inline(always)]
667    pub fn slv_wr_sta_done(&self) -> SLV_WR_STA_DONE_R {
668        SLV_WR_STA_DONE_R::new(((self.bits >> 3) & 1) != 0)
669    }
670    #[doc = "Bit 2 - The interrupt raw bit for the completement of \"read-status\" operation in the slave mode."]
671    #[inline(always)]
672    pub fn slv_rd_sta_done(&self) -> SLV_RD_STA_DONE_R {
673        SLV_RD_STA_DONE_R::new(((self.bits >> 2) & 1) != 0)
674    }
675    #[doc = "Bit 1 - The interrupt raw bit for the completement of \"write-buffer\" operation in the slave mode."]
676    #[inline(always)]
677    pub fn slv_wr_buf_done(&self) -> SLV_WR_BUF_DONE_R {
678        SLV_WR_BUF_DONE_R::new(((self.bits >> 1) & 1) != 0)
679    }
680    #[doc = "Bit 0 - The interrupt raw bit for the completement of \"read-buffer\" operation in the slave mode."]
681    #[inline(always)]
682    pub fn slv_rd_buf_done(&self) -> SLV_RD_BUF_DONE_R {
683        SLV_RD_BUF_DONE_R::new((self.bits & 1) != 0)
684    }
685    #[doc = "Bit 29 - Enable read/write buffer"]
686    #[inline(always)]
687    pub fn spi_buffer_enable(&self) -> SPI_BUFFER_ENABLE_R {
688        SPI_BUFFER_ENABLE_R::new(((self.bits >> 29) & 1) != 0)
689    }
690    #[doc = "Bit 28 - Enable read/write buffer"]
691    #[inline(always)]
692    pub fn sta_enable(&self) -> STA_ENABLE_R {
693        STA_ENABLE_R::new(((self.bits >> 28) & 1) != 0)
694    }
695    #[doc = "Bit 9 - Enable TRANS interrupts"]
696    #[inline(always)]
697    pub fn interrupt_trans_enable(&self) -> INTERRUPT_TRANS_ENABLE_R {
698        INTERRUPT_TRANS_ENABLE_R::new(((self.bits >> 9) & 1) != 0)
699    }
700    #[doc = "Bit 8 - Enable status write interrupts"]
701    #[inline(always)]
702    pub fn interrupt_ws_enable(&self) -> INTERRUPT_WS_ENABLE_R {
703        INTERRUPT_WS_ENABLE_R::new(((self.bits >> 8) & 1) != 0)
704    }
705    #[doc = "Bit 7 - Enable status read interrupts"]
706    #[inline(always)]
707    pub fn interrupt_rs_enable(&self) -> INTERRUPT_RS_ENABLE_R {
708        INTERRUPT_RS_ENABLE_R::new(((self.bits >> 7) & 1) != 0)
709    }
710    #[doc = "Bit 6 - Enable buffer write interrupts"]
711    #[inline(always)]
712    pub fn interrupt_wb_enable(&self) -> INTERRUPT_WB_ENABLE_R {
713        INTERRUPT_WB_ENABLE_R::new(((self.bits >> 6) & 1) != 0)
714    }
715    #[doc = "Bit 5 - Enable buffer read interrupts"]
716    #[inline(always)]
717    pub fn interrupt_rb_enable(&self) -> INTERRUPT_RB_ENABLE_R {
718        INTERRUPT_RB_ENABLE_R::new(((self.bits >> 5) & 1) != 0)
719    }
720}
721impl W {
722    #[doc = "Bit 31 - It is the synchronous reset signal of the module. This bit is self-cleared by hardware."]
723    #[inline(always)]
724    pub fn spi_sync_reset(&mut self) -> SPI_SYNC_RESET_W {
725        SPI_SYNC_RESET_W { w: self }
726    }
727    #[doc = "Bit 30 - 1: slave mode, 0: master mode."]
728    #[inline(always)]
729    pub fn spi_slave_mode(&mut self) -> SPI_SLAVE_MODE_W {
730        SPI_SLAVE_MODE_W { w: self }
731    }
732    #[doc = "Bit 27 - 1: slave mode commands are defined in SPI_SLAVE3. 0: slave mode commands are fixed as 1: \"write-status\"; 4: \"read-status\"; 2: \"write-buffer\" and 3: \"read-buffer\"."]
733    #[inline(always)]
734    pub fn slv_cmd_define(&mut self) -> SLV_CMD_DEFINE_W {
735        SLV_CMD_DEFINE_W { w: self }
736    }
737    #[doc = "Bits 5:9 - Interrupt enable bits for the below 5 sources"]
738    #[inline(always)]
739    pub fn spi_int_en(&mut self) -> SPI_INT_EN_W {
740        SPI_INT_EN_W { w: self }
741    }
742    #[doc = "Bit 4 - The interrupt raw bit for the completement of any operation in both the master mode and the slave mode."]
743    #[inline(always)]
744    pub fn spi_trans_done(&mut self) -> SPI_TRANS_DONE_W {
745        SPI_TRANS_DONE_W { w: self }
746    }
747    #[doc = "Bit 3 - The interrupt raw bit for the completement of \"write-status\" operation in the slave mode."]
748    #[inline(always)]
749    pub fn slv_wr_sta_done(&mut self) -> SLV_WR_STA_DONE_W {
750        SLV_WR_STA_DONE_W { w: self }
751    }
752    #[doc = "Bit 2 - The interrupt raw bit for the completement of \"read-status\" operation in the slave mode."]
753    #[inline(always)]
754    pub fn slv_rd_sta_done(&mut self) -> SLV_RD_STA_DONE_W {
755        SLV_RD_STA_DONE_W { w: self }
756    }
757    #[doc = "Bit 1 - The interrupt raw bit for the completement of \"write-buffer\" operation in the slave mode."]
758    #[inline(always)]
759    pub fn slv_wr_buf_done(&mut self) -> SLV_WR_BUF_DONE_W {
760        SLV_WR_BUF_DONE_W { w: self }
761    }
762    #[doc = "Bit 0 - The interrupt raw bit for the completement of \"read-buffer\" operation in the slave mode."]
763    #[inline(always)]
764    pub fn slv_rd_buf_done(&mut self) -> SLV_RD_BUF_DONE_W {
765        SLV_RD_BUF_DONE_W { w: self }
766    }
767    #[doc = "Bit 29 - Enable read/write buffer"]
768    #[inline(always)]
769    pub fn spi_buffer_enable(&mut self) -> SPI_BUFFER_ENABLE_W {
770        SPI_BUFFER_ENABLE_W { w: self }
771    }
772    #[doc = "Bit 28 - Enable read/write buffer"]
773    #[inline(always)]
774    pub fn sta_enable(&mut self) -> STA_ENABLE_W {
775        STA_ENABLE_W { w: self }
776    }
777    #[doc = "Bit 9 - Enable TRANS interrupts"]
778    #[inline(always)]
779    pub fn interrupt_trans_enable(&mut self) -> INTERRUPT_TRANS_ENABLE_W {
780        INTERRUPT_TRANS_ENABLE_W { w: self }
781    }
782    #[doc = "Bit 8 - Enable status write interrupts"]
783    #[inline(always)]
784    pub fn interrupt_ws_enable(&mut self) -> INTERRUPT_WS_ENABLE_W {
785        INTERRUPT_WS_ENABLE_W { w: self }
786    }
787    #[doc = "Bit 7 - Enable status read interrupts"]
788    #[inline(always)]
789    pub fn interrupt_rs_enable(&mut self) -> INTERRUPT_RS_ENABLE_W {
790        INTERRUPT_RS_ENABLE_W { w: self }
791    }
792    #[doc = "Bit 6 - Enable buffer write interrupts"]
793    #[inline(always)]
794    pub fn interrupt_wb_enable(&mut self) -> INTERRUPT_WB_ENABLE_W {
795        INTERRUPT_WB_ENABLE_W { w: self }
796    }
797    #[doc = "Bit 5 - Enable buffer read interrupts"]
798    #[inline(always)]
799    pub fn interrupt_rb_enable(&mut self) -> INTERRUPT_RB_ENABLE_W {
800        INTERRUPT_RB_ENABLE_W { w: self }
801    }
802    #[doc = "Writes raw bits to the register."]
803    #[inline(always)]
804    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
805        self.0.bits(bits);
806        self
807    }
808}
809#[doc = "It is the synchronous reset signal of the module. This bit is self-cleared by hardware.\n\nThis register you can [`read`]
810(crate::generic::Reg::read), [`write_with_zero`]
811(crate::generic::Reg::write_with_zero), [`reset`]
812(crate::generic::Reg::reset), [`write`]
813(crate::generic::Reg::write), [`modify`]
814(crate::generic::Reg::modify). See [API]
815(https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [spi_slave]
816(index.html) module"]
817pub struct SPI_SLAVE_SPEC;
818impl crate::RegisterSpec for SPI_SLAVE_SPEC {
819    type Ux = u32;
820}
821#[doc = "`read()` method returns [spi_slave::R]
822(R) reader structure"]
823impl crate::Readable for SPI_SLAVE_SPEC {
824    type Reader = R;
825}
826#[doc = "`write(|w| ..)` method takes [spi_slave::W]
827(W) writer structure"]
828impl crate::Writable for SPI_SLAVE_SPEC {
829    type Writer = W;
830}
831#[doc = "`reset()` method sets SPI_SLAVE to value 0"]
832impl crate::Resettable for SPI_SLAVE_SPEC {
833    #[inline(always)]
834    fn reset_value() -> Self::Ux {
835        0
836    }
837}
esp8266/spi1/spi_slave.rs

esp8266/spi1/
spi_slave.rs
