esp8266/uart0/
uart_clkdiv.rs

1#[doc = "Register `UART_CLKDIV` reader"]
2pub struct R(crate::R<UART_CLKDIV_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<UART_CLKDIV_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<UART_CLKDIV_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<UART_CLKDIV_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `UART_CLKDIV` writer"]
17pub struct W(crate::W<UART_CLKDIV_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<UART_CLKDIV_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<UART_CLKDIV_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<UART_CLKDIV_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `uart_clkdiv` reader - BAUDRATE = UART_CLK_FREQ / UART_CLKDIV"]
38pub struct UART_CLKDIV_R(crate::FieldReader<u32, u32>);
39impl UART_CLKDIV_R {
40    #[inline(always)]
41    pub(crate) fn new(bits: u32) -> Self {
42        UART_CLKDIV_R(crate::FieldReader::new(bits))
43    }
44}
45impl core::ops::Deref for UART_CLKDIV_R {
46    type Target = crate::FieldReader<u32, u32>;
47    #[inline(always)]
48    fn deref(&self) -> &Self::Target {
49        &self.0
50    }
51}
52#[doc = "Field `uart_clkdiv` writer - BAUDRATE = UART_CLK_FREQ / UART_CLKDIV"]
53pub struct UART_CLKDIV_W<'a> {
54    w: &'a mut W,
55}
56impl<'a> UART_CLKDIV_W<'a> {
57    #[doc = r"Writes raw bits to the field"]
58    #[inline(always)]
59    pub unsafe fn bits(self, value: u32) -> &'a mut W {
60        self.w.bits = (self.w.bits & !0x000f_ffff) | (value as u32 & 0x000f_ffff);
61        self.w
62    }
63}
64impl R {
65    #[doc = "Bits 0:19 - BAUDRATE = UART_CLK_FREQ / UART_CLKDIV"]
66    #[inline(always)]
67    pub fn uart_clkdiv(&self) -> UART_CLKDIV_R {
68        UART_CLKDIV_R::new((self.bits & 0x000f_ffff) as u32)
69    }
70}
71impl W {
72    #[doc = "Bits 0:19 - BAUDRATE = UART_CLK_FREQ / UART_CLKDIV"]
73    #[inline(always)]
74    pub fn uart_clkdiv(&mut self) -> UART_CLKDIV_W {
75        UART_CLKDIV_W { w: self }
76    }
77    #[doc = "Writes raw bits to the register."]
78    #[inline(always)]
79    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
80        self.0.bits(bits);
81        self
82    }
83}
84#[doc = "UART CLK DIV REGISTER\n\nThis register you can [`read`]
85(crate::generic::Reg::read), [`write_with_zero`]
86(crate::generic::Reg::write_with_zero), [`reset`]
87(crate::generic::Reg::reset), [`write`]
88(crate::generic::Reg::write), [`modify`]
89(crate::generic::Reg::modify). See [API]
90(https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [uart_clkdiv]
91(index.html) module"]
92pub struct UART_CLKDIV_SPEC;
93impl crate::RegisterSpec for UART_CLKDIV_SPEC {
94    type Ux = u32;
95}
96#[doc = "`read()` method returns [uart_clkdiv::R]
97(R) reader structure"]
98impl crate::Readable for UART_CLKDIV_SPEC {
99    type Reader = R;
100}
101#[doc = "`write(|w| ..)` method takes [uart_clkdiv::W]
102(W) writer structure"]
103impl crate::Writable for UART_CLKDIV_SPEC {
104    type Writer = W;
105}
106#[doc = "`reset()` method sets UART_CLKDIV to value 0"]
107impl crate::Resettable for UART_CLKDIV_SPEC {
108    #[inline(always)]
109    fn reset_value() -> Self::Ux {
110        0
111    }
112}
esp8266/uart0/uart_clkdiv.rs

esp8266/uart0/
uart_clkdiv.rs
