esp8266/timer/
frc1_int.rs

1#[doc = "Register `FRC1_INT` reader"]
2pub struct R(crate::R<FRC1_INT_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<FRC1_INT_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<FRC1_INT_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<FRC1_INT_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `FRC1_INT` writer"]
17pub struct W(crate::W<FRC1_INT_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<FRC1_INT_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<FRC1_INT_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<FRC1_INT_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `frc1_int_clr_mask` reader - write to clear the status of the interrupt, if theinterrupt type is \"level\""]
38pub struct FRC1_INT_CLR_MASK_R(crate::FieldReader<bool, bool>);
39impl FRC1_INT_CLR_MASK_R {
40    #[inline(always)]
41    pub(crate) fn new(bits: bool) -> Self {
42        FRC1_INT_CLR_MASK_R(crate::FieldReader::new(bits))
43    }
44}
45impl core::ops::Deref for FRC1_INT_CLR_MASK_R {
46    type Target = crate::FieldReader<bool, bool>;
47    #[inline(always)]
48    fn deref(&self) -> &Self::Target {
49        &self.0
50    }
51}
52#[doc = "Field `frc1_int_clr_mask` writer - write to clear the status of the interrupt, if theinterrupt type is \"level\""]
53pub struct FRC1_INT_CLR_MASK_W<'a> {
54    w: &'a mut W,
55}
56impl<'a> FRC1_INT_CLR_MASK_W<'a> {
57    #[doc = r"Sets the field bit"]
58    #[inline(always)]
59    pub fn set_bit(self) -> &'a mut W {
60        self.bit(true)
61    }
62    #[doc = r"Clears the field bit"]
63    #[inline(always)]
64    pub fn clear_bit(self) -> &'a mut W {
65        self.bit(false)
66    }
67    #[doc = r"Writes raw bits to the field"]
68    #[inline(always)]
69    pub fn bit(self, value: bool) -> &'a mut W {
70        self.w.bits = (self.w.bits & !1) | (value as u32 & 1);
71        self.w
72    }
73}
74impl R {
75    #[doc = "Bit 0 - write to clear the status of the interrupt, if theinterrupt type is \"level\""]
76    #[inline(always)]
77    pub fn frc1_int_clr_mask(&self) -> FRC1_INT_CLR_MASK_R {
78        FRC1_INT_CLR_MASK_R::new((self.bits & 1) != 0)
79    }
80}
81impl W {
82    #[doc = "Bit 0 - write to clear the status of the interrupt, if theinterrupt type is \"level\""]
83    #[inline(always)]
84    pub fn frc1_int_clr_mask(&mut self) -> FRC1_INT_CLR_MASK_W {
85        FRC1_INT_CLR_MASK_W { w: self }
86    }
87    #[doc = "Writes raw bits to the register."]
88    #[inline(always)]
89    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
90        self.0.bits(bits);
91        self
92    }
93}
94#[doc = "FRC1_INT\n\nThis register you can [`read`]
95(crate::generic::Reg::read), [`write_with_zero`]
96(crate::generic::Reg::write_with_zero), [`reset`]
97(crate::generic::Reg::reset), [`write`]
98(crate::generic::Reg::write), [`modify`]
99(crate::generic::Reg::modify). See [API]
100(https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [frc1_int]
101(index.html) module"]
102pub struct FRC1_INT_SPEC;
103impl crate::RegisterSpec for FRC1_INT_SPEC {
104    type Ux = u32;
105}
106#[doc = "`read()` method returns [frc1_int::R]
107(R) reader structure"]
108impl crate::Readable for FRC1_INT_SPEC {
109    type Reader = R;
110}
111#[doc = "`write(|w| ..)` method takes [frc1_int::W]
112(W) writer structure"]
113impl crate::Writable for FRC1_INT_SPEC {
114    type Writer = W;
115}
116#[doc = "`reset()` method sets FRC1_INT to value 0"]
117impl crate::Resettable for FRC1_INT_SPEC {
118    #[inline(always)]
119    fn reset_value() -> Self::Ux {
120        0
121    }
122}
esp8266/timer/frc1_int.rs

esp8266/timer/
frc1_int.rs
