esp8266/spi0/
spi_user.rs

1#[doc = "Register `SPI_USER` reader"]
2pub struct R(crate::R<SPI_USER_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<SPI_USER_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<SPI_USER_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<SPI_USER_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `SPI_USER` writer"]
17pub struct W(crate::W<SPI_USER_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<SPI_USER_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<SPI_USER_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<SPI_USER_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `spi_usr_command` reader - This bit enable the \"command\" phase of an operation."]
38pub struct SPI_USR_COMMAND_R(crate::FieldReader<bool, bool>);
39impl SPI_USR_COMMAND_R {
40    #[inline(always)]
41    pub(crate) fn new(bits: bool) -> Self {
42        SPI_USR_COMMAND_R(crate::FieldReader::new(bits))
43    }
44}
45impl core::ops::Deref for SPI_USR_COMMAND_R {
46    type Target = crate::FieldReader<bool, bool>;
47    #[inline(always)]
48    fn deref(&self) -> &Self::Target {
49        &self.0
50    }
51}
52#[doc = "Field `spi_usr_command` writer - This bit enable the \"command\" phase of an operation."]
53pub struct SPI_USR_COMMAND_W<'a> {
54    w: &'a mut W,
55}
56impl<'a> SPI_USR_COMMAND_W<'a> {
57    #[doc = r"Sets the field bit"]
58    #[inline(always)]
59    pub fn set_bit(self) -> &'a mut W {
60        self.bit(true)
61    }
62    #[doc = r"Clears the field bit"]
63    #[inline(always)]
64    pub fn clear_bit(self) -> &'a mut W {
65        self.bit(false)
66    }
67    #[doc = r"Writes raw bits to the field"]
68    #[inline(always)]
69    pub fn bit(self, value: bool) -> &'a mut W {
70        self.w.bits = (self.w.bits & !(1 << 31)) | ((value as u32 & 1) << 31);
71        self.w
72    }
73}
74#[doc = "Field `spi_usr_addr` reader - This bit enable the \"address\" phase of an operation."]
75pub struct SPI_USR_ADDR_R(crate::FieldReader<bool, bool>);
76impl SPI_USR_ADDR_R {
77    #[inline(always)]
78    pub(crate) fn new(bits: bool) -> Self {
79        SPI_USR_ADDR_R(crate::FieldReader::new(bits))
80    }
81}
82impl core::ops::Deref for SPI_USR_ADDR_R {
83    type Target = crate::FieldReader<bool, bool>;
84    #[inline(always)]
85    fn deref(&self) -> &Self::Target {
86        &self.0
87    }
88}
89#[doc = "Field `spi_usr_addr` writer - This bit enable the \"address\" phase of an operation."]
90pub struct SPI_USR_ADDR_W<'a> {
91    w: &'a mut W,
92}
93impl<'a> SPI_USR_ADDR_W<'a> {
94    #[doc = r"Sets the field bit"]
95    #[inline(always)]
96    pub fn set_bit(self) -> &'a mut W {
97        self.bit(true)
98    }
99    #[doc = r"Clears the field bit"]
100    #[inline(always)]
101    pub fn clear_bit(self) -> &'a mut W {
102        self.bit(false)
103    }
104    #[doc = r"Writes raw bits to the field"]
105    #[inline(always)]
106    pub fn bit(self, value: bool) -> &'a mut W {
107        self.w.bits = (self.w.bits & !(1 << 30)) | ((value as u32 & 1) << 30);
108        self.w
109    }
110}
111#[doc = "Field `spi_usr_dummy` reader - This bit enable the \"dummy\" phase of an operation."]
112pub struct SPI_USR_DUMMY_R(crate::FieldReader<bool, bool>);
113impl SPI_USR_DUMMY_R {
114    #[inline(always)]
115    pub(crate) fn new(bits: bool) -> Self {
116        SPI_USR_DUMMY_R(crate::FieldReader::new(bits))
117    }
118}
119impl core::ops::Deref for SPI_USR_DUMMY_R {
120    type Target = crate::FieldReader<bool, bool>;
121    #[inline(always)]
122    fn deref(&self) -> &Self::Target {
123        &self.0
124    }
125}
126#[doc = "Field `spi_usr_dummy` writer - This bit enable the \"dummy\" phase of an operation."]
127pub struct SPI_USR_DUMMY_W<'a> {
128    w: &'a mut W,
129}
130impl<'a> SPI_USR_DUMMY_W<'a> {
131    #[doc = r"Sets the field bit"]
132    #[inline(always)]
133    pub fn set_bit(self) -> &'a mut W {
134        self.bit(true)
135    }
136    #[doc = r"Clears the field bit"]
137    #[inline(always)]
138    pub fn clear_bit(self) -> &'a mut W {
139        self.bit(false)
140    }
141    #[doc = r"Writes raw bits to the field"]
142    #[inline(always)]
143    pub fn bit(self, value: bool) -> &'a mut W {
144        self.w.bits = (self.w.bits & !(1 << 29)) | ((value as u32 & 1) << 29);
145        self.w
146    }
147}
148#[doc = "Field `spi_usr_miso` reader - This bit enable the \"read-data\" phase of an operation."]
149pub struct SPI_USR_MISO_R(crate::FieldReader<bool, bool>);
150impl SPI_USR_MISO_R {
151    #[inline(always)]
152    pub(crate) fn new(bits: bool) -> Self {
153        SPI_USR_MISO_R(crate::FieldReader::new(bits))
154    }
155}
156impl core::ops::Deref for SPI_USR_MISO_R {
157    type Target = crate::FieldReader<bool, bool>;
158    #[inline(always)]
159    fn deref(&self) -> &Self::Target {
160        &self.0
161    }
162}
163#[doc = "Field `spi_usr_miso` writer - This bit enable the \"read-data\" phase of an operation."]
164pub struct SPI_USR_MISO_W<'a> {
165    w: &'a mut W,
166}
167impl<'a> SPI_USR_MISO_W<'a> {
168    #[doc = r"Sets the field bit"]
169    #[inline(always)]
170    pub fn set_bit(self) -> &'a mut W {
171        self.bit(true)
172    }
173    #[doc = r"Clears the field bit"]
174    #[inline(always)]
175    pub fn clear_bit(self) -> &'a mut W {
176        self.bit(false)
177    }
178    #[doc = r"Writes raw bits to the field"]
179    #[inline(always)]
180    pub fn bit(self, value: bool) -> &'a mut W {
181        self.w.bits = (self.w.bits & !(1 << 28)) | ((value as u32 & 1) << 28);
182        self.w
183    }
184}
185#[doc = "Field `spi_usr_mosi` reader - This bit enable the \"write-data\" phase of an operation."]
186pub struct SPI_USR_MOSI_R(crate::FieldReader<bool, bool>);
187impl SPI_USR_MOSI_R {
188    #[inline(always)]
189    pub(crate) fn new(bits: bool) -> Self {
190        SPI_USR_MOSI_R(crate::FieldReader::new(bits))
191    }
192}
193impl core::ops::Deref for SPI_USR_MOSI_R {
194    type Target = crate::FieldReader<bool, bool>;
195    #[inline(always)]
196    fn deref(&self) -> &Self::Target {
197        &self.0
198    }
199}
200#[doc = "Field `spi_usr_mosi` writer - This bit enable the \"write-data\" phase of an operation."]
201pub struct SPI_USR_MOSI_W<'a> {
202    w: &'a mut W,
203}
204impl<'a> SPI_USR_MOSI_W<'a> {
205    #[doc = r"Sets the field bit"]
206    #[inline(always)]
207    pub fn set_bit(self) -> &'a mut W {
208        self.bit(true)
209    }
210    #[doc = r"Clears the field bit"]
211    #[inline(always)]
212    pub fn clear_bit(self) -> &'a mut W {
213        self.bit(false)
214    }
215    #[doc = r"Writes raw bits to the field"]
216    #[inline(always)]
217    pub fn bit(self, value: bool) -> &'a mut W {
218        self.w.bits = (self.w.bits & !(1 << 27)) | ((value as u32 & 1) << 27);
219        self.w
220    }
221}
222#[doc = "Field `reg_usr_mosi_highpart` reader - 1: \"write-data\" phase only access to high-part of the buffer spi_w8~spi_w15"]
223pub struct REG_USR_MOSI_HIGHPART_R(crate::FieldReader<bool, bool>);
224impl REG_USR_MOSI_HIGHPART_R {
225    #[inline(always)]
226    pub(crate) fn new(bits: bool) -> Self {
227        REG_USR_MOSI_HIGHPART_R(crate::FieldReader::new(bits))
228    }
229}
230impl core::ops::Deref for REG_USR_MOSI_HIGHPART_R {
231    type Target = crate::FieldReader<bool, bool>;
232    #[inline(always)]
233    fn deref(&self) -> &Self::Target {
234        &self.0
235    }
236}
237#[doc = "Field `reg_usr_mosi_highpart` writer - 1: \"write-data\" phase only access to high-part of the buffer spi_w8~spi_w15"]
238pub struct REG_USR_MOSI_HIGHPART_W<'a> {
239    w: &'a mut W,
240}
241impl<'a> REG_USR_MOSI_HIGHPART_W<'a> {
242    #[doc = r"Sets the field bit"]
243    #[inline(always)]
244    pub fn set_bit(self) -> &'a mut W {
245        self.bit(true)
246    }
247    #[doc = r"Clears the field bit"]
248    #[inline(always)]
249    pub fn clear_bit(self) -> &'a mut W {
250        self.bit(false)
251    }
252    #[doc = r"Writes raw bits to the field"]
253    #[inline(always)]
254    pub fn bit(self, value: bool) -> &'a mut W {
255        self.w.bits = (self.w.bits & !(1 << 25)) | ((value as u32 & 1) << 25);
256        self.w
257    }
258}
259#[doc = "Field `reg_usr_miso_highpart` reader - 1: \"read-data\" phase only access to high-part of the buffer spi_w8~spi_w15"]
260pub struct REG_USR_MISO_HIGHPART_R(crate::FieldReader<bool, bool>);
261impl REG_USR_MISO_HIGHPART_R {
262    #[inline(always)]
263    pub(crate) fn new(bits: bool) -> Self {
264        REG_USR_MISO_HIGHPART_R(crate::FieldReader::new(bits))
265    }
266}
267impl core::ops::Deref for REG_USR_MISO_HIGHPART_R {
268    type Target = crate::FieldReader<bool, bool>;
269    #[inline(always)]
270    fn deref(&self) -> &Self::Target {
271        &self.0
272    }
273}
274#[doc = "Field `reg_usr_miso_highpart` writer - 1: \"read-data\" phase only access to high-part of the buffer spi_w8~spi_w15"]
275pub struct REG_USR_MISO_HIGHPART_W<'a> {
276    w: &'a mut W,
277}
278impl<'a> REG_USR_MISO_HIGHPART_W<'a> {
279    #[doc = r"Sets the field bit"]
280    #[inline(always)]
281    pub fn set_bit(self) -> &'a mut W {
282        self.bit(true)
283    }
284    #[doc = r"Clears the field bit"]
285    #[inline(always)]
286    pub fn clear_bit(self) -> &'a mut W {
287        self.bit(false)
288    }
289    #[doc = r"Writes raw bits to the field"]
290    #[inline(always)]
291    pub fn bit(self, value: bool) -> &'a mut W {
292        self.w.bits = (self.w.bits & !(1 << 24)) | ((value as u32 & 1) << 24);
293        self.w
294    }
295}
296#[doc = "Field `spi_sio` reader - 1: mosi and miso signals share the same pin"]
297pub struct SPI_SIO_R(crate::FieldReader<bool, bool>);
298impl SPI_SIO_R {
299    #[inline(always)]
300    pub(crate) fn new(bits: bool) -> Self {
301        SPI_SIO_R(crate::FieldReader::new(bits))
302    }
303}
304impl core::ops::Deref for SPI_SIO_R {
305    type Target = crate::FieldReader<bool, bool>;
306    #[inline(always)]
307    fn deref(&self) -> &Self::Target {
308        &self.0
309    }
310}
311#[doc = "Field `spi_sio` writer - 1: mosi and miso signals share the same pin"]
312pub struct SPI_SIO_W<'a> {
313    w: &'a mut W,
314}
315impl<'a> SPI_SIO_W<'a> {
316    #[doc = r"Sets the field bit"]
317    #[inline(always)]
318    pub fn set_bit(self) -> &'a mut W {
319        self.bit(true)
320    }
321    #[doc = r"Clears the field bit"]
322    #[inline(always)]
323    pub fn clear_bit(self) -> &'a mut W {
324        self.bit(false)
325    }
326    #[doc = r"Writes raw bits to the field"]
327    #[inline(always)]
328    pub fn bit(self, value: bool) -> &'a mut W {
329        self.w.bits = (self.w.bits & !(1 << 16)) | ((value as u32 & 1) << 16);
330        self.w
331    }
332}
333#[doc = "Field `spi_fwrite_qio` reader - In the write operations, \"address\" phase and \"read-data\" phase apply 4 signals"]
334pub struct SPI_FWRITE_QIO_R(crate::FieldReader<bool, bool>);
335impl SPI_FWRITE_QIO_R {
336    #[inline(always)]
337    pub(crate) fn new(bits: bool) -> Self {
338        SPI_FWRITE_QIO_R(crate::FieldReader::new(bits))
339    }
340}
341impl core::ops::Deref for SPI_FWRITE_QIO_R {
342    type Target = crate::FieldReader<bool, bool>;
343    #[inline(always)]
344    fn deref(&self) -> &Self::Target {
345        &self.0
346    }
347}
348#[doc = "Field `spi_fwrite_qio` writer - In the write operations, \"address\" phase and \"read-data\" phase apply 4 signals"]
349pub struct SPI_FWRITE_QIO_W<'a> {
350    w: &'a mut W,
351}
352impl<'a> SPI_FWRITE_QIO_W<'a> {
353    #[doc = r"Sets the field bit"]
354    #[inline(always)]
355    pub fn set_bit(self) -> &'a mut W {
356        self.bit(true)
357    }
358    #[doc = r"Clears the field bit"]
359    #[inline(always)]
360    pub fn clear_bit(self) -> &'a mut W {
361        self.bit(false)
362    }
363    #[doc = r"Writes raw bits to the field"]
364    #[inline(always)]
365    pub fn bit(self, value: bool) -> &'a mut W {
366        self.w.bits = (self.w.bits & !(1 << 15)) | ((value as u32 & 1) << 15);
367        self.w
368    }
369}
370#[doc = "Field `spi_fwrite_dio` reader - In the write operations, \"address\" phase and \"read-data\" phase apply 2 signals"]
371pub struct SPI_FWRITE_DIO_R(crate::FieldReader<bool, bool>);
372impl SPI_FWRITE_DIO_R {
373    #[inline(always)]
374    pub(crate) fn new(bits: bool) -> Self {
375        SPI_FWRITE_DIO_R(crate::FieldReader::new(bits))
376    }
377}
378impl core::ops::Deref for SPI_FWRITE_DIO_R {
379    type Target = crate::FieldReader<bool, bool>;
380    #[inline(always)]
381    fn deref(&self) -> &Self::Target {
382        &self.0
383    }
384}
385#[doc = "Field `spi_fwrite_dio` writer - In the write operations, \"address\" phase and \"read-data\" phase apply 2 signals"]
386pub struct SPI_FWRITE_DIO_W<'a> {
387    w: &'a mut W,
388}
389impl<'a> SPI_FWRITE_DIO_W<'a> {
390    #[doc = r"Sets the field bit"]
391    #[inline(always)]
392    pub fn set_bit(self) -> &'a mut W {
393        self.bit(true)
394    }
395    #[doc = r"Clears the field bit"]
396    #[inline(always)]
397    pub fn clear_bit(self) -> &'a mut W {
398        self.bit(false)
399    }
400    #[doc = r"Writes raw bits to the field"]
401    #[inline(always)]
402    pub fn bit(self, value: bool) -> &'a mut W {
403        self.w.bits = (self.w.bits & !(1 << 14)) | ((value as u32 & 1) << 14);
404        self.w
405    }
406}
407#[doc = "Field `spi_fwrite_quad` reader - In the write operations, \"read-data\" phase apply 4 signals"]
408pub struct SPI_FWRITE_QUAD_R(crate::FieldReader<bool, bool>);
409impl SPI_FWRITE_QUAD_R {
410    #[inline(always)]
411    pub(crate) fn new(bits: bool) -> Self {
412        SPI_FWRITE_QUAD_R(crate::FieldReader::new(bits))
413    }
414}
415impl core::ops::Deref for SPI_FWRITE_QUAD_R {
416    type Target = crate::FieldReader<bool, bool>;
417    #[inline(always)]
418    fn deref(&self) -> &Self::Target {
419        &self.0
420    }
421}
422#[doc = "Field `spi_fwrite_quad` writer - In the write operations, \"read-data\" phase apply 4 signals"]
423pub struct SPI_FWRITE_QUAD_W<'a> {
424    w: &'a mut W,
425}
426impl<'a> SPI_FWRITE_QUAD_W<'a> {
427    #[doc = r"Sets the field bit"]
428    #[inline(always)]
429    pub fn set_bit(self) -> &'a mut W {
430        self.bit(true)
431    }
432    #[doc = r"Clears the field bit"]
433    #[inline(always)]
434    pub fn clear_bit(self) -> &'a mut W {
435        self.bit(false)
436    }
437    #[doc = r"Writes raw bits to the field"]
438    #[inline(always)]
439    pub fn bit(self, value: bool) -> &'a mut W {
440        self.w.bits = (self.w.bits & !(1 << 13)) | ((value as u32 & 1) << 13);
441        self.w
442    }
443}
444#[doc = "Field `spi_fwrite_dual` reader - In the write operations, \"read-data\" phase apply 2 signals"]
445pub struct SPI_FWRITE_DUAL_R(crate::FieldReader<bool, bool>);
446impl SPI_FWRITE_DUAL_R {
447    #[inline(always)]
448    pub(crate) fn new(bits: bool) -> Self {
449        SPI_FWRITE_DUAL_R(crate::FieldReader::new(bits))
450    }
451}
452impl core::ops::Deref for SPI_FWRITE_DUAL_R {
453    type Target = crate::FieldReader<bool, bool>;
454    #[inline(always)]
455    fn deref(&self) -> &Self::Target {
456        &self.0
457    }
458}
459#[doc = "Field `spi_fwrite_dual` writer - In the write operations, \"read-data\" phase apply 2 signals"]
460pub struct SPI_FWRITE_DUAL_W<'a> {
461    w: &'a mut W,
462}
463impl<'a> SPI_FWRITE_DUAL_W<'a> {
464    #[doc = r"Sets the field bit"]
465    #[inline(always)]
466    pub fn set_bit(self) -> &'a mut W {
467        self.bit(true)
468    }
469    #[doc = r"Clears the field bit"]
470    #[inline(always)]
471    pub fn clear_bit(self) -> &'a mut W {
472        self.bit(false)
473    }
474    #[doc = r"Writes raw bits to the field"]
475    #[inline(always)]
476    pub fn bit(self, value: bool) -> &'a mut W {
477        self.w.bits = (self.w.bits & !(1 << 12)) | ((value as u32 & 1) << 12);
478        self.w
479    }
480}
481#[doc = "Field `spi_wr_byte_order` reader - In \"command\", \"address\", \"write-data\" (MOSI) phases, 1: little-endian; 0: big_endian"]
482pub struct SPI_WR_BYTE_ORDER_R(crate::FieldReader<bool, bool>);
483impl SPI_WR_BYTE_ORDER_R {
484    #[inline(always)]
485    pub(crate) fn new(bits: bool) -> Self {
486        SPI_WR_BYTE_ORDER_R(crate::FieldReader::new(bits))
487    }
488}
489impl core::ops::Deref for SPI_WR_BYTE_ORDER_R {
490    type Target = crate::FieldReader<bool, bool>;
491    #[inline(always)]
492    fn deref(&self) -> &Self::Target {
493        &self.0
494    }
495}
496#[doc = "Field `spi_wr_byte_order` writer - In \"command\", \"address\", \"write-data\" (MOSI) phases, 1: little-endian; 0: big_endian"]
497pub struct SPI_WR_BYTE_ORDER_W<'a> {
498    w: &'a mut W,
499}
500impl<'a> SPI_WR_BYTE_ORDER_W<'a> {
501    #[doc = r"Sets the field bit"]
502    #[inline(always)]
503    pub fn set_bit(self) -> &'a mut W {
504        self.bit(true)
505    }
506    #[doc = r"Clears the field bit"]
507    #[inline(always)]
508    pub fn clear_bit(self) -> &'a mut W {
509        self.bit(false)
510    }
511    #[doc = r"Writes raw bits to the field"]
512    #[inline(always)]
513    pub fn bit(self, value: bool) -> &'a mut W {
514        self.w.bits = (self.w.bits & !(1 << 11)) | ((value as u32 & 1) << 11);
515        self.w
516    }
517}
518#[doc = "Field `spi_rd_byte_order` reader - In \"read-data\" (MISO) phase, 1: little-endian; 0: big_endian"]
519pub struct SPI_RD_BYTE_ORDER_R(crate::FieldReader<bool, bool>);
520impl SPI_RD_BYTE_ORDER_R {
521    #[inline(always)]
522    pub(crate) fn new(bits: bool) -> Self {
523        SPI_RD_BYTE_ORDER_R(crate::FieldReader::new(bits))
524    }
525}
526impl core::ops::Deref for SPI_RD_BYTE_ORDER_R {
527    type Target = crate::FieldReader<bool, bool>;
528    #[inline(always)]
529    fn deref(&self) -> &Self::Target {
530        &self.0
531    }
532}
533#[doc = "Field `spi_rd_byte_order` writer - In \"read-data\" (MISO) phase, 1: little-endian; 0: big_endian"]
534pub struct SPI_RD_BYTE_ORDER_W<'a> {
535    w: &'a mut W,
536}
537impl<'a> SPI_RD_BYTE_ORDER_W<'a> {
538    #[doc = r"Sets the field bit"]
539    #[inline(always)]
540    pub fn set_bit(self) -> &'a mut W {
541        self.bit(true)
542    }
543    #[doc = r"Clears the field bit"]
544    #[inline(always)]
545    pub fn clear_bit(self) -> &'a mut W {
546        self.bit(false)
547    }
548    #[doc = r"Writes raw bits to the field"]
549    #[inline(always)]
550    pub fn bit(self, value: bool) -> &'a mut W {
551        self.w.bits = (self.w.bits & !(1 << 10)) | ((value as u32 & 1) << 10);
552        self.w
553    }
554}
555#[doc = "Field `spi_ck_i_edge` reader - In the slave mode, 1: rising-edge; 0: falling-edge"]
556pub struct SPI_CK_I_EDGE_R(crate::FieldReader<bool, bool>);
557impl SPI_CK_I_EDGE_R {
558    #[inline(always)]
559    pub(crate) fn new(bits: bool) -> Self {
560        SPI_CK_I_EDGE_R(crate::FieldReader::new(bits))
561    }
562}
563impl core::ops::Deref for SPI_CK_I_EDGE_R {
564    type Target = crate::FieldReader<bool, bool>;
565    #[inline(always)]
566    fn deref(&self) -> &Self::Target {
567        &self.0
568    }
569}
570#[doc = "Field `spi_ck_i_edge` writer - In the slave mode, 1: rising-edge; 0: falling-edge"]
571pub struct SPI_CK_I_EDGE_W<'a> {
572    w: &'a mut W,
573}
574impl<'a> SPI_CK_I_EDGE_W<'a> {
575    #[doc = r"Sets the field bit"]
576    #[inline(always)]
577    pub fn set_bit(self) -> &'a mut W {
578        self.bit(true)
579    }
580    #[doc = r"Clears the field bit"]
581    #[inline(always)]
582    pub fn clear_bit(self) -> &'a mut W {
583        self.bit(false)
584    }
585    #[doc = r"Writes raw bits to the field"]
586    #[inline(always)]
587    pub fn bit(self, value: bool) -> &'a mut W {
588        self.w.bits = (self.w.bits & !(1 << 6)) | ((value as u32 & 1) << 6);
589        self.w
590    }
591}
592#[doc = "Field `spi_ck_o_edge` reader - In the master mode, 1: rising-edge; 0: falling-edge"]
593pub struct SPI_CK_O_EDGE_R(crate::FieldReader<bool, bool>);
594impl SPI_CK_O_EDGE_R {
595    #[inline(always)]
596    pub(crate) fn new(bits: bool) -> Self {
597        SPI_CK_O_EDGE_R(crate::FieldReader::new(bits))
598    }
599}
600impl core::ops::Deref for SPI_CK_O_EDGE_R {
601    type Target = crate::FieldReader<bool, bool>;
602    #[inline(always)]
603    fn deref(&self) -> &Self::Target {
604        &self.0
605    }
606}
607#[doc = "Field `spi_ck_o_edge` writer - In the master mode, 1: rising-edge; 0: falling-edge"]
608pub struct SPI_CK_O_EDGE_W<'a> {
609    w: &'a mut W,
610}
611impl<'a> SPI_CK_O_EDGE_W<'a> {
612    #[doc = r"Sets the field bit"]
613    #[inline(always)]
614    pub fn set_bit(self) -> &'a mut W {
615        self.bit(true)
616    }
617    #[doc = r"Clears the field bit"]
618    #[inline(always)]
619    pub fn clear_bit(self) -> &'a mut W {
620        self.bit(false)
621    }
622    #[doc = r"Writes raw bits to the field"]
623    #[inline(always)]
624    pub fn bit(self, value: bool) -> &'a mut W {
625        self.w.bits = (self.w.bits & !(1 << 7)) | ((value as u32 & 1) << 7);
626        self.w
627    }
628}
629#[doc = "Field `spi_cs_setup` reader - spi cs is enable when spi is in prepare phase. 1: enable 0: disable."]
630pub struct SPI_CS_SETUP_R(crate::FieldReader<bool, bool>);
631impl SPI_CS_SETUP_R {
632    #[inline(always)]
633    pub(crate) fn new(bits: bool) -> Self {
634        SPI_CS_SETUP_R(crate::FieldReader::new(bits))
635    }
636}
637impl core::ops::Deref for SPI_CS_SETUP_R {
638    type Target = crate::FieldReader<bool, bool>;
639    #[inline(always)]
640    fn deref(&self) -> &Self::Target {
641        &self.0
642    }
643}
644#[doc = "Field `spi_cs_setup` writer - spi cs is enable when spi is in prepare phase. 1: enable 0: disable."]
645pub struct SPI_CS_SETUP_W<'a> {
646    w: &'a mut W,
647}
648impl<'a> SPI_CS_SETUP_W<'a> {
649    #[doc = r"Sets the field bit"]
650    #[inline(always)]
651    pub fn set_bit(self) -> &'a mut W {
652        self.bit(true)
653    }
654    #[doc = r"Clears the field bit"]
655    #[inline(always)]
656    pub fn clear_bit(self) -> &'a mut W {
657        self.bit(false)
658    }
659    #[doc = r"Writes raw bits to the field"]
660    #[inline(always)]
661    pub fn bit(self, value: bool) -> &'a mut W {
662        self.w.bits = (self.w.bits & !(1 << 5)) | ((value as u32 & 1) << 5);
663        self.w
664    }
665}
666#[doc = "Field `spi_cs_hold` reader - spi cs keep low when spi is in done phase. 1: enable 0: disable."]
667pub struct SPI_CS_HOLD_R(crate::FieldReader<bool, bool>);
668impl SPI_CS_HOLD_R {
669    #[inline(always)]
670    pub(crate) fn new(bits: bool) -> Self {
671        SPI_CS_HOLD_R(crate::FieldReader::new(bits))
672    }
673}
674impl core::ops::Deref for SPI_CS_HOLD_R {
675    type Target = crate::FieldReader<bool, bool>;
676    #[inline(always)]
677    fn deref(&self) -> &Self::Target {
678        &self.0
679    }
680}
681#[doc = "Field `spi_cs_hold` writer - spi cs keep low when spi is in done phase. 1: enable 0: disable."]
682pub struct SPI_CS_HOLD_W<'a> {
683    w: &'a mut W,
684}
685impl<'a> SPI_CS_HOLD_W<'a> {
686    #[doc = r"Sets the field bit"]
687    #[inline(always)]
688    pub fn set_bit(self) -> &'a mut W {
689        self.bit(true)
690    }
691    #[doc = r"Clears the field bit"]
692    #[inline(always)]
693    pub fn clear_bit(self) -> &'a mut W {
694        self.bit(false)
695    }
696    #[doc = r"Writes raw bits to the field"]
697    #[inline(always)]
698    pub fn bit(self, value: bool) -> &'a mut W {
699        self.w.bits = (self.w.bits & !(1 << 4)) | ((value as u32 & 1) << 4);
700        self.w
701    }
702}
703#[doc = "Field `spi_ahb_user_command` reader - reserved"]
704pub struct SPI_AHB_USER_COMMAND_R(crate::FieldReader<bool, bool>);
705impl SPI_AHB_USER_COMMAND_R {
706    #[inline(always)]
707    pub(crate) fn new(bits: bool) -> Self {
708        SPI_AHB_USER_COMMAND_R(crate::FieldReader::new(bits))
709    }
710}
711impl core::ops::Deref for SPI_AHB_USER_COMMAND_R {
712    type Target = crate::FieldReader<bool, bool>;
713    #[inline(always)]
714    fn deref(&self) -> &Self::Target {
715        &self.0
716    }
717}
718#[doc = "Field `spi_ahb_user_command` writer - reserved"]
719pub struct SPI_AHB_USER_COMMAND_W<'a> {
720    w: &'a mut W,
721}
722impl<'a> SPI_AHB_USER_COMMAND_W<'a> {
723    #[doc = r"Sets the field bit"]
724    #[inline(always)]
725    pub fn set_bit(self) -> &'a mut W {
726        self.bit(true)
727    }
728    #[doc = r"Clears the field bit"]
729    #[inline(always)]
730    pub fn clear_bit(self) -> &'a mut W {
731        self.bit(false)
732    }
733    #[doc = r"Writes raw bits to the field"]
734    #[inline(always)]
735    pub fn bit(self, value: bool) -> &'a mut W {
736        self.w.bits = (self.w.bits & !(1 << 3)) | ((value as u32 & 1) << 3);
737        self.w
738    }
739}
740#[doc = "Field `spi_flash_mode` reader - "]
741pub struct SPI_FLASH_MODE_R(crate::FieldReader<bool, bool>);
742impl SPI_FLASH_MODE_R {
743    #[inline(always)]
744    pub(crate) fn new(bits: bool) -> Self {
745        SPI_FLASH_MODE_R(crate::FieldReader::new(bits))
746    }
747}
748impl core::ops::Deref for SPI_FLASH_MODE_R {
749    type Target = crate::FieldReader<bool, bool>;
750    #[inline(always)]
751    fn deref(&self) -> &Self::Target {
752        &self.0
753    }
754}
755#[doc = "Field `spi_flash_mode` writer - "]
756pub struct SPI_FLASH_MODE_W<'a> {
757    w: &'a mut W,
758}
759impl<'a> SPI_FLASH_MODE_W<'a> {
760    #[doc = r"Sets the field bit"]
761    #[inline(always)]
762    pub fn set_bit(self) -> &'a mut W {
763        self.bit(true)
764    }
765    #[doc = r"Clears the field bit"]
766    #[inline(always)]
767    pub fn clear_bit(self) -> &'a mut W {
768        self.bit(false)
769    }
770    #[doc = r"Writes raw bits to the field"]
771    #[inline(always)]
772    pub fn bit(self, value: bool) -> &'a mut W {
773        self.w.bits = (self.w.bits & !(1 << 2)) | ((value as u32 & 1) << 2);
774        self.w
775    }
776}
777#[doc = "Field `spi_ahb_user_command_4byte` reader - reserved"]
778pub struct SPI_AHB_USER_COMMAND_4BYTE_R(crate::FieldReader<bool, bool>);
779impl SPI_AHB_USER_COMMAND_4BYTE_R {
780    #[inline(always)]
781    pub(crate) fn new(bits: bool) -> Self {
782        SPI_AHB_USER_COMMAND_4BYTE_R(crate::FieldReader::new(bits))
783    }
784}
785impl core::ops::Deref for SPI_AHB_USER_COMMAND_4BYTE_R {
786    type Target = crate::FieldReader<bool, bool>;
787    #[inline(always)]
788    fn deref(&self) -> &Self::Target {
789        &self.0
790    }
791}
792#[doc = "Field `spi_ahb_user_command_4byte` writer - reserved"]
793pub struct SPI_AHB_USER_COMMAND_4BYTE_W<'a> {
794    w: &'a mut W,
795}
796impl<'a> SPI_AHB_USER_COMMAND_4BYTE_W<'a> {
797    #[doc = r"Sets the field bit"]
798    #[inline(always)]
799    pub fn set_bit(self) -> &'a mut W {
800        self.bit(true)
801    }
802    #[doc = r"Clears the field bit"]
803    #[inline(always)]
804    pub fn clear_bit(self) -> &'a mut W {
805        self.bit(false)
806    }
807    #[doc = r"Writes raw bits to the field"]
808    #[inline(always)]
809    pub fn bit(self, value: bool) -> &'a mut W {
810        self.w.bits = (self.w.bits & !(1 << 1)) | ((value as u32 & 1) << 1);
811        self.w
812    }
813}
814#[doc = "Field `spi_duplex` reader - set spi in full duplex mode"]
815pub struct SPI_DUPLEX_R(crate::FieldReader<bool, bool>);
816impl SPI_DUPLEX_R {
817    #[inline(always)]
818    pub(crate) fn new(bits: bool) -> Self {
819        SPI_DUPLEX_R(crate::FieldReader::new(bits))
820    }
821}
822impl core::ops::Deref for SPI_DUPLEX_R {
823    type Target = crate::FieldReader<bool, bool>;
824    #[inline(always)]
825    fn deref(&self) -> &Self::Target {
826        &self.0
827    }
828}
829#[doc = "Field `spi_duplex` writer - set spi in full duplex mode"]
830pub struct SPI_DUPLEX_W<'a> {
831    w: &'a mut W,
832}
833impl<'a> SPI_DUPLEX_W<'a> {
834    #[doc = r"Sets the field bit"]
835    #[inline(always)]
836    pub fn set_bit(self) -> &'a mut W {
837        self.bit(true)
838    }
839    #[doc = r"Clears the field bit"]
840    #[inline(always)]
841    pub fn clear_bit(self) -> &'a mut W {
842        self.bit(false)
843    }
844    #[doc = r"Writes raw bits to the field"]
845    #[inline(always)]
846    pub fn bit(self, value: bool) -> &'a mut W {
847        self.w.bits = (self.w.bits & !1) | (value as u32 & 1);
848        self.w
849    }
850}
851impl R {
852    #[doc = "Bit 31 - This bit enable the \"command\" phase of an operation."]
853    #[inline(always)]
854    pub fn spi_usr_command(&self) -> SPI_USR_COMMAND_R {
855        SPI_USR_COMMAND_R::new(((self.bits >> 31) & 1) != 0)
856    }
857    #[doc = "Bit 30 - This bit enable the \"address\" phase of an operation."]
858    #[inline(always)]
859    pub fn spi_usr_addr(&self) -> SPI_USR_ADDR_R {
860        SPI_USR_ADDR_R::new(((self.bits >> 30) & 1) != 0)
861    }
862    #[doc = "Bit 29 - This bit enable the \"dummy\" phase of an operation."]
863    #[inline(always)]
864    pub fn spi_usr_dummy(&self) -> SPI_USR_DUMMY_R {
865        SPI_USR_DUMMY_R::new(((self.bits >> 29) & 1) != 0)
866    }
867    #[doc = "Bit 28 - This bit enable the \"read-data\" phase of an operation."]
868    #[inline(always)]
869    pub fn spi_usr_miso(&self) -> SPI_USR_MISO_R {
870        SPI_USR_MISO_R::new(((self.bits >> 28) & 1) != 0)
871    }
872    #[doc = "Bit 27 - This bit enable the \"write-data\" phase of an operation."]
873    #[inline(always)]
874    pub fn spi_usr_mosi(&self) -> SPI_USR_MOSI_R {
875        SPI_USR_MOSI_R::new(((self.bits >> 27) & 1) != 0)
876    }
877    #[doc = "Bit 25 - 1: \"write-data\" phase only access to high-part of the buffer spi_w8~spi_w15"]
878    #[inline(always)]
879    pub fn reg_usr_mosi_highpart(&self) -> REG_USR_MOSI_HIGHPART_R {
880        REG_USR_MOSI_HIGHPART_R::new(((self.bits >> 25) & 1) != 0)
881    }
882    #[doc = "Bit 24 - 1: \"read-data\" phase only access to high-part of the buffer spi_w8~spi_w15"]
883    #[inline(always)]
884    pub fn reg_usr_miso_highpart(&self) -> REG_USR_MISO_HIGHPART_R {
885        REG_USR_MISO_HIGHPART_R::new(((self.bits >> 24) & 1) != 0)
886    }
887    #[doc = "Bit 16 - 1: mosi and miso signals share the same pin"]
888    #[inline(always)]
889    pub fn spi_sio(&self) -> SPI_SIO_R {
890        SPI_SIO_R::new(((self.bits >> 16) & 1) != 0)
891    }
892    #[doc = "Bit 15 - In the write operations, \"address\" phase and \"read-data\" phase apply 4 signals"]
893    #[inline(always)]
894    pub fn spi_fwrite_qio(&self) -> SPI_FWRITE_QIO_R {
895        SPI_FWRITE_QIO_R::new(((self.bits >> 15) & 1) != 0)
896    }
897    #[doc = "Bit 14 - In the write operations, \"address\" phase and \"read-data\" phase apply 2 signals"]
898    #[inline(always)]
899    pub fn spi_fwrite_dio(&self) -> SPI_FWRITE_DIO_R {
900        SPI_FWRITE_DIO_R::new(((self.bits >> 14) & 1) != 0)
901    }
902    #[doc = "Bit 13 - In the write operations, \"read-data\" phase apply 4 signals"]
903    #[inline(always)]
904    pub fn spi_fwrite_quad(&self) -> SPI_FWRITE_QUAD_R {
905        SPI_FWRITE_QUAD_R::new(((self.bits >> 13) & 1) != 0)
906    }
907    #[doc = "Bit 12 - In the write operations, \"read-data\" phase apply 2 signals"]
908    #[inline(always)]
909    pub fn spi_fwrite_dual(&self) -> SPI_FWRITE_DUAL_R {
910        SPI_FWRITE_DUAL_R::new(((self.bits >> 12) & 1) != 0)
911    }
912    #[doc = "Bit 11 - In \"command\", \"address\", \"write-data\" (MOSI) phases, 1: little-endian; 0: big_endian"]
913    #[inline(always)]
914    pub fn spi_wr_byte_order(&self) -> SPI_WR_BYTE_ORDER_R {
915        SPI_WR_BYTE_ORDER_R::new(((self.bits >> 11) & 1) != 0)
916    }
917    #[doc = "Bit 10 - In \"read-data\" (MISO) phase, 1: little-endian; 0: big_endian"]
918    #[inline(always)]
919    pub fn spi_rd_byte_order(&self) -> SPI_RD_BYTE_ORDER_R {
920        SPI_RD_BYTE_ORDER_R::new(((self.bits >> 10) & 1) != 0)
921    }
922    #[doc = "Bit 6 - In the slave mode, 1: rising-edge; 0: falling-edge"]
923    #[inline(always)]
924    pub fn spi_ck_i_edge(&self) -> SPI_CK_I_EDGE_R {
925        SPI_CK_I_EDGE_R::new(((self.bits >> 6) & 1) != 0)
926    }
927    #[doc = "Bit 7 - In the master mode, 1: rising-edge; 0: falling-edge"]
928    #[inline(always)]
929    pub fn spi_ck_o_edge(&self) -> SPI_CK_O_EDGE_R {
930        SPI_CK_O_EDGE_R::new(((self.bits >> 7) & 1) != 0)
931    }
932    #[doc = "Bit 5 - spi cs is enable when spi is in prepare phase. 1: enable 0: disable."]
933    #[inline(always)]
934    pub fn spi_cs_setup(&self) -> SPI_CS_SETUP_R {
935        SPI_CS_SETUP_R::new(((self.bits >> 5) & 1) != 0)
936    }
937    #[doc = "Bit 4 - spi cs keep low when spi is in done phase. 1: enable 0: disable."]
938    #[inline(always)]
939    pub fn spi_cs_hold(&self) -> SPI_CS_HOLD_R {
940        SPI_CS_HOLD_R::new(((self.bits >> 4) & 1) != 0)
941    }
942    #[doc = "Bit 3 - reserved"]
943    #[inline(always)]
944    pub fn spi_ahb_user_command(&self) -> SPI_AHB_USER_COMMAND_R {
945        SPI_AHB_USER_COMMAND_R::new(((self.bits >> 3) & 1) != 0)
946    }
947    #[doc = "Bit 2"]
948    #[inline(always)]
949    pub fn spi_flash_mode(&self) -> SPI_FLASH_MODE_R {
950        SPI_FLASH_MODE_R::new(((self.bits >> 2) & 1) != 0)
951    }
952    #[doc = "Bit 1 - reserved"]
953    #[inline(always)]
954    pub fn spi_ahb_user_command_4byte(&self) -> SPI_AHB_USER_COMMAND_4BYTE_R {
955        SPI_AHB_USER_COMMAND_4BYTE_R::new(((self.bits >> 1) & 1) != 0)
956    }
957    #[doc = "Bit 0 - set spi in full duplex mode"]
958    #[inline(always)]
959    pub fn spi_duplex(&self) -> SPI_DUPLEX_R {
960        SPI_DUPLEX_R::new((self.bits & 1) != 0)
961    }
962}
963impl W {
964    #[doc = "Bit 31 - This bit enable the \"command\" phase of an operation."]
965    #[inline(always)]
966    pub fn spi_usr_command(&mut self) -> SPI_USR_COMMAND_W {
967        SPI_USR_COMMAND_W { w: self }
968    }
969    #[doc = "Bit 30 - This bit enable the \"address\" phase of an operation."]
970    #[inline(always)]
971    pub fn spi_usr_addr(&mut self) -> SPI_USR_ADDR_W {
972        SPI_USR_ADDR_W { w: self }
973    }
974    #[doc = "Bit 29 - This bit enable the \"dummy\" phase of an operation."]
975    #[inline(always)]
976    pub fn spi_usr_dummy(&mut self) -> SPI_USR_DUMMY_W {
977        SPI_USR_DUMMY_W { w: self }
978    }
979    #[doc = "Bit 28 - This bit enable the \"read-data\" phase of an operation."]
980    #[inline(always)]
981    pub fn spi_usr_miso(&mut self) -> SPI_USR_MISO_W {
982        SPI_USR_MISO_W { w: self }
983    }
984    #[doc = "Bit 27 - This bit enable the \"write-data\" phase of an operation."]
985    #[inline(always)]
986    pub fn spi_usr_mosi(&mut self) -> SPI_USR_MOSI_W {
987        SPI_USR_MOSI_W { w: self }
988    }
989    #[doc = "Bit 25 - 1: \"write-data\" phase only access to high-part of the buffer spi_w8~spi_w15"]
990    #[inline(always)]
991    pub fn reg_usr_mosi_highpart(&mut self) -> REG_USR_MOSI_HIGHPART_W {
992        REG_USR_MOSI_HIGHPART_W { w: self }
993    }
994    #[doc = "Bit 24 - 1: \"read-data\" phase only access to high-part of the buffer spi_w8~spi_w15"]
995    #[inline(always)]
996    pub fn reg_usr_miso_highpart(&mut self) -> REG_USR_MISO_HIGHPART_W {
997        REG_USR_MISO_HIGHPART_W { w: self }
998    }
999    #[doc = "Bit 16 - 1: mosi and miso signals share the same pin"]
1000    #[inline(always)]
1001    pub fn spi_sio(&mut self) -> SPI_SIO_W {
1002        SPI_SIO_W { w: self }
1003    }
1004    #[doc = "Bit 15 - In the write operations, \"address\" phase and \"read-data\" phase apply 4 signals"]
1005    #[inline(always)]
1006    pub fn spi_fwrite_qio(&mut self) -> SPI_FWRITE_QIO_W {
1007        SPI_FWRITE_QIO_W { w: self }
1008    }
1009    #[doc = "Bit 14 - In the write operations, \"address\" phase and \"read-data\" phase apply 2 signals"]
1010    #[inline(always)]
1011    pub fn spi_fwrite_dio(&mut self) -> SPI_FWRITE_DIO_W {
1012        SPI_FWRITE_DIO_W { w: self }
1013    }
1014    #[doc = "Bit 13 - In the write operations, \"read-data\" phase apply 4 signals"]
1015    #[inline(always)]
1016    pub fn spi_fwrite_quad(&mut self) -> SPI_FWRITE_QUAD_W {
1017        SPI_FWRITE_QUAD_W { w: self }
1018    }
1019    #[doc = "Bit 12 - In the write operations, \"read-data\" phase apply 2 signals"]
1020    #[inline(always)]
1021    pub fn spi_fwrite_dual(&mut self) -> SPI_FWRITE_DUAL_W {
1022        SPI_FWRITE_DUAL_W { w: self }
1023    }
1024    #[doc = "Bit 11 - In \"command\", \"address\", \"write-data\" (MOSI) phases, 1: little-endian; 0: big_endian"]
1025    #[inline(always)]
1026    pub fn spi_wr_byte_order(&mut self) -> SPI_WR_BYTE_ORDER_W {
1027        SPI_WR_BYTE_ORDER_W { w: self }
1028    }
1029    #[doc = "Bit 10 - In \"read-data\" (MISO) phase, 1: little-endian; 0: big_endian"]
1030    #[inline(always)]
1031    pub fn spi_rd_byte_order(&mut self) -> SPI_RD_BYTE_ORDER_W {
1032        SPI_RD_BYTE_ORDER_W { w: self }
1033    }
1034    #[doc = "Bit 6 - In the slave mode, 1: rising-edge; 0: falling-edge"]
1035    #[inline(always)]
1036    pub fn spi_ck_i_edge(&mut self) -> SPI_CK_I_EDGE_W {
1037        SPI_CK_I_EDGE_W { w: self }
1038    }
1039    #[doc = "Bit 7 - In the master mode, 1: rising-edge; 0: falling-edge"]
1040    #[inline(always)]
1041    pub fn spi_ck_o_edge(&mut self) -> SPI_CK_O_EDGE_W {
1042        SPI_CK_O_EDGE_W { w: self }
1043    }
1044    #[doc = "Bit 5 - spi cs is enable when spi is in prepare phase. 1: enable 0: disable."]
1045    #[inline(always)]
1046    pub fn spi_cs_setup(&mut self) -> SPI_CS_SETUP_W {
1047        SPI_CS_SETUP_W { w: self }
1048    }
1049    #[doc = "Bit 4 - spi cs keep low when spi is in done phase. 1: enable 0: disable."]
1050    #[inline(always)]
1051    pub fn spi_cs_hold(&mut self) -> SPI_CS_HOLD_W {
1052        SPI_CS_HOLD_W { w: self }
1053    }
1054    #[doc = "Bit 3 - reserved"]
1055    #[inline(always)]
1056    pub fn spi_ahb_user_command(&mut self) -> SPI_AHB_USER_COMMAND_W {
1057        SPI_AHB_USER_COMMAND_W { w: self }
1058    }
1059    #[doc = "Bit 2"]
1060    #[inline(always)]
1061    pub fn spi_flash_mode(&mut self) -> SPI_FLASH_MODE_W {
1062        SPI_FLASH_MODE_W { w: self }
1063    }
1064    #[doc = "Bit 1 - reserved"]
1065    #[inline(always)]
1066    pub fn spi_ahb_user_command_4byte(&mut self) -> SPI_AHB_USER_COMMAND_4BYTE_W {
1067        SPI_AHB_USER_COMMAND_4BYTE_W { w: self }
1068    }
1069    #[doc = "Bit 0 - set spi in full duplex mode"]
1070    #[inline(always)]
1071    pub fn spi_duplex(&mut self) -> SPI_DUPLEX_W {
1072        SPI_DUPLEX_W { w: self }
1073    }
1074    #[doc = "Writes raw bits to the register."]
1075    #[inline(always)]
1076    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
1077        self.0.bits(bits);
1078        self
1079    }
1080}
1081#[doc = "This bit enable the \"command\" phase of an operation.\n\nThis register you can [`read`]
1082(crate::generic::Reg::read), [`write_with_zero`]
1083(crate::generic::Reg::write_with_zero), [`reset`]
1084(crate::generic::Reg::reset), [`write`]
1085(crate::generic::Reg::write), [`modify`]
1086(crate::generic::Reg::modify). See [API]
1087(https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [spi_user]
1088(index.html) module"]
1089pub struct SPI_USER_SPEC;
1090impl crate::RegisterSpec for SPI_USER_SPEC {
1091    type Ux = u32;
1092}
1093#[doc = "`read()` method returns [spi_user::R]
1094(R) reader structure"]
1095impl crate::Readable for SPI_USER_SPEC {
1096    type Reader = R;
1097}
1098#[doc = "`write(|w| ..)` method takes [spi_user::W]
1099(W) writer structure"]
1100impl crate::Writable for SPI_USER_SPEC {
1101    type Writer = W;
1102}
1103#[doc = "`reset()` method sets SPI_USER to value 0"]
1104impl crate::Resettable for SPI_USER_SPEC {
1105    #[inline(always)]
1106    fn reset_value() -> Self::Ux {
1107        0
1108    }
1109}
esp8266/spi0/spi_user.rs

esp8266/spi0/
spi_user.rs
